1 /*
2  * Copyright (c) 2015 Carlos Pizano-Uribe <cpu@chromium.org>
3  *
4  * Use of this source code is governed by a MIT-style
5  * license that can be found in the LICENSE file or at
6  * https://opensource.org/licenses/MIT
7  */
8 #pragma once
9 
10 #include <stdint.h>
11 
12 enum sdram_bus_width {
13     SDRAM_BUS_WIDTH_8,
14     SDRAM_BUS_WIDTH_16,
15     SDRAM_BUS_WIDTH_32
16 };
17 
18 enum sdram_cas_latency {
19     SDRAM_CAS_LATENCY_1,
20     SDRAM_CAS_LATENCY_2,
21     SDRAM_CAS_LATENCY_3
22 };
23 
24 enum sdram_col_bits_num {
25     SDRAM_COLUMN_BITS_8,
26     SDRAM_COLUMN_BITS_9,
27     SDRAM_COLUMN_BITS_10,
28     SDRAM_COLUMN_BITS_11
29 };
30 
31 typedef struct _sdram_config {
32     enum sdram_bus_width bus_width;
33     enum sdram_cas_latency cas_latency;
34     enum sdram_col_bits_num col_bits_num;
35 } sdram_config_t;
36 
37 // Left to each target to define the GPIO to DRAM bus mapping.
38 void stm_sdram_GPIO_init(void);
39 
40 uint8_t stm32_sdram_init(sdram_config_t *config);
41 
42