1 /*
2  * Copyright 2021 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 /* FILE POLICY AND INTENDED USAGE:
27  *
28  * This file implements basic dpcd read/write functionality. It also does basic
29  * dpcd range check to ensure that every dpcd request is compliant with specs
30  * range requirements.
31  */
32 
33 #include "link_dpcd.h"
34 #include <drm/display/drm_dp_helper.h>
35 #include "dm_helpers.h"
36 
37 #define END_ADDRESS(start, size) (start + size - 1)
38 #define ADDRESS_RANGE_SIZE(start, end) (end - start + 1)
39 struct dpcd_address_range {
40 	uint32_t start;
41 	uint32_t end;
42 };
43 
internal_link_read_dpcd(struct dc_link * link,uint32_t address,uint8_t * data,uint32_t size)44 static enum dc_status internal_link_read_dpcd(
45 	struct dc_link *link,
46 	uint32_t address,
47 	uint8_t *data,
48 	uint32_t size)
49 {
50 	if (!link->aux_access_disabled &&
51 			!dm_helpers_dp_read_dpcd(link->ctx,
52 			link, address, data, size)) {
53 		return DC_ERROR_UNEXPECTED;
54 	}
55 
56 	return DC_OK;
57 }
58 
internal_link_write_dpcd(struct dc_link * link,uint32_t address,const uint8_t * data,uint32_t size)59 static enum dc_status internal_link_write_dpcd(
60 	struct dc_link *link,
61 	uint32_t address,
62 	const uint8_t *data,
63 	uint32_t size)
64 {
65 	if (!link->aux_access_disabled &&
66 			!dm_helpers_dp_write_dpcd(link->ctx,
67 			link, address, data, size)) {
68 		return DC_ERROR_UNEXPECTED;
69 	}
70 
71 	return DC_OK;
72 }
73 
74 /*
75  * Partition the entire DPCD address space
76  * XXX: This partitioning must cover the entire DPCD address space,
77  * and must contain no gaps or overlapping address ranges.
78  */
79 static const struct dpcd_address_range mandatory_dpcd_partitions[] = {
80 	{ 0, DP_TRAINING_PATTERN_SET_PHY_REPEATER(DP_PHY_LTTPR1) - 1},
81 	{ DP_TRAINING_PATTERN_SET_PHY_REPEATER(DP_PHY_LTTPR1), DP_TRAINING_PATTERN_SET_PHY_REPEATER(DP_PHY_LTTPR2) - 1 },
82 	{ DP_TRAINING_PATTERN_SET_PHY_REPEATER(DP_PHY_LTTPR2), DP_TRAINING_PATTERN_SET_PHY_REPEATER(DP_PHY_LTTPR3) - 1 },
83 	{ DP_TRAINING_PATTERN_SET_PHY_REPEATER(DP_PHY_LTTPR3), DP_TRAINING_PATTERN_SET_PHY_REPEATER(DP_PHY_LTTPR4) - 1 },
84 	{ DP_TRAINING_PATTERN_SET_PHY_REPEATER(DP_PHY_LTTPR4), DP_TRAINING_PATTERN_SET_PHY_REPEATER(DP_PHY_LTTPR5) - 1 },
85 	{ DP_TRAINING_PATTERN_SET_PHY_REPEATER(DP_PHY_LTTPR5), DP_TRAINING_PATTERN_SET_PHY_REPEATER(DP_PHY_LTTPR6) - 1 },
86 	{ DP_TRAINING_PATTERN_SET_PHY_REPEATER(DP_PHY_LTTPR6), DP_TRAINING_PATTERN_SET_PHY_REPEATER(DP_PHY_LTTPR7) - 1 },
87 	{ DP_TRAINING_PATTERN_SET_PHY_REPEATER(DP_PHY_LTTPR7), DP_TRAINING_PATTERN_SET_PHY_REPEATER(DP_PHY_LTTPR8) - 1 },
88 	{ DP_TRAINING_PATTERN_SET_PHY_REPEATER(DP_PHY_LTTPR8), DP_FEC_STATUS_PHY_REPEATER(DP_PHY_LTTPR1) - 1 },
89 	/*
90 	 * The FEC registers are contiguous
91 	 */
92 	{ DP_FEC_STATUS_PHY_REPEATER(DP_PHY_LTTPR1), DP_FEC_STATUS_PHY_REPEATER(DP_PHY_LTTPR1) - 1 },
93 	{ DP_FEC_STATUS_PHY_REPEATER(DP_PHY_LTTPR2), DP_FEC_STATUS_PHY_REPEATER(DP_PHY_LTTPR2) - 1 },
94 	{ DP_FEC_STATUS_PHY_REPEATER(DP_PHY_LTTPR3), DP_FEC_STATUS_PHY_REPEATER(DP_PHY_LTTPR3) - 1 },
95 	{ DP_FEC_STATUS_PHY_REPEATER(DP_PHY_LTTPR4), DP_FEC_STATUS_PHY_REPEATER(DP_PHY_LTTPR4) - 1 },
96 	{ DP_FEC_STATUS_PHY_REPEATER(DP_PHY_LTTPR5), DP_FEC_STATUS_PHY_REPEATER(DP_PHY_LTTPR5) - 1 },
97 	{ DP_FEC_STATUS_PHY_REPEATER(DP_PHY_LTTPR6), DP_FEC_STATUS_PHY_REPEATER(DP_PHY_LTTPR6) - 1 },
98 	{ DP_FEC_STATUS_PHY_REPEATER(DP_PHY_LTTPR7), DP_FEC_STATUS_PHY_REPEATER(DP_PHY_LTTPR7) - 1 },
99 	{ DP_FEC_STATUS_PHY_REPEATER(DP_PHY_LTTPR8), DP_LTTPR_MAX_ADD },
100 	/* all remaining DPCD addresses */
101 	{ DP_LTTPR_MAX_ADD + 1, DP_DPCD_MAX_ADD } };
102 
do_addresses_intersect_with_range(const struct dpcd_address_range * range,const uint32_t start_address,const uint32_t end_address)103 static inline bool do_addresses_intersect_with_range(
104 		const struct dpcd_address_range *range,
105 		const uint32_t start_address,
106 		const uint32_t end_address)
107 {
108 	return start_address <= range->end && end_address >= range->start;
109 }
110 
dpcd_get_next_partition_size(const uint32_t address,const uint32_t size)111 static uint32_t dpcd_get_next_partition_size(const uint32_t address, const uint32_t size)
112 {
113 	const uint32_t end_address = END_ADDRESS(address, size);
114 	uint32_t partition_iterator = 0;
115 
116 	/*
117 	 * find current partition
118 	 * this loop spins forever if partition map above is not surjective
119 	 */
120 	while (!do_addresses_intersect_with_range(&mandatory_dpcd_partitions[partition_iterator],
121 				address, end_address))
122 		partition_iterator++;
123 	if (end_address < mandatory_dpcd_partitions[partition_iterator].end)
124 		return size;
125 	return ADDRESS_RANGE_SIZE(address, mandatory_dpcd_partitions[partition_iterator].end);
126 }
127 
128 /*
129  * Ranges of DPCD addresses that must be read in a single transaction
130  * XXX: Do not allow any two address ranges in this array to overlap
131  */
132 static const struct dpcd_address_range mandatory_dpcd_blocks[] = {
133 	{ DP_LT_TUNABLE_PHY_REPEATER_FIELD_DATA_STRUCTURE_REV, DP_PHY_REPEATER_EXTENDED_WAIT_TIMEOUT }};
134 
135 /*
136  * extend addresses to read all mandatory blocks together
137  */
dpcd_extend_address_range(const uint32_t in_address,uint8_t * const in_data,const uint32_t in_size,uint32_t * out_address,uint8_t ** out_data,uint32_t * out_size)138 static void dpcd_extend_address_range(
139 		const uint32_t in_address,
140 		uint8_t * const in_data,
141 		const uint32_t in_size,
142 		uint32_t *out_address,
143 		uint8_t **out_data,
144 		uint32_t *out_size)
145 {
146 	const uint32_t end_address = END_ADDRESS(in_address, in_size);
147 	const struct dpcd_address_range *addr_range;
148 	struct dpcd_address_range new_addr_range;
149 	uint32_t i;
150 
151 	new_addr_range.start = in_address;
152 	new_addr_range.end = end_address;
153 	for (i = 0; i < ARRAY_SIZE(mandatory_dpcd_blocks); i++) {
154 		addr_range = &mandatory_dpcd_blocks[i];
155 		if (addr_range->start <= in_address && addr_range->end >= in_address)
156 			new_addr_range.start = addr_range->start;
157 
158 		if (addr_range->start <= end_address && addr_range->end >= end_address)
159 			new_addr_range.end = addr_range->end;
160 	}
161 	*out_address = in_address;
162 	*out_size = in_size;
163 	*out_data = in_data;
164 	if (new_addr_range.start != in_address || new_addr_range.end != end_address) {
165 		*out_address = new_addr_range.start;
166 		*out_size = ADDRESS_RANGE_SIZE(new_addr_range.start, new_addr_range.end);
167 		*out_data = kzalloc(*out_size * sizeof(**out_data), GFP_KERNEL);
168 	}
169 }
170 
171 /*
172  * Reduce the AUX reply down to the values the caller requested
173  */
dpcd_reduce_address_range(const uint32_t extended_address,uint8_t * const extended_data,const uint32_t extended_size,const uint32_t reduced_address,uint8_t * const reduced_data,const uint32_t reduced_size)174 static void dpcd_reduce_address_range(
175 		const uint32_t extended_address,
176 		uint8_t * const extended_data,
177 		const uint32_t extended_size,
178 		const uint32_t reduced_address,
179 		uint8_t * const reduced_data,
180 		const uint32_t reduced_size)
181 {
182 	const uint32_t offset = reduced_address - extended_address;
183 
184 	/*
185 	 * If the address is same, address was not extended.
186 	 * So we do not need to free any memory.
187 	 * The data is in original buffer(reduced_data).
188 	 */
189 	if (extended_data == reduced_data)
190 		return;
191 
192 	memcpy(&extended_data[offset], reduced_data, reduced_size);
193 	kfree(extended_data);
194 }
195 
core_link_read_dpcd(struct dc_link * link,uint32_t address,uint8_t * data,uint32_t size)196 enum dc_status core_link_read_dpcd(
197 	struct dc_link *link,
198 	uint32_t address,
199 	uint8_t *data,
200 	uint32_t size)
201 {
202 	uint32_t extended_address;
203 	uint32_t partitioned_address;
204 	uint8_t *extended_data;
205 	uint32_t extended_size;
206 	/* size of the remaining partitioned address space */
207 	uint32_t size_left_to_read;
208 	enum dc_status status;
209 	/* size of the next partition to be read from */
210 	uint32_t partition_size;
211 	uint32_t data_index = 0;
212 
213 	dpcd_extend_address_range(address, data, size, &extended_address, &extended_data, &extended_size);
214 	partitioned_address = extended_address;
215 	size_left_to_read = extended_size;
216 	while (size_left_to_read) {
217 		partition_size = dpcd_get_next_partition_size(partitioned_address, size_left_to_read);
218 		status = internal_link_read_dpcd(link, partitioned_address, &extended_data[data_index], partition_size);
219 		if (status != DC_OK)
220 			break;
221 		partitioned_address += partition_size;
222 		data_index += partition_size;
223 		size_left_to_read -= partition_size;
224 	}
225 	dpcd_reduce_address_range(extended_address, extended_data, extended_size, address, data, size);
226 	return status;
227 }
228 
core_link_write_dpcd(struct dc_link * link,uint32_t address,const uint8_t * data,uint32_t size)229 enum dc_status core_link_write_dpcd(
230 	struct dc_link *link,
231 	uint32_t address,
232 	const uint8_t *data,
233 	uint32_t size)
234 {
235 	uint32_t partition_size;
236 	uint32_t data_index = 0;
237 	enum dc_status status;
238 
239 	while (size) {
240 		partition_size = dpcd_get_next_partition_size(address, size);
241 		status = internal_link_write_dpcd(link, address, &data[data_index], partition_size);
242 		if (status != DC_OK)
243 			break;
244 		address += partition_size;
245 		data_index += partition_size;
246 		size -= partition_size;
247 	}
248 	return status;
249 }
250