1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Based on Ocelot Linux port, which is
4  * Copyright 2001 MontaVista Software Inc.
5  * Author: jsun@mvista.com or jsun@junsun.net
6  *
7  * Copyright 2003 ICT CAS
8  * Author: Michael Guo <guoyi@ict.ac.cn>
9  *
10  * Copyright (C) 2007 Lemote Inc. & Institute of Computing Technology
11  * Author: Fuxin Zhang, zhangfx@lemote.com
12  *
13  * Copyright (C) 2009 Lemote Inc.
14  * Author: Wu Zhangjin, wuzhangjin@gmail.com
15  */
16 #include <linux/export.h>
17 #include <linux/pci_ids.h>
18 #include <asm/bootinfo.h>
19 #include <loongson.h>
20 #include <boot_param.h>
21 #include <builtin_dtbs.h>
22 #include <workarounds.h>
23 
24 #define HOST_BRIDGE_CONFIG_ADDR	((void __iomem *)TO_UNCAC(0x1a000000))
25 
26 u32 cpu_clock_freq;
27 EXPORT_SYMBOL(cpu_clock_freq);
28 struct efi_memory_map_loongson *loongson_memmap;
29 struct loongson_system_configuration loongson_sysconf;
30 
31 struct board_devices *eboard;
32 struct interface_info *einter;
33 struct loongson_special_attribute *especial;
34 
35 u64 loongson_chipcfg[MAX_PACKAGES] = {0xffffffffbfc00180};
36 u64 loongson_chiptemp[MAX_PACKAGES];
37 u64 loongson_freqctrl[MAX_PACKAGES];
38 
39 unsigned long long smp_group[4];
40 
get_system_type(void)41 const char *get_system_type(void)
42 {
43 	return "Generic Loongson64 System";
44 }
45 
46 
prom_dtb_init_env(void)47 void __init prom_dtb_init_env(void)
48 {
49 	if ((fw_arg2 < CKSEG0 || fw_arg2 > CKSEG1)
50 		&& (fw_arg2 < XKPHYS || fw_arg2 > XKSEG))
51 
52 		loongson_fdt_blob = __dtb_loongson64_2core_2k1000_begin;
53 	else
54 		loongson_fdt_blob = (void *)fw_arg2;
55 }
56 
prom_lefi_init_env(void)57 void __init prom_lefi_init_env(void)
58 {
59 	struct boot_params *boot_p;
60 	struct loongson_params *loongson_p;
61 	struct system_loongson *esys;
62 	struct efi_cpuinfo_loongson *ecpu;
63 	struct irq_source_routing_table *eirq_source;
64 	u32 id;
65 	u16 vendor;
66 
67 	/* firmware arguments are initialized in head.S */
68 	boot_p = (struct boot_params *)fw_arg2;
69 	loongson_p = &(boot_p->efi.smbios.lp);
70 
71 	esys = (struct system_loongson *)
72 		((u64)loongson_p + loongson_p->system_offset);
73 	ecpu = (struct efi_cpuinfo_loongson *)
74 		((u64)loongson_p + loongson_p->cpu_offset);
75 	eboard = (struct board_devices *)
76 		((u64)loongson_p + loongson_p->boarddev_table_offset);
77 	einter = (struct interface_info *)
78 		((u64)loongson_p + loongson_p->interface_offset);
79 	especial = (struct loongson_special_attribute *)
80 		((u64)loongson_p + loongson_p->special_offset);
81 	eirq_source = (struct irq_source_routing_table *)
82 		((u64)loongson_p + loongson_p->irq_offset);
83 	loongson_memmap = (struct efi_memory_map_loongson *)
84 		((u64)loongson_p + loongson_p->memory_offset);
85 
86 	cpu_clock_freq = ecpu->cpu_clock_freq;
87 	loongson_sysconf.cputype = ecpu->cputype;
88 	switch (ecpu->cputype) {
89 	case Legacy_3A:
90 	case Loongson_3A:
91 		loongson_sysconf.cores_per_node = 4;
92 		loongson_sysconf.cores_per_package = 4;
93 		smp_group[0] = 0x900000003ff01000;
94 		smp_group[1] = 0x900010003ff01000;
95 		smp_group[2] = 0x900020003ff01000;
96 		smp_group[3] = 0x900030003ff01000;
97 		loongson_chipcfg[0] = 0x900000001fe00180;
98 		loongson_chipcfg[1] = 0x900010001fe00180;
99 		loongson_chipcfg[2] = 0x900020001fe00180;
100 		loongson_chipcfg[3] = 0x900030001fe00180;
101 		loongson_chiptemp[0] = 0x900000001fe0019c;
102 		loongson_chiptemp[1] = 0x900010001fe0019c;
103 		loongson_chiptemp[2] = 0x900020001fe0019c;
104 		loongson_chiptemp[3] = 0x900030001fe0019c;
105 		loongson_freqctrl[0] = 0x900000001fe001d0;
106 		loongson_freqctrl[1] = 0x900010001fe001d0;
107 		loongson_freqctrl[2] = 0x900020001fe001d0;
108 		loongson_freqctrl[3] = 0x900030001fe001d0;
109 		loongson_sysconf.workarounds = WORKAROUND_CPUFREQ;
110 		break;
111 	case Legacy_3B:
112 	case Loongson_3B:
113 		loongson_sysconf.cores_per_node = 4; /* One chip has 2 nodes */
114 		loongson_sysconf.cores_per_package = 8;
115 		smp_group[0] = 0x900000003ff01000;
116 		smp_group[1] = 0x900010003ff05000;
117 		smp_group[2] = 0x900020003ff09000;
118 		smp_group[3] = 0x900030003ff0d000;
119 		loongson_chipcfg[0] = 0x900000001fe00180;
120 		loongson_chipcfg[1] = 0x900020001fe00180;
121 		loongson_chipcfg[2] = 0x900040001fe00180;
122 		loongson_chipcfg[3] = 0x900060001fe00180;
123 		loongson_chiptemp[0] = 0x900000001fe0019c;
124 		loongson_chiptemp[1] = 0x900020001fe0019c;
125 		loongson_chiptemp[2] = 0x900040001fe0019c;
126 		loongson_chiptemp[3] = 0x900060001fe0019c;
127 		loongson_freqctrl[0] = 0x900000001fe001d0;
128 		loongson_freqctrl[1] = 0x900020001fe001d0;
129 		loongson_freqctrl[2] = 0x900040001fe001d0;
130 		loongson_freqctrl[3] = 0x900060001fe001d0;
131 		loongson_sysconf.workarounds = WORKAROUND_CPUHOTPLUG;
132 		break;
133 	default:
134 		loongson_sysconf.cores_per_node = 1;
135 		loongson_sysconf.cores_per_package = 1;
136 		loongson_chipcfg[0] = 0x900000001fe00180;
137 	}
138 
139 	loongson_sysconf.nr_cpus = ecpu->nr_cpus;
140 	loongson_sysconf.boot_cpu_id = ecpu->cpu_startup_core_id;
141 	loongson_sysconf.reserved_cpus_mask = ecpu->reserved_cores_mask;
142 	if (ecpu->nr_cpus > NR_CPUS || ecpu->nr_cpus == 0)
143 		loongson_sysconf.nr_cpus = NR_CPUS;
144 	loongson_sysconf.nr_nodes = (loongson_sysconf.nr_cpus +
145 		loongson_sysconf.cores_per_node - 1) /
146 		loongson_sysconf.cores_per_node;
147 
148 	loongson_sysconf.dma_mask_bits = eirq_source->dma_mask_bits;
149 	if (loongson_sysconf.dma_mask_bits < 32 ||
150 		loongson_sysconf.dma_mask_bits > 64)
151 		loongson_sysconf.dma_mask_bits = 32;
152 
153 	loongson_sysconf.restart_addr = boot_p->reset_system.ResetWarm;
154 	loongson_sysconf.poweroff_addr = boot_p->reset_system.Shutdown;
155 	loongson_sysconf.suspend_addr = boot_p->reset_system.DoSuspend;
156 
157 	loongson_sysconf.vgabios_addr = boot_p->efi.smbios.vga_bios;
158 	pr_debug("Shutdown Addr: %llx, Restart Addr: %llx, VBIOS Addr: %llx\n",
159 		loongson_sysconf.poweroff_addr, loongson_sysconf.restart_addr,
160 		loongson_sysconf.vgabios_addr);
161 
162 	loongson_sysconf.workarounds |= esys->workarounds;
163 
164 	pr_info("CpuClock = %u\n", cpu_clock_freq);
165 
166 	/* Read the ID of PCI host bridge to detect bridge type */
167 	id = readl(HOST_BRIDGE_CONFIG_ADDR);
168 	vendor = id & 0xffff;
169 
170 	switch (vendor) {
171 	case PCI_VENDOR_ID_LOONGSON:
172 		pr_info("The bridge chip is LS7A\n");
173 		loongson_sysconf.bridgetype = LS7A;
174 		loongson_sysconf.early_config = ls7a_early_config;
175 		break;
176 	case PCI_VENDOR_ID_AMD:
177 	case PCI_VENDOR_ID_ATI:
178 		pr_info("The bridge chip is RS780E or SR5690\n");
179 		loongson_sysconf.bridgetype = RS780E;
180 		loongson_sysconf.early_config = rs780e_early_config;
181 		break;
182 	default:
183 		pr_info("The bridge chip is VIRTUAL\n");
184 		loongson_sysconf.bridgetype = VIRTUAL;
185 		loongson_sysconf.early_config = virtual_early_config;
186 		loongson_fdt_blob = __dtb_loongson64v_4core_virtio_begin;
187 		break;
188 	}
189 
190 	if ((read_c0_prid() & PRID_IMP_MASK) == PRID_IMP_LOONGSON_64C) {
191 		switch (read_c0_prid() & PRID_REV_MASK) {
192 		case PRID_REV_LOONGSON3A_R1:
193 		case PRID_REV_LOONGSON3A_R2_0:
194 		case PRID_REV_LOONGSON3A_R2_1:
195 		case PRID_REV_LOONGSON3A_R3_0:
196 		case PRID_REV_LOONGSON3A_R3_1:
197 			switch (loongson_sysconf.bridgetype) {
198 			case LS7A:
199 				loongson_fdt_blob = __dtb_loongson64c_4core_ls7a_begin;
200 				break;
201 			case RS780E:
202 				loongson_fdt_blob = __dtb_loongson64c_4core_rs780e_begin;
203 				break;
204 			default:
205 				break;
206 			}
207 			break;
208 		case PRID_REV_LOONGSON3B_R1:
209 		case PRID_REV_LOONGSON3B_R2:
210 			if (loongson_sysconf.bridgetype == RS780E)
211 				loongson_fdt_blob = __dtb_loongson64c_8core_rs780e_begin;
212 			break;
213 		default:
214 			break;
215 		}
216 	} else if ((read_c0_prid() & PRID_IMP_MASK) == PRID_IMP_LOONGSON_64G) {
217 		if (loongson_sysconf.bridgetype == LS7A)
218 			loongson_fdt_blob = __dtb_loongson64g_4core_ls7a_begin;
219 	}
220 
221 	if (!loongson_fdt_blob)
222 		pr_err("Failed to determine built-in Loongson64 dtb\n");
223 }
224