1 /*
2  * Copyright (c) 2020-2022, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #include <assert.h>
8 
9 #include <common/debug.h>
10 #include <common/desc_image_load.h>
11 #include <common/fdt_wrappers.h>
12 #include <drivers/io/io_storage.h>
13 #include <lib/object_pool.h>
14 #include <libfdt.h>
15 #include <plat/arm/common/arm_fconf_getter.h>
16 #include <plat/arm/common/arm_fconf_io_storage.h>
17 #include <plat/arm/common/fconf_arm_sp_getter.h>
18 #include <platform_def.h>
19 #include <tools_share/firmware_image_package.h>
20 
21 #ifdef IMAGE_BL2
22 
23 bl_mem_params_node_t sp_mem_params_descs[MAX_SP_IDS];
24 
25 struct arm_sp_t arm_sp;
26 
fconf_populate_arm_sp(uintptr_t config)27 int fconf_populate_arm_sp(uintptr_t config)
28 {
29 	int sp_node, node, err;
30 	union uuid_helper_t uuid_helper;
31 	unsigned int index = 0;
32 	uint32_t val32;
33 	const unsigned int sip_start = SP_PKG1_ID;
34 	unsigned int sip_index = sip_start;
35 #if defined(ARM_COT_dualroot)
36 	const unsigned int sip_end = sip_start + MAX_SP_IDS / 2;
37 	/* Allocating index range for platform SPs */
38 	const unsigned int plat_start = SP_PKG5_ID;
39 	unsigned int plat_index = plat_start;
40 	const unsigned int plat_end = plat_start + MAX_SP_IDS / 2;
41 	bool is_plat_owned = false;
42 #endif /* ARM_COT_dualroot */
43 
44 	/* As libfdt use void *, we can't avoid this cast */
45 	const void *dtb = (void *)config;
46 
47 	/* Assert the node offset point to "arm,sp" compatible property */
48 	const char *compatible_str = "arm,sp";
49 
50 	node = fdt_node_offset_by_compatible(dtb, -1, compatible_str);
51 	if (node < 0) {
52 		ERROR("FCONF: Can't find %s in dtb\n", compatible_str);
53 		return node;
54 	}
55 
56 	fdt_for_each_subnode(sp_node, dtb, node) {
57 		if (index == MAX_SP_IDS) {
58 			ERROR("FCONF: Reached max number of SPs\n");
59 			return -1;
60 		}
61 
62 #if defined(ARM_COT_dualroot)
63 		if ((sip_index == sip_end) || (plat_index == plat_end)) {
64 			ERROR("FCONF: Reached max number of plat/SiP SPs\n");
65 			return -1;
66 		}
67 #endif /* ARM_COT_dualroot */
68 
69 		/* Read UUID */
70 		err = fdtw_read_uuid(dtb, sp_node, "uuid", 16,
71 				     (uint8_t *)&uuid_helper);
72 		if (err < 0) {
73 			ERROR("FCONF: cannot read SP uuid\n");
74 			return -1;
75 		}
76 
77 		arm_sp.uuids[index] = uuid_helper;
78 
79 		/* Read Load address */
80 		err = fdt_read_uint32(dtb, sp_node, "load-address", &val32);
81 		if (err < 0) {
82 			ERROR("FCONF: cannot read SP load address\n");
83 			return -1;
84 		}
85 		arm_sp.load_addr[index] = val32;
86 
87 		VERBOSE("FCONF: %s UUID"
88 			" %02x%02x%02x%02x-%02x%02x-%02x%02x-%02x%02x-%02x%02x%02x%02x%02x%02x"
89 			" load_addr=%lx\n",
90 			__func__,
91 			uuid_helper.uuid_struct.time_low[0], uuid_helper.uuid_struct.time_low[1],
92 			uuid_helper.uuid_struct.time_low[2], uuid_helper.uuid_struct.time_low[3],
93 			uuid_helper.uuid_struct.time_mid[0], uuid_helper.uuid_struct.time_mid[1],
94 			uuid_helper.uuid_struct.time_hi_and_version[0],
95 			uuid_helper.uuid_struct.time_hi_and_version[1],
96 			uuid_helper.uuid_struct.clock_seq_hi_and_reserved,
97 			uuid_helper.uuid_struct.clock_seq_low,
98 			uuid_helper.uuid_struct.node[0], uuid_helper.uuid_struct.node[1],
99 			uuid_helper.uuid_struct.node[2], uuid_helper.uuid_struct.node[3],
100 			uuid_helper.uuid_struct.node[4], uuid_helper.uuid_struct.node[5],
101 			arm_sp.load_addr[index]);
102 
103 		/* Read owner field only for dualroot CoT */
104 #if defined(ARM_COT_dualroot)
105 		/* Owner is an optional field, no need to catch error */
106 		fdtw_read_string(dtb, sp_node, "owner",
107 				arm_sp.owner[index], ARM_SP_OWNER_NAME_LEN);
108 
109 		/* If owner is empty mark it as SiP owned */
110 		if ((strncmp(arm_sp.owner[index], "SiP",
111 			     ARM_SP_OWNER_NAME_LEN) == 0) ||
112 		    (strncmp(arm_sp.owner[index], "",
113 			     ARM_SP_OWNER_NAME_LEN) == 0)) {
114 			is_plat_owned = false;
115 		} else if (strcmp(arm_sp.owner[index], "Plat") == 0) {
116 			is_plat_owned = true;
117 		} else {
118 			ERROR("FCONF: %s is not a valid SP owner\n",
119 			      arm_sp.owner[index]);
120 			return -1;
121 		}
122 		/*
123 		 * Add SP information in mem param descriptor and IO policies
124 		 * structure.
125 		 */
126 		if (is_plat_owned) {
127 			sp_mem_params_descs[index].image_id = plat_index;
128 			policies[plat_index].image_spec =
129 						(uintptr_t)&arm_sp.uuids[index];
130 			policies[plat_index].dev_handle = &fip_dev_handle;
131 			policies[plat_index].check = open_fip;
132 			plat_index++;
133 		} else
134 #endif /* ARM_COT_dualroot */
135 		{
136 			sp_mem_params_descs[index].image_id = sip_index;
137 			policies[sip_index].image_spec =
138 						(uintptr_t)&arm_sp.uuids[index];
139 			policies[sip_index].dev_handle = &fip_dev_handle;
140 			policies[sip_index].check = open_fip;
141 			sip_index++;
142 		}
143 		SET_PARAM_HEAD(&sp_mem_params_descs[index].image_info,
144 					PARAM_IMAGE_BINARY, VERSION_2, 0);
145 		sp_mem_params_descs[index].image_info.image_max_size =
146 							ARM_SP_MAX_SIZE;
147 		sp_mem_params_descs[index].next_handoff_image_id =
148 							INVALID_IMAGE_ID;
149 		sp_mem_params_descs[index].image_info.image_base =
150 							arm_sp.load_addr[index];
151 		index++;
152 	}
153 
154 	if ((sp_node < 0) && (sp_node != -FDT_ERR_NOTFOUND)) {
155 		ERROR("%u: fdt_for_each_subnode(): %d\n", __LINE__, node);
156 		return sp_node;
157 	}
158 
159 	arm_sp.number_of_sp = index;
160 	return 0;
161 }
162 
163 FCONF_REGISTER_POPULATOR(TB_FW, arm_sp, fconf_populate_arm_sp);
164 
165 #endif /* IMAGE_BL2 */
166