1// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2// 3// Copyright 2013 Freescale Semiconductor, Inc. 4 5#include "vf610-pinfunc.h" 6#include <dt-bindings/clock/vf610-clock.h> 7#include <dt-bindings/interrupt-controller/irq.h> 8#include <dt-bindings/gpio/gpio.h> 9 10/ { 11 aliases { 12 can0 = &can0; 13 can1 = &can1; 14 ethernet0 = &fec0; 15 ethernet1 = &fec1; 16 serial0 = &uart0; 17 serial1 = &uart1; 18 serial2 = &uart2; 19 serial3 = &uart3; 20 serial4 = &uart4; 21 serial5 = &uart5; 22 gpio0 = &gpio0; 23 gpio1 = &gpio1; 24 gpio2 = &gpio2; 25 gpio3 = &gpio3; 26 gpio4 = &gpio4; 27 usbphy0 = &usbphy0; 28 usbphy1 = &usbphy1; 29 }; 30 31 fxosc: fxosc { 32 compatible = "fixed-clock"; 33 #clock-cells = <0>; 34 clock-frequency = <24000000>; 35 }; 36 37 sxosc: sxosc { 38 compatible = "fixed-clock"; 39 #clock-cells = <0>; 40 clock-frequency = <32768>; 41 }; 42 43 reboot: syscon-reboot { 44 compatible = "syscon-reboot"; 45 regmap = <&src>; 46 offset = <0x0>; 47 mask = <0x1000>; 48 }; 49 50 tempsensor: iio-hwmon { 51 compatible = "iio-hwmon"; 52 io-channels = <&adc0 16>, <&adc1 16>; 53 }; 54 55 soc { 56 #address-cells = <1>; 57 #size-cells = <1>; 58 compatible = "simple-bus"; 59 interrupt-parent = <&mscm_ir>; 60 ranges; 61 62 aips0: bus@40000000 { 63 compatible = "fsl,aips-bus", "simple-bus"; 64 #address-cells = <1>; 65 #size-cells = <1>; 66 reg = <0x40000000 0x00070000>; 67 ranges; 68 69 mscm_cpucfg: cpucfg@40001000 { 70 compatible = "fsl,vf610-mscm-cpucfg", "syscon"; 71 reg = <0x40001000 0x800>; 72 }; 73 74 mscm_ir: interrupt-controller@40001800 { 75 compatible = "fsl,vf610-mscm-ir"; 76 reg = <0x40001800 0x400>; 77 fsl,cpucfg = <&mscm_cpucfg>; 78 interrupt-controller; 79 #interrupt-cells = <2>; 80 }; 81 82 edma0: dma-controller@40018000 { 83 #dma-cells = <2>; 84 compatible = "fsl,vf610-edma"; 85 reg = <0x40018000 0x2000>, 86 <0x40024000 0x1000>, 87 <0x40025000 0x1000>; 88 dma-channels = <32>; 89 interrupts = <8 IRQ_TYPE_LEVEL_HIGH>, 90 <9 IRQ_TYPE_LEVEL_HIGH>; 91 interrupt-names = "edma-tx", "edma-err"; 92 clock-names = "dmamux0", "dmamux1"; 93 clocks = <&clks VF610_CLK_DMAMUX0>, 94 <&clks VF610_CLK_DMAMUX1>; 95 status = "disabled"; 96 }; 97 98 can0: can@40020000 { 99 compatible = "fsl,vf610-flexcan"; 100 reg = <0x40020000 0x4000>; 101 interrupts = <58 IRQ_TYPE_LEVEL_HIGH>; 102 clocks = <&clks VF610_CLK_FLEXCAN0>, 103 <&clks VF610_CLK_FLEXCAN0>; 104 clock-names = "ipg", "per"; 105 status = "disabled"; 106 }; 107 108 uart0: serial@40027000 { 109 compatible = "fsl,vf610-lpuart"; 110 reg = <0x40027000 0x1000>; 111 interrupts = <61 IRQ_TYPE_LEVEL_HIGH>; 112 clocks = <&clks VF610_CLK_UART0>; 113 clock-names = "ipg"; 114 dmas = <&edma0 0 2>, 115 <&edma0 0 3>; 116 dma-names = "rx","tx"; 117 status = "disabled"; 118 }; 119 120 uart1: serial@40028000 { 121 compatible = "fsl,vf610-lpuart"; 122 reg = <0x40028000 0x1000>; 123 interrupts = <62 IRQ_TYPE_LEVEL_HIGH>; 124 clocks = <&clks VF610_CLK_UART1>; 125 clock-names = "ipg"; 126 dmas = <&edma0 0 4>, 127 <&edma0 0 5>; 128 dma-names = "rx","tx"; 129 status = "disabled"; 130 }; 131 132 uart2: serial@40029000 { 133 compatible = "fsl,vf610-lpuart"; 134 reg = <0x40029000 0x1000>; 135 interrupts = <63 IRQ_TYPE_LEVEL_HIGH>; 136 clocks = <&clks VF610_CLK_UART2>; 137 clock-names = "ipg"; 138 dmas = <&edma0 0 6>, 139 <&edma0 0 7>; 140 dma-names = "rx","tx"; 141 status = "disabled"; 142 }; 143 144 uart3: serial@4002a000 { 145 compatible = "fsl,vf610-lpuart"; 146 reg = <0x4002a000 0x1000>; 147 interrupts = <64 IRQ_TYPE_LEVEL_HIGH>; 148 clocks = <&clks VF610_CLK_UART3>; 149 clock-names = "ipg"; 150 dmas = <&edma0 0 8>, 151 <&edma0 0 9>; 152 dma-names = "rx","tx"; 153 status = "disabled"; 154 }; 155 156 dspi0: spi@4002c000 { 157 #address-cells = <1>; 158 #size-cells = <0>; 159 compatible = "fsl,vf610-dspi"; 160 reg = <0x4002c000 0x1000>; 161 interrupts = <67 IRQ_TYPE_LEVEL_HIGH>; 162 clocks = <&clks VF610_CLK_DSPI0>; 163 clock-names = "dspi"; 164 spi-num-chipselects = <6>; 165 dmas = <&edma1 1 12>, 166 <&edma1 1 13>; 167 dma-names = "rx", "tx"; 168 status = "disabled"; 169 }; 170 171 dspi1: spi@4002d000 { 172 #address-cells = <1>; 173 #size-cells = <0>; 174 compatible = "fsl,vf610-dspi"; 175 reg = <0x4002d000 0x1000>; 176 interrupts = <68 IRQ_TYPE_LEVEL_HIGH>; 177 clocks = <&clks VF610_CLK_DSPI1>; 178 clock-names = "dspi"; 179 spi-num-chipselects = <4>; 180 dmas = <&edma1 1 14>, 181 <&edma1 1 15>; 182 dma-names = "rx", "tx"; 183 status = "disabled"; 184 }; 185 186 sai0: sai@4002f000 { 187 compatible = "fsl,vf610-sai"; 188 reg = <0x4002f000 0x1000>; 189 interrupts = <84 IRQ_TYPE_LEVEL_HIGH>; 190 clocks = <&clks VF610_CLK_SAI0>, 191 <&clks VF610_CLK_SAI0_DIV>, 192 <&clks 0>, <&clks 0>; 193 clock-names = "bus", "mclk1", "mclk2", "mclk3"; 194 dma-names = "rx", "tx"; 195 dmas = <&edma0 0 16>, <&edma0 0 17>; 196 status = "disabled"; 197 }; 198 199 sai1: sai@40030000 { 200 compatible = "fsl,vf610-sai"; 201 reg = <0x40030000 0x1000>; 202 interrupts = <85 IRQ_TYPE_LEVEL_HIGH>; 203 clocks = <&clks VF610_CLK_SAI1>, 204 <&clks VF610_CLK_SAI1_DIV>, 205 <&clks 0>, <&clks 0>; 206 clock-names = "bus", "mclk1", "mclk2", "mclk3"; 207 dma-names = "rx", "tx"; 208 dmas = <&edma0 0 18>, <&edma0 0 19>; 209 status = "disabled"; 210 }; 211 212 sai2: sai@40031000 { 213 compatible = "fsl,vf610-sai"; 214 reg = <0x40031000 0x1000>; 215 interrupts = <86 IRQ_TYPE_LEVEL_HIGH>; 216 clocks = <&clks VF610_CLK_SAI2>, 217 <&clks VF610_CLK_SAI2_DIV>, 218 <&clks 0>, <&clks 0>; 219 clock-names = "bus", "mclk1", "mclk2", "mclk3"; 220 dma-names = "rx", "tx"; 221 dmas = <&edma0 0 20>, <&edma0 0 21>; 222 status = "disabled"; 223 }; 224 225 sai3: sai@40032000 { 226 compatible = "fsl,vf610-sai"; 227 reg = <0x40032000 0x1000>; 228 interrupts = <87 IRQ_TYPE_LEVEL_HIGH>; 229 clocks = <&clks VF610_CLK_SAI3>, 230 <&clks VF610_CLK_SAI3_DIV>, 231 <&clks 0>, <&clks 0>; 232 clock-names = "bus", "mclk1", "mclk2", "mclk3"; 233 dma-names = "rx", "tx"; 234 dmas = <&edma0 1 8>, <&edma0 1 9>; 235 status = "disabled"; 236 }; 237 238 pit: pit@40037000 { 239 compatible = "fsl,vf610-pit"; 240 reg = <0x40037000 0x1000>; 241 interrupts = <39 IRQ_TYPE_LEVEL_HIGH>; 242 clocks = <&clks VF610_CLK_PIT>; 243 clock-names = "pit"; 244 }; 245 246 pwm0: pwm@40038000 { 247 compatible = "fsl,vf610-ftm-pwm"; 248 #pwm-cells = <3>; 249 reg = <0x40038000 0x1000>; 250 clock-names = "ftm_sys", "ftm_ext", 251 "ftm_fix", "ftm_cnt_clk_en"; 252 clocks = <&clks VF610_CLK_FTM0>, 253 <&clks VF610_CLK_FTM0_EXT_SEL>, 254 <&clks VF610_CLK_FTM0_FIX_SEL>, 255 <&clks VF610_CLK_FTM0_EXT_FIX_EN>; 256 status = "disabled"; 257 }; 258 259 pwm1: pwm@40039000 { 260 compatible = "fsl,vf610-ftm-pwm"; 261 #pwm-cells = <3>; 262 reg = <0x40039000 0x1000>; 263 clock-names = "ftm_sys", "ftm_ext", 264 "ftm_fix", "ftm_cnt_clk_en"; 265 clocks = <&clks VF610_CLK_FTM1>, 266 <&clks VF610_CLK_FTM1_EXT_SEL>, 267 <&clks VF610_CLK_FTM1_FIX_SEL>, 268 <&clks VF610_CLK_FTM1_EXT_FIX_EN>; 269 status = "disabled"; 270 }; 271 272 adc0: adc@4003b000 { 273 compatible = "fsl,vf610-adc"; 274 reg = <0x4003b000 0x1000>; 275 interrupts = <53 IRQ_TYPE_LEVEL_HIGH>; 276 clocks = <&clks VF610_CLK_ADC0>; 277 clock-names = "adc"; 278 #io-channel-cells = <1>; 279 status = "disabled"; 280 fsl,adck-max-frequency = <30000000>, <40000000>, 281 <20000000>; 282 }; 283 284 tcon0: timing-controller@4003d000 { 285 compatible = "fsl,vf610-tcon"; 286 reg = <0x4003d000 0x1000>; 287 clocks = <&clks VF610_CLK_TCON0>; 288 clock-names = "ipg"; 289 status = "disabled"; 290 }; 291 292 wdoga5: watchdog@4003e000 { 293 compatible = "fsl,vf610-wdt", "fsl,imx21-wdt"; 294 reg = <0x4003e000 0x1000>; 295 interrupts = <20 IRQ_TYPE_LEVEL_HIGH>; 296 clocks = <&clks VF610_CLK_WDT>; 297 clock-names = "wdog"; 298 status = "disabled"; 299 }; 300 301 qspi0: spi@40044000 { 302 #address-cells = <1>; 303 #size-cells = <0>; 304 compatible = "fsl,vf610-qspi"; 305 reg = <0x40044000 0x1000>, <0x20000000 0x10000000>; 306 reg-names = "QuadSPI", "QuadSPI-memory"; 307 interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; 308 clocks = <&clks VF610_CLK_QSPI0_EN>, 309 <&clks VF610_CLK_QSPI0>; 310 clock-names = "qspi_en", "qspi"; 311 status = "disabled"; 312 }; 313 314 iomuxc: iomuxc@40048000 { 315 compatible = "fsl,vf610-iomuxc"; 316 reg = <0x40048000 0x1000>; 317 }; 318 319 gpio0: gpio@40049000 { 320 compatible = "fsl,vf610-gpio"; 321 reg = <0x40049000 0x1000 0x400ff000 0x40>; 322 gpio-controller; 323 #gpio-cells = <2>; 324 interrupts = <107 IRQ_TYPE_LEVEL_HIGH>; 325 interrupt-controller; 326 #interrupt-cells = <2>; 327 gpio-ranges = <&iomuxc 0 0 32>; 328 }; 329 330 gpio1: gpio@4004a000 { 331 compatible = "fsl,vf610-gpio"; 332 reg = <0x4004a000 0x1000 0x400ff040 0x40>; 333 gpio-controller; 334 #gpio-cells = <2>; 335 interrupts = <108 IRQ_TYPE_LEVEL_HIGH>; 336 interrupt-controller; 337 #interrupt-cells = <2>; 338 gpio-ranges = <&iomuxc 0 32 32>; 339 }; 340 341 gpio2: gpio@4004b000 { 342 compatible = "fsl,vf610-gpio"; 343 reg = <0x4004b000 0x1000 0x400ff080 0x40>; 344 gpio-controller; 345 #gpio-cells = <2>; 346 interrupts = <109 IRQ_TYPE_LEVEL_HIGH>; 347 interrupt-controller; 348 #interrupt-cells = <2>; 349 gpio-ranges = <&iomuxc 0 64 32>; 350 }; 351 352 gpio3: gpio@4004c000 { 353 compatible = "fsl,vf610-gpio"; 354 reg = <0x4004c000 0x1000 0x400ff0c0 0x40>; 355 gpio-controller; 356 #gpio-cells = <2>; 357 interrupts = <110 IRQ_TYPE_LEVEL_HIGH>; 358 interrupt-controller; 359 #interrupt-cells = <2>; 360 gpio-ranges = <&iomuxc 0 96 32>; 361 }; 362 363 gpio4: gpio@4004d000 { 364 compatible = "fsl,vf610-gpio"; 365 reg = <0x4004d000 0x1000 0x400ff100 0x40>; 366 gpio-controller; 367 #gpio-cells = <2>; 368 interrupts = <111 IRQ_TYPE_LEVEL_HIGH>; 369 interrupt-controller; 370 #interrupt-cells = <2>; 371 gpio-ranges = <&iomuxc 0 128 7>; 372 }; 373 374 anatop: anatop@40050000 { 375 compatible = "fsl,vf610-anatop", "syscon"; 376 reg = <0x40050000 0x400>; 377 }; 378 379 usbphy0: usbphy@40050800 { 380 compatible = "fsl,vf610-usbphy"; 381 reg = <0x40050800 0x400>; 382 interrupts = <50 IRQ_TYPE_LEVEL_HIGH>; 383 clocks = <&clks VF610_CLK_USBPHY0>; 384 fsl,anatop = <&anatop>; 385 status = "disabled"; 386 }; 387 388 usbphy1: usbphy@40050c00 { 389 compatible = "fsl,vf610-usbphy"; 390 reg = <0x40050c00 0x400>; 391 interrupts = <51 IRQ_TYPE_LEVEL_HIGH>; 392 clocks = <&clks VF610_CLK_USBPHY1>; 393 fsl,anatop = <&anatop>; 394 status = "disabled"; 395 }; 396 397 dcu0: dcu@40058000 { 398 compatible = "fsl,vf610-dcu"; 399 reg = <0x40058000 0x1200>; 400 interrupts = <30 IRQ_TYPE_LEVEL_HIGH>; 401 clocks = <&clks VF610_CLK_DCU0>, 402 <&clks VF610_CLK_DCU0_DIV>; 403 clock-names = "dcu", "pix"; 404 fsl,tcon = <&tcon0>; 405 status = "disabled"; 406 }; 407 408 i2c0: i2c@40066000 { 409 #address-cells = <1>; 410 #size-cells = <0>; 411 compatible = "fsl,vf610-i2c"; 412 reg = <0x40066000 0x1000>; 413 interrupts = <71 IRQ_TYPE_LEVEL_HIGH>; 414 clocks = <&clks VF610_CLK_I2C0>; 415 clock-names = "ipg"; 416 dmas = <&edma0 0 50>, 417 <&edma0 0 51>; 418 dma-names = "rx","tx"; 419 status = "disabled"; 420 }; 421 422 i2c1: i2c@40067000 { 423 #address-cells = <1>; 424 #size-cells = <0>; 425 compatible = "fsl,vf610-i2c"; 426 reg = <0x40067000 0x1000>; 427 interrupts = <72 IRQ_TYPE_LEVEL_HIGH>; 428 clocks = <&clks VF610_CLK_I2C1>; 429 clock-names = "ipg"; 430 dmas = <&edma0 0 52>, 431 <&edma0 0 53>; 432 dma-names = "rx","tx"; 433 status = "disabled"; 434 }; 435 436 clks: ccm@4006b000 { 437 compatible = "fsl,vf610-ccm"; 438 reg = <0x4006b000 0x1000>; 439 clocks = <&sxosc>, <&fxosc>; 440 clock-names = "sxosc", "fxosc"; 441 #clock-cells = <1>; 442 }; 443 444 usbdev0: usb@40034000 { 445 compatible = "fsl,vf610-usb", "fsl,imx27-usb"; 446 reg = <0x40034000 0x800>; 447 interrupts = <75 IRQ_TYPE_LEVEL_HIGH>; 448 clocks = <&clks VF610_CLK_USBC0>; 449 fsl,usbphy = <&usbphy0>; 450 fsl,usbmisc = <&usbmisc0 0>; 451 dr_mode = "peripheral"; 452 status = "disabled"; 453 }; 454 455 usbmisc0: usb@40034800 { 456 #index-cells = <1>; 457 compatible = "fsl,vf610-usbmisc"; 458 reg = <0x40034800 0x200>; 459 clocks = <&clks VF610_CLK_USBC0>; 460 status = "disabled"; 461 }; 462 463 src: src@4006e000 { 464 compatible = "fsl,vf610-src", "syscon"; 465 reg = <0x4006e000 0x1000>; 466 interrupts = <96 IRQ_TYPE_LEVEL_HIGH>; 467 }; 468 }; 469 470 aips1: bus@40080000 { 471 compatible = "fsl,aips-bus", "simple-bus"; 472 #address-cells = <1>; 473 #size-cells = <1>; 474 reg = <0x40080000 0x0007f000>; 475 ranges; 476 477 edma1: dma-controller@40098000 { 478 #dma-cells = <2>; 479 compatible = "fsl,vf610-edma"; 480 reg = <0x40098000 0x2000>, 481 <0x400a1000 0x1000>, 482 <0x400a2000 0x1000>; 483 dma-channels = <32>; 484 interrupts = <10 IRQ_TYPE_LEVEL_HIGH>, 485 <11 IRQ_TYPE_LEVEL_HIGH>; 486 interrupt-names = "edma-tx", "edma-err"; 487 clock-names = "dmamux0", "dmamux1"; 488 clocks = <&clks VF610_CLK_DMAMUX2>, 489 <&clks VF610_CLK_DMAMUX3>; 490 status = "disabled"; 491 }; 492 493 ocotp: ocotp@400a5000 { 494 compatible = "fsl,vf610-ocotp", "syscon"; 495 reg = <0x400a5000 0x1000>; 496 clocks = <&clks VF610_CLK_OCOTP>; 497 }; 498 499 snvs0: snvs@400a7000 { 500 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd"; 501 reg = <0x400a7000 0x2000>; 502 503 snvsrtc: snvs-rtc-lp { 504 compatible = "fsl,sec-v4.0-mon-rtc-lp"; 505 regmap = <&snvs0>; 506 offset = <0x34>; 507 interrupts = <100 IRQ_TYPE_LEVEL_HIGH>; 508 clocks = <&clks VF610_CLK_SNVS>; 509 clock-names = "snvs-rtc"; 510 }; 511 }; 512 513 uart4: serial@400a9000 { 514 compatible = "fsl,vf610-lpuart"; 515 reg = <0x400a9000 0x1000>; 516 interrupts = <65 IRQ_TYPE_LEVEL_HIGH>; 517 clocks = <&clks VF610_CLK_UART4>; 518 clock-names = "ipg"; 519 status = "disabled"; 520 }; 521 522 uart5: serial@400aa000 { 523 compatible = "fsl,vf610-lpuart"; 524 reg = <0x400aa000 0x1000>; 525 interrupts = <66 IRQ_TYPE_LEVEL_HIGH>; 526 clocks = <&clks VF610_CLK_UART5>; 527 clock-names = "ipg"; 528 status = "disabled"; 529 }; 530 531 dspi2: spi@400ac000 { 532 #address-cells = <1>; 533 #size-cells = <0>; 534 compatible = "fsl,vf610-dspi"; 535 reg = <0x400ac000 0x1000>; 536 interrupts = <69 IRQ_TYPE_LEVEL_HIGH>; 537 clocks = <&clks VF610_CLK_DSPI2>; 538 clock-names = "dspi"; 539 spi-num-chipselects = <2>; 540 dmas = <&edma1 0 10>, 541 <&edma1 0 11>; 542 dma-names = "rx", "tx"; 543 status = "disabled"; 544 }; 545 546 dspi3: spi@400ad000 { 547 #address-cells = <1>; 548 #size-cells = <0>; 549 compatible = "fsl,vf610-dspi"; 550 reg = <0x400ad000 0x1000>; 551 interrupts = <70 IRQ_TYPE_LEVEL_HIGH>; 552 clocks = <&clks VF610_CLK_DSPI3>; 553 clock-names = "dspi"; 554 spi-num-chipselects = <2>; 555 dmas = <&edma1 0 12>, 556 <&edma1 0 13>; 557 dma-names = "rx", "tx"; 558 status = "disabled"; 559 }; 560 561 adc1: adc@400bb000 { 562 compatible = "fsl,vf610-adc"; 563 reg = <0x400bb000 0x1000>; 564 interrupts = <54 IRQ_TYPE_LEVEL_HIGH>; 565 clocks = <&clks VF610_CLK_ADC1>; 566 clock-names = "adc"; 567 #io-channel-cells = <1>; 568 status = "disabled"; 569 fsl,adck-max-frequency = <30000000>, <40000000>, 570 <20000000>; 571 }; 572 573 esdhc0: esdhc@400b1000 { 574 compatible = "fsl,imx53-esdhc"; 575 reg = <0x400b1000 0x1000>; 576 interrupts = <27 IRQ_TYPE_LEVEL_HIGH>; 577 clocks = <&clks VF610_CLK_IPG_BUS>, 578 <&clks VF610_CLK_PLATFORM_BUS>, 579 <&clks VF610_CLK_ESDHC0>; 580 clock-names = "ipg", "ahb", "per"; 581 status = "disabled"; 582 }; 583 584 esdhc1: esdhc@400b2000 { 585 compatible = "fsl,imx53-esdhc"; 586 reg = <0x400b2000 0x1000>; 587 interrupts = <28 IRQ_TYPE_LEVEL_HIGH>; 588 clocks = <&clks VF610_CLK_IPG_BUS>, 589 <&clks VF610_CLK_PLATFORM_BUS>, 590 <&clks VF610_CLK_ESDHC1>; 591 clock-names = "ipg", "ahb", "per"; 592 status = "disabled"; 593 }; 594 595 usbh1: usb@400b4000 { 596 compatible = "fsl,vf610-usb", "fsl,imx27-usb"; 597 reg = <0x400b4000 0x800>; 598 interrupts = <76 IRQ_TYPE_LEVEL_HIGH>; 599 clocks = <&clks VF610_CLK_USBC1>; 600 fsl,usbphy = <&usbphy1>; 601 fsl,usbmisc = <&usbmisc1 0>; 602 dr_mode = "host"; 603 status = "disabled"; 604 }; 605 606 usbmisc1: usb@400b4800 { 607 #index-cells = <1>; 608 compatible = "fsl,vf610-usbmisc"; 609 reg = <0x400b4800 0x200>; 610 clocks = <&clks VF610_CLK_USBC1>; 611 status = "disabled"; 612 }; 613 614 ftm: ftm@400b8000 { 615 compatible = "fsl,ftm-timer"; 616 reg = <0x400b8000 0x1000 0x400b9000 0x1000>; 617 interrupts = <44 IRQ_TYPE_LEVEL_HIGH>; 618 clock-names = "ftm-evt", "ftm-src", 619 "ftm-evt-counter-en", "ftm-src-counter-en"; 620 clocks = <&clks VF610_CLK_FTM2>, 621 <&clks VF610_CLK_FTM3>, 622 <&clks VF610_CLK_FTM2_EXT_FIX_EN>, 623 <&clks VF610_CLK_FTM3_EXT_FIX_EN>; 624 status = "disabled"; 625 }; 626 627 qspi1: spi@400c4000 { 628 #address-cells = <1>; 629 #size-cells = <0>; 630 compatible = "fsl,vf610-qspi"; 631 reg = <0x400c4000 0x1000>, <0x50000000 0x10000000>; 632 reg-names = "QuadSPI", "QuadSPI-memory"; 633 interrupts = <25 IRQ_TYPE_LEVEL_HIGH>; 634 clocks = <&clks VF610_CLK_QSPI1_EN>, 635 <&clks VF610_CLK_QSPI1>; 636 clock-names = "qspi_en", "qspi"; 637 status = "disabled"; 638 }; 639 640 dac0: dac@400cc000 { 641 compatible = "fsl,vf610-dac"; 642 reg = <0x400cc000 1000>; 643 interrupts = <55 IRQ_TYPE_LEVEL_HIGH>; 644 clock-names = "dac"; 645 clocks = <&clks VF610_CLK_DAC0>; 646 status = "disabled"; 647 }; 648 649 dac1: dac@400cd000 { 650 compatible = "fsl,vf610-dac"; 651 reg = <0x400cd000 1000>; 652 interrupts = <56 IRQ_TYPE_LEVEL_HIGH>; 653 clock-names = "dac"; 654 clocks = <&clks VF610_CLK_DAC1>; 655 status = "disabled"; 656 }; 657 658 fec0: ethernet@400d0000 { 659 compatible = "fsl,mvf600-fec"; 660 reg = <0x400d0000 0x1000>; 661 interrupts = <78 IRQ_TYPE_LEVEL_HIGH>; 662 clocks = <&clks VF610_CLK_ENET0>, 663 <&clks VF610_CLK_ENET0>, 664 <&clks VF610_CLK_ENET>; 665 clock-names = "ipg", "ahb", "ptp"; 666 status = "disabled"; 667 }; 668 669 fec1: ethernet@400d1000 { 670 compatible = "fsl,mvf600-fec"; 671 reg = <0x400d1000 0x1000>; 672 interrupts = <79 IRQ_TYPE_LEVEL_HIGH>; 673 clocks = <&clks VF610_CLK_ENET1>, 674 <&clks VF610_CLK_ENET1>, 675 <&clks VF610_CLK_ENET>; 676 clock-names = "ipg", "ahb", "ptp"; 677 status = "disabled"; 678 }; 679 680 can1: can@400d4000 { 681 compatible = "fsl,vf610-flexcan"; 682 reg = <0x400d4000 0x4000>; 683 interrupts = <59 IRQ_TYPE_LEVEL_HIGH>; 684 clocks = <&clks VF610_CLK_FLEXCAN1>, 685 <&clks VF610_CLK_FLEXCAN1>; 686 clock-names = "ipg", "per"; 687 status = "disabled"; 688 }; 689 690 nfc: nand@400e0000 { 691 #address-cells = <1>; 692 #size-cells = <0>; 693 compatible = "fsl,vf610-nfc"; 694 reg = <0x400e0000 0x4000>; 695 interrupts = <83 IRQ_TYPE_LEVEL_HIGH>; 696 clocks = <&clks VF610_CLK_NFC>; 697 clock-names = "nfc"; 698 status = "disabled"; 699 }; 700 701 i2c2: i2c@400e6000 { 702 #address-cells = <1>; 703 #size-cells = <0>; 704 compatible = "fsl,vf610-i2c"; 705 reg = <0x400e6000 0x1000>; 706 interrupts = <73 IRQ_TYPE_LEVEL_HIGH>; 707 clocks = <&clks VF610_CLK_I2C2>; 708 clock-names = "ipg"; 709 dmas = <&edma0 1 36>, 710 <&edma0 1 37>; 711 dma-names = "rx","tx"; 712 status = "disabled"; 713 }; 714 715 i2c3: i2c@400e7000 { 716 #address-cells = <1>; 717 #size-cells = <0>; 718 compatible = "fsl,vf610-i2c"; 719 reg = <0x400e7000 0x1000>; 720 interrupts = <74 IRQ_TYPE_LEVEL_HIGH>; 721 clocks = <&clks VF610_CLK_I2C3>; 722 clock-names = "ipg"; 723 dmas = <&edma0 1 38>, 724 <&edma0 1 39>; 725 dma-names = "rx","tx"; 726 status = "disabled"; 727 }; 728 729 crypto: crypto@400f0000 { 730 compatible = "fsl,sec-v4.0"; 731 #address-cells = <1>; 732 #size-cells = <1>; 733 reg = <0x400f0000 0x9000>; 734 ranges = <0 0x400f0000 0x9000>; 735 clocks = <&clks VF610_CLK_CAAM>; 736 clock-names = "ipg"; 737 738 sec_jr0: jr0@1000 { 739 compatible = "fsl,sec-v4.0-job-ring"; 740 reg = <0x1000 0x1000>; 741 interrupts = <102 IRQ_TYPE_LEVEL_HIGH>; 742 }; 743 744 sec_jr1: jr1@2000 { 745 compatible = "fsl,sec-v4.0-job-ring"; 746 reg = <0x2000 0x1000>; 747 interrupts = <102 IRQ_TYPE_LEVEL_HIGH>; 748 }; 749 }; 750 }; 751 }; 752}; 753