1 /*
2 * Copyright 2019 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22 #include "ctxgf100.h"
23
24 static void
ga102_grctx_generate_sm_id(struct gf100_gr * gr,int gpc,int tpc,int sm)25 ga102_grctx_generate_sm_id(struct gf100_gr *gr, int gpc, int tpc, int sm)
26 {
27 struct nvkm_device *device = gr->base.engine.subdev.device;
28
29 tpc = gv100_gr_nonpes_aware_tpc(gr, gpc, tpc);
30
31 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x608), sm);
32 }
33
34 static void
ga102_grctx_generate_unkn(struct gf100_gr * gr)35 ga102_grctx_generate_unkn(struct gf100_gr *gr)
36 {
37 struct nvkm_device *device = gr->base.engine.subdev.device;
38
39 nvkm_mask(device, 0x41980c, 0x00000010, 0x00000010);
40 nvkm_mask(device, 0x41be08, 0x00000004, 0x00000004);
41 }
42
43 static void
ga102_grctx_generate_r419ea8(struct gf100_gr * gr)44 ga102_grctx_generate_r419ea8(struct gf100_gr *gr)
45 {
46 struct nvkm_device *device = gr->base.engine.subdev.device;
47
48 nvkm_wr32(device, 0x419ea8, nvkm_rd32(device, 0x504728) | 0x08000000);
49 }
50
51 const struct gf100_grctx_func
52 ga102_grctx = {
53 .main = gf100_grctx_generate_main,
54 .unkn = ga102_grctx_generate_unkn,
55 .bundle = gm107_grctx_generate_bundle,
56 .bundle_size = 0x3000,
57 .bundle_min_gpm_fifo_depth = 0x180,
58 .bundle_token_limit = 0x1140,
59 .pagepool = gp100_grctx_generate_pagepool,
60 .pagepool_size = 0x20000,
61 .attrib_cb_size = gp102_grctx_generate_attrib_cb_size,
62 .attrib_cb = gv100_grctx_generate_attrib_cb,
63 .attrib = gv100_grctx_generate_attrib,
64 .attrib_nr_max = 0x800,
65 .attrib_nr = 0x4a1,
66 .alpha_nr_max = 0xc00,
67 .alpha_nr = 0x800,
68 .unknown_size = 0x80000,
69 .unknown = tu102_grctx_generate_unknown,
70 .gfxp_nr = 0xd28,
71 .sm_id = ga102_grctx_generate_sm_id,
72 .skip_pd_num_tpc_per_gpc = true,
73 .rop_mapping = gv100_grctx_generate_rop_mapping,
74 .r406500 = gm200_grctx_generate_r406500,
75 .r400088 = gv100_grctx_generate_r400088,
76 .r419ea8 = ga102_grctx_generate_r419ea8,
77 };
78