1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3 * Framework and drivers for configuring and reading different PHYs
4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c
5 *
6 * Author: Andy Fleming
7 *
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
9 */
10
11 #ifndef __PHY_H
12 #define __PHY_H
13
14 #include <linux/compiler.h>
15 #include <linux/spinlock.h>
16 #include <linux/ethtool.h>
17 #include <linux/linkmode.h>
18 #include <linux/netlink.h>
19 #include <linux/mdio.h>
20 #include <linux/mii.h>
21 #include <linux/mii_timestamper.h>
22 #include <linux/module.h>
23 #include <linux/timer.h>
24 #include <linux/workqueue.h>
25 #include <linux/mod_devicetable.h>
26 #include <linux/u64_stats_sync.h>
27 #include <linux/irqreturn.h>
28 #include <linux/iopoll.h>
29 #include <linux/refcount.h>
30
31 #include <linux/atomic.h>
32
33 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
34 SUPPORTED_TP | \
35 SUPPORTED_MII)
36
37 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
38 SUPPORTED_10baseT_Full)
39
40 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
41 SUPPORTED_100baseT_Full)
42
43 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
44 SUPPORTED_1000baseT_Full)
45
46 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init;
47 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init;
48 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1s_p2mp_features) __ro_after_init;
49 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init;
50 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init;
51 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init;
52 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init;
53 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init;
54 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init;
55 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap1_features) __ro_after_init;
56
57 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features)
58 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features)
59 #define PHY_BASIC_T1S_P2MP_FEATURES ((unsigned long *)&phy_basic_t1s_p2mp_features)
60 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features)
61 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features)
62 #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features)
63 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features)
64 #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features)
65 #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features)
66 #define PHY_EEE_CAP1_FEATURES ((unsigned long *)&phy_eee_cap1_features)
67
68 extern const int phy_basic_ports_array[3];
69 extern const int phy_fibre_port_array[1];
70 extern const int phy_all_ports_features_array[7];
71 extern const int phy_10_100_features_array[4];
72 extern const int phy_basic_t1_features_array[3];
73 extern const int phy_basic_t1s_p2mp_features_array[2];
74 extern const int phy_gbit_features_array[2];
75 extern const int phy_10gbit_features_array[1];
76
77 /*
78 * Set phydev->irq to PHY_POLL if interrupts are not supported,
79 * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if
80 * the attached MAC driver handles the interrupt
81 */
82 #define PHY_POLL -1
83 #define PHY_MAC_INTERRUPT -2
84
85 #define PHY_IS_INTERNAL 0x00000001
86 #define PHY_RST_AFTER_CLK_EN 0x00000002
87 #define PHY_POLL_CABLE_TEST 0x00000004
88 #define MDIO_DEVICE_IS_PHY 0x80000000
89
90 /**
91 * enum phy_interface_t - Interface Mode definitions
92 *
93 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch
94 * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined
95 * @PHY_INTERFACE_MODE_MII: Media-independent interface
96 * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface
97 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface
98 * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface
99 * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface
100 * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface
101 * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role
102 * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface
103 * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay
104 * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay
105 * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay
106 * @PHY_INTERFACE_MODE_RTBI: Reduced TBI
107 * @PHY_INTERFACE_MODE_SMII: Serial MII
108 * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface
109 * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface
110 * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax
111 * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII
112 * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII
113 * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX
114 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX
115 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX
116 * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR
117 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI
118 * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface
119 * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR
120 * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR
121 * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII
122 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN
123 * @PHY_INTERFACE_MODE_QUSGMII: Quad Universal SGMII
124 * @PHY_INTERFACE_MODE_1000BASEKX: 1000Base-KX - with Clause 73 AN
125 * @PHY_INTERFACE_MODE_MAX: Book keeping
126 *
127 * Describes the interface between the MAC and PHY.
128 */
129 typedef enum {
130 PHY_INTERFACE_MODE_NA,
131 PHY_INTERFACE_MODE_INTERNAL,
132 PHY_INTERFACE_MODE_MII,
133 PHY_INTERFACE_MODE_GMII,
134 PHY_INTERFACE_MODE_SGMII,
135 PHY_INTERFACE_MODE_TBI,
136 PHY_INTERFACE_MODE_REVMII,
137 PHY_INTERFACE_MODE_RMII,
138 PHY_INTERFACE_MODE_REVRMII,
139 PHY_INTERFACE_MODE_RGMII,
140 PHY_INTERFACE_MODE_RGMII_ID,
141 PHY_INTERFACE_MODE_RGMII_RXID,
142 PHY_INTERFACE_MODE_RGMII_TXID,
143 PHY_INTERFACE_MODE_RTBI,
144 PHY_INTERFACE_MODE_SMII,
145 PHY_INTERFACE_MODE_XGMII,
146 PHY_INTERFACE_MODE_XLGMII,
147 PHY_INTERFACE_MODE_MOCA,
148 PHY_INTERFACE_MODE_QSGMII,
149 PHY_INTERFACE_MODE_TRGMII,
150 PHY_INTERFACE_MODE_100BASEX,
151 PHY_INTERFACE_MODE_1000BASEX,
152 PHY_INTERFACE_MODE_2500BASEX,
153 PHY_INTERFACE_MODE_5GBASER,
154 PHY_INTERFACE_MODE_RXAUI,
155 PHY_INTERFACE_MODE_XAUI,
156 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */
157 PHY_INTERFACE_MODE_10GBASER,
158 PHY_INTERFACE_MODE_25GBASER,
159 PHY_INTERFACE_MODE_USXGMII,
160 /* 10GBASE-KR - with Clause 73 AN */
161 PHY_INTERFACE_MODE_10GKR,
162 PHY_INTERFACE_MODE_QUSGMII,
163 PHY_INTERFACE_MODE_1000BASEKX,
164 PHY_INTERFACE_MODE_MAX,
165 } phy_interface_t;
166
167 /* PHY interface mode bitmap handling */
168 #define DECLARE_PHY_INTERFACE_MASK(name) \
169 DECLARE_BITMAP(name, PHY_INTERFACE_MODE_MAX)
170
phy_interface_zero(unsigned long * intf)171 static inline void phy_interface_zero(unsigned long *intf)
172 {
173 bitmap_zero(intf, PHY_INTERFACE_MODE_MAX);
174 }
175
phy_interface_empty(const unsigned long * intf)176 static inline bool phy_interface_empty(const unsigned long *intf)
177 {
178 return bitmap_empty(intf, PHY_INTERFACE_MODE_MAX);
179 }
180
phy_interface_and(unsigned long * dst,const unsigned long * a,const unsigned long * b)181 static inline void phy_interface_and(unsigned long *dst, const unsigned long *a,
182 const unsigned long *b)
183 {
184 bitmap_and(dst, a, b, PHY_INTERFACE_MODE_MAX);
185 }
186
phy_interface_or(unsigned long * dst,const unsigned long * a,const unsigned long * b)187 static inline void phy_interface_or(unsigned long *dst, const unsigned long *a,
188 const unsigned long *b)
189 {
190 bitmap_or(dst, a, b, PHY_INTERFACE_MODE_MAX);
191 }
192
phy_interface_set_rgmii(unsigned long * intf)193 static inline void phy_interface_set_rgmii(unsigned long *intf)
194 {
195 __set_bit(PHY_INTERFACE_MODE_RGMII, intf);
196 __set_bit(PHY_INTERFACE_MODE_RGMII_ID, intf);
197 __set_bit(PHY_INTERFACE_MODE_RGMII_RXID, intf);
198 __set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf);
199 }
200
201 /*
202 * phy_supported_speeds - return all speeds currently supported by a PHY device
203 */
204 unsigned int phy_supported_speeds(struct phy_device *phy,
205 unsigned int *speeds,
206 unsigned int size);
207
208 /**
209 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode
210 * @interface: enum phy_interface_t value
211 *
212 * Description: maps enum &phy_interface_t defined in this file
213 * into the device tree binding of 'phy-mode', so that Ethernet
214 * device driver can get PHY interface from device tree.
215 */
phy_modes(phy_interface_t interface)216 static inline const char *phy_modes(phy_interface_t interface)
217 {
218 switch (interface) {
219 case PHY_INTERFACE_MODE_NA:
220 return "";
221 case PHY_INTERFACE_MODE_INTERNAL:
222 return "internal";
223 case PHY_INTERFACE_MODE_MII:
224 return "mii";
225 case PHY_INTERFACE_MODE_GMII:
226 return "gmii";
227 case PHY_INTERFACE_MODE_SGMII:
228 return "sgmii";
229 case PHY_INTERFACE_MODE_TBI:
230 return "tbi";
231 case PHY_INTERFACE_MODE_REVMII:
232 return "rev-mii";
233 case PHY_INTERFACE_MODE_RMII:
234 return "rmii";
235 case PHY_INTERFACE_MODE_REVRMII:
236 return "rev-rmii";
237 case PHY_INTERFACE_MODE_RGMII:
238 return "rgmii";
239 case PHY_INTERFACE_MODE_RGMII_ID:
240 return "rgmii-id";
241 case PHY_INTERFACE_MODE_RGMII_RXID:
242 return "rgmii-rxid";
243 case PHY_INTERFACE_MODE_RGMII_TXID:
244 return "rgmii-txid";
245 case PHY_INTERFACE_MODE_RTBI:
246 return "rtbi";
247 case PHY_INTERFACE_MODE_SMII:
248 return "smii";
249 case PHY_INTERFACE_MODE_XGMII:
250 return "xgmii";
251 case PHY_INTERFACE_MODE_XLGMII:
252 return "xlgmii";
253 case PHY_INTERFACE_MODE_MOCA:
254 return "moca";
255 case PHY_INTERFACE_MODE_QSGMII:
256 return "qsgmii";
257 case PHY_INTERFACE_MODE_TRGMII:
258 return "trgmii";
259 case PHY_INTERFACE_MODE_1000BASEX:
260 return "1000base-x";
261 case PHY_INTERFACE_MODE_1000BASEKX:
262 return "1000base-kx";
263 case PHY_INTERFACE_MODE_2500BASEX:
264 return "2500base-x";
265 case PHY_INTERFACE_MODE_5GBASER:
266 return "5gbase-r";
267 case PHY_INTERFACE_MODE_RXAUI:
268 return "rxaui";
269 case PHY_INTERFACE_MODE_XAUI:
270 return "xaui";
271 case PHY_INTERFACE_MODE_10GBASER:
272 return "10gbase-r";
273 case PHY_INTERFACE_MODE_25GBASER:
274 return "25gbase-r";
275 case PHY_INTERFACE_MODE_USXGMII:
276 return "usxgmii";
277 case PHY_INTERFACE_MODE_10GKR:
278 return "10gbase-kr";
279 case PHY_INTERFACE_MODE_100BASEX:
280 return "100base-x";
281 case PHY_INTERFACE_MODE_QUSGMII:
282 return "qusgmii";
283 default:
284 return "unknown";
285 }
286 }
287
288 #define PHY_INIT_TIMEOUT 100000
289 #define PHY_FORCE_TIMEOUT 10
290
291 #define PHY_MAX_ADDR 32
292
293 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */
294 #define PHY_ID_FMT "%s:%02x"
295
296 #define MII_BUS_ID_SIZE 61
297
298 struct device;
299 struct phylink;
300 struct sfp_bus;
301 struct sfp_upstream_ops;
302 struct sk_buff;
303
304 /**
305 * struct mdio_bus_stats - Statistics counters for MDIO busses
306 * @transfers: Total number of transfers, i.e. @writes + @reads
307 * @errors: Number of MDIO transfers that returned an error
308 * @writes: Number of write transfers
309 * @reads: Number of read transfers
310 * @syncp: Synchronisation for incrementing statistics
311 */
312 struct mdio_bus_stats {
313 u64_stats_t transfers;
314 u64_stats_t errors;
315 u64_stats_t writes;
316 u64_stats_t reads;
317 /* Must be last, add new statistics above */
318 struct u64_stats_sync syncp;
319 };
320
321 /**
322 * struct phy_package_shared - Shared information in PHY packages
323 * @addr: Common PHY address used to combine PHYs in one package
324 * @refcnt: Number of PHYs connected to this shared data
325 * @flags: Initialization of PHY package
326 * @priv_size: Size of the shared private data @priv
327 * @priv: Driver private data shared across a PHY package
328 *
329 * Represents a shared structure between different phydev's in the same
330 * package, for example a quad PHY. See phy_package_join() and
331 * phy_package_leave().
332 */
333 struct phy_package_shared {
334 int addr;
335 refcount_t refcnt;
336 unsigned long flags;
337 size_t priv_size;
338
339 /* private data pointer */
340 /* note that this pointer is shared between different phydevs and
341 * the user has to take care of appropriate locking. It is allocated
342 * and freed automatically by phy_package_join() and
343 * phy_package_leave().
344 */
345 void *priv;
346 };
347
348 /* used as bit number in atomic bitops */
349 #define PHY_SHARED_F_INIT_DONE 0
350 #define PHY_SHARED_F_PROBE_DONE 1
351
352 /**
353 * struct mii_bus - Represents an MDIO bus
354 *
355 * @owner: Who owns this device
356 * @name: User friendly name for this MDIO device, or driver name
357 * @id: Unique identifier for this bus, typical from bus hierarchy
358 * @priv: Driver private data
359 *
360 * The Bus class for PHYs. Devices which provide access to
361 * PHYs should register using this structure
362 */
363 struct mii_bus {
364 struct module *owner;
365 const char *name;
366 char id[MII_BUS_ID_SIZE];
367 void *priv;
368 /** @read: Perform a read transfer on the bus */
369 int (*read)(struct mii_bus *bus, int addr, int regnum);
370 /** @write: Perform a write transfer on the bus */
371 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
372 /** @read_c45: Perform a C45 read transfer on the bus */
373 int (*read_c45)(struct mii_bus *bus, int addr, int devnum, int regnum);
374 /** @write_c45: Perform a C45 write transfer on the bus */
375 int (*write_c45)(struct mii_bus *bus, int addr, int devnum,
376 int regnum, u16 val);
377 /** @reset: Perform a reset of the bus */
378 int (*reset)(struct mii_bus *bus);
379
380 /** @stats: Statistic counters per device on the bus */
381 struct mdio_bus_stats stats[PHY_MAX_ADDR];
382
383 /**
384 * @mdio_lock: A lock to ensure that only one thing can read/write
385 * the MDIO bus at a time
386 */
387 struct mutex mdio_lock;
388
389 /** @parent: Parent device of this bus */
390 struct device *parent;
391 /** @state: State of bus structure */
392 enum {
393 MDIOBUS_ALLOCATED = 1,
394 MDIOBUS_REGISTERED,
395 MDIOBUS_UNREGISTERED,
396 MDIOBUS_RELEASED,
397 } state;
398
399 /** @dev: Kernel device representation */
400 struct device dev;
401
402 /** @mdio_map: list of all MDIO devices on bus */
403 struct mdio_device *mdio_map[PHY_MAX_ADDR];
404
405 /** @phy_mask: PHY addresses to be ignored when probing */
406 u32 phy_mask;
407
408 /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */
409 u32 phy_ignore_ta_mask;
410
411 /**
412 * @irq: An array of interrupts, each PHY's interrupt at the index
413 * matching its address
414 */
415 int irq[PHY_MAX_ADDR];
416
417 /** @reset_delay_us: GPIO reset pulse width in microseconds */
418 int reset_delay_us;
419 /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */
420 int reset_post_delay_us;
421 /** @reset_gpiod: Reset GPIO descriptor pointer */
422 struct gpio_desc *reset_gpiod;
423
424 /** @shared_lock: protect access to the shared element */
425 struct mutex shared_lock;
426
427 /** @shared: shared state across different PHYs */
428 struct phy_package_shared *shared[PHY_MAX_ADDR];
429 };
430 #define to_mii_bus(d) container_of(d, struct mii_bus, dev)
431
432 struct mii_bus *mdiobus_alloc_size(size_t size);
433
434 /**
435 * mdiobus_alloc - Allocate an MDIO bus structure
436 *
437 * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready
438 * for the driver to register the bus.
439 */
mdiobus_alloc(void)440 static inline struct mii_bus *mdiobus_alloc(void)
441 {
442 return mdiobus_alloc_size(0);
443 }
444
445 int __mdiobus_register(struct mii_bus *bus, struct module *owner);
446 int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus,
447 struct module *owner);
448 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
449 #define devm_mdiobus_register(dev, bus) \
450 __devm_mdiobus_register(dev, bus, THIS_MODULE)
451
452 void mdiobus_unregister(struct mii_bus *bus);
453 void mdiobus_free(struct mii_bus *bus);
454 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
devm_mdiobus_alloc(struct device * dev)455 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
456 {
457 return devm_mdiobus_alloc_size(dev, 0);
458 }
459
460 struct mii_bus *mdio_find_bus(const char *mdio_name);
461 struct phy_device *mdiobus_scan_c22(struct mii_bus *bus, int addr);
462
463 #define PHY_INTERRUPT_DISABLED false
464 #define PHY_INTERRUPT_ENABLED true
465
466 /**
467 * enum phy_state - PHY state machine states:
468 *
469 * @PHY_DOWN: PHY device and driver are not ready for anything. probe
470 * should be called if and only if the PHY is in this state,
471 * given that the PHY device exists.
472 * - PHY driver probe function will set the state to @PHY_READY
473 *
474 * @PHY_READY: PHY is ready to send and receive packets, but the
475 * controller is not. By default, PHYs which do not implement
476 * probe will be set to this state by phy_probe().
477 * - start will set the state to UP
478 *
479 * @PHY_UP: The PHY and attached device are ready to do work.
480 * Interrupts should be started here.
481 * - timer moves to @PHY_NOLINK or @PHY_RUNNING
482 *
483 * @PHY_NOLINK: PHY is up, but not currently plugged in.
484 * - irq or timer will set @PHY_RUNNING if link comes back
485 * - phy_stop moves to @PHY_HALTED
486 *
487 * @PHY_RUNNING: PHY is currently up, running, and possibly sending
488 * and/or receiving packets
489 * - irq or timer will set @PHY_NOLINK if link goes down
490 * - phy_stop moves to @PHY_HALTED
491 *
492 * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending
493 * is not expected to work, carrier will be indicated as down. PHY will be
494 * poll once per second, or on interrupt for it current state.
495 * Once complete, move to UP to restart the PHY.
496 * - phy_stop aborts the running test and moves to @PHY_HALTED
497 *
498 * @PHY_HALTED: PHY is up, but no polling or interrupts are done. Or
499 * PHY is in an error state.
500 * - phy_start moves to @PHY_UP
501 */
502 enum phy_state {
503 PHY_DOWN = 0,
504 PHY_READY,
505 PHY_HALTED,
506 PHY_UP,
507 PHY_RUNNING,
508 PHY_NOLINK,
509 PHY_CABLETEST,
510 };
511
512 #define MDIO_MMD_NUM 32
513
514 /**
515 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
516 * @devices_in_package: IEEE 802.3 devices in package register value.
517 * @mmds_present: bit vector of MMDs present.
518 * @device_ids: The device identifer for each present device.
519 */
520 struct phy_c45_device_ids {
521 u32 devices_in_package;
522 u32 mmds_present;
523 u32 device_ids[MDIO_MMD_NUM];
524 };
525
526 struct macsec_context;
527 struct macsec_ops;
528
529 /**
530 * struct phy_device - An instance of a PHY
531 *
532 * @mdio: MDIO bus this PHY is on
533 * @drv: Pointer to the driver for this PHY instance
534 * @devlink: Create a link between phy dev and mac dev, if the external phy
535 * used by current mac interface is managed by another mac interface.
536 * @phy_id: UID for this device found during discovery
537 * @c45_ids: 802.3-c45 Device Identifiers if is_c45.
538 * @is_c45: Set to true if this PHY uses clause 45 addressing.
539 * @is_internal: Set to true if this PHY is internal to a MAC.
540 * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc.
541 * @is_gigabit_capable: Set to true if PHY supports 1000Mbps
542 * @has_fixups: Set to true if this PHY has fixups/quirks.
543 * @suspended: Set to true if this PHY has been suspended successfully.
544 * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus.
545 * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal.
546 * @loopback_enabled: Set true if this PHY has been loopbacked successfully.
547 * @downshifted_rate: Set true if link speed has been downshifted.
548 * @is_on_sfp_module: Set true if PHY is located on an SFP module.
549 * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY
550 * @state: State of the PHY for management purposes
551 * @dev_flags: Device-specific flags used by the PHY driver.
552 *
553 * - Bits [15:0] are free to use by the PHY driver to communicate
554 * driver specific behavior.
555 * - Bits [23:16] are currently reserved for future use.
556 * - Bits [31:24] are reserved for defining generic
557 * PHY driver behavior.
558 * @irq: IRQ number of the PHY's interrupt (-1 if none)
559 * @phy_timer: The timer for handling the state machine
560 * @phylink: Pointer to phylink instance for this PHY
561 * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached
562 * @sfp_bus: SFP bus attached to this PHY's fiber port
563 * @attached_dev: The attached enet driver's device instance ptr
564 * @adjust_link: Callback for the enet controller to respond to changes: in the
565 * link state.
566 * @phy_link_change: Callback for phylink for notification of link change
567 * @macsec_ops: MACsec offloading ops.
568 *
569 * @speed: Current link speed
570 * @duplex: Current duplex
571 * @port: Current port
572 * @pause: Current pause
573 * @asym_pause: Current asymmetric pause
574 * @supported: Combined MAC/PHY supported linkmodes
575 * @advertising: Currently advertised linkmodes
576 * @adv_old: Saved advertised while power saving for WoL
577 * @supported_eee: supported PHY EEE linkmodes
578 * @advertising_eee: Currently advertised EEE linkmodes
579 * @eee_enabled: Flag indicating whether the EEE feature is enabled
580 * @lp_advertising: Current link partner advertised linkmodes
581 * @host_interfaces: PHY interface modes supported by host
582 * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited
583 * @autoneg: Flag autoneg being used
584 * @rate_matching: Current rate matching mode
585 * @link: Current link state
586 * @autoneg_complete: Flag auto negotiation of the link has completed
587 * @mdix: Current crossover
588 * @mdix_ctrl: User setting of crossover
589 * @pma_extable: Cached value of PMA/PMD Extended Abilities Register
590 * @interrupts: Flag interrupts have been enabled
591 * @irq_suspended: Flag indicating PHY is suspended and therefore interrupt
592 * handling shall be postponed until PHY has resumed
593 * @irq_rerun: Flag indicating interrupts occurred while PHY was suspended,
594 * requiring a rerun of the interrupt handler after resume
595 * @interface: enum phy_interface_t value
596 * @skb: Netlink message for cable diagnostics
597 * @nest: Netlink nest used for cable diagnostics
598 * @ehdr: nNtlink header for cable diagnostics
599 * @phy_led_triggers: Array of LED triggers
600 * @phy_num_led_triggers: Number of triggers in @phy_led_triggers
601 * @led_link_trigger: LED trigger for link up/down
602 * @last_triggered: last LED trigger for link speed
603 * @master_slave_set: User requested master/slave configuration
604 * @master_slave_get: Current master/slave advertisement
605 * @master_slave_state: Current master/slave configuration
606 * @mii_ts: Pointer to time stamper callbacks
607 * @psec: Pointer to Power Sourcing Equipment control struct
608 * @lock: Mutex for serialization access to PHY
609 * @state_queue: Work queue for state machine
610 * @link_down_events: Number of times link was lost
611 * @shared: Pointer to private data shared by phys in one package
612 * @priv: Pointer to driver private data
613 *
614 * interrupts currently only supports enabled or disabled,
615 * but could be changed in the future to support enabling
616 * and disabling specific interrupts
617 *
618 * Contains some infrastructure for polling and interrupt
619 * handling, as well as handling shifts in PHY hardware state
620 */
621 struct phy_device {
622 struct mdio_device mdio;
623
624 /* Information about the PHY type */
625 /* And management functions */
626 struct phy_driver *drv;
627
628 struct device_link *devlink;
629
630 u32 phy_id;
631
632 struct phy_c45_device_ids c45_ids;
633 unsigned is_c45:1;
634 unsigned is_internal:1;
635 unsigned is_pseudo_fixed_link:1;
636 unsigned is_gigabit_capable:1;
637 unsigned has_fixups:1;
638 unsigned suspended:1;
639 unsigned suspended_by_mdio_bus:1;
640 unsigned sysfs_links:1;
641 unsigned loopback_enabled:1;
642 unsigned downshifted_rate:1;
643 unsigned is_on_sfp_module:1;
644 unsigned mac_managed_pm:1;
645
646 unsigned autoneg:1;
647 /* The most recently read link state */
648 unsigned link:1;
649 unsigned autoneg_complete:1;
650
651 /* Interrupts are enabled */
652 unsigned interrupts:1;
653 unsigned irq_suspended:1;
654 unsigned irq_rerun:1;
655
656 int rate_matching;
657
658 enum phy_state state;
659
660 u32 dev_flags;
661
662 phy_interface_t interface;
663
664 /*
665 * forced speed & duplex (no autoneg)
666 * partner speed & duplex & pause (autoneg)
667 */
668 int speed;
669 int duplex;
670 int port;
671 int pause;
672 int asym_pause;
673 u8 master_slave_get;
674 u8 master_slave_set;
675 u8 master_slave_state;
676
677 /* Union of PHY and Attached devices' supported link modes */
678 /* See ethtool.h for more info */
679 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
680 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising);
681 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising);
682 /* used with phy_speed_down */
683 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old);
684 /* used for eee validation */
685 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_eee);
686 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising_eee);
687 bool eee_enabled;
688
689 /* Host supported PHY interface types. Should be ignored if empty. */
690 DECLARE_PHY_INTERFACE_MASK(host_interfaces);
691
692 /* Energy efficient ethernet modes which should be prohibited */
693 u32 eee_broken_modes;
694
695 #ifdef CONFIG_LED_TRIGGER_PHY
696 struct phy_led_trigger *phy_led_triggers;
697 unsigned int phy_num_led_triggers;
698 struct phy_led_trigger *last_triggered;
699
700 struct phy_led_trigger *led_link_trigger;
701 #endif
702
703 /*
704 * Interrupt number for this PHY
705 * -1 means no interrupt
706 */
707 int irq;
708
709 /* private data pointer */
710 /* For use by PHYs to maintain extra state */
711 void *priv;
712
713 /* shared data pointer */
714 /* For use by PHYs inside the same package that need a shared state. */
715 struct phy_package_shared *shared;
716
717 /* Reporting cable test results */
718 struct sk_buff *skb;
719 void *ehdr;
720 struct nlattr *nest;
721
722 /* Interrupt and Polling infrastructure */
723 struct delayed_work state_queue;
724
725 struct mutex lock;
726
727 /* This may be modified under the rtnl lock */
728 bool sfp_bus_attached;
729 struct sfp_bus *sfp_bus;
730 struct phylink *phylink;
731 struct net_device *attached_dev;
732 struct mii_timestamper *mii_ts;
733 struct pse_control *psec;
734
735 u8 mdix;
736 u8 mdix_ctrl;
737
738 int pma_extable;
739
740 unsigned int link_down_events;
741
742 void (*phy_link_change)(struct phy_device *phydev, bool up);
743 void (*adjust_link)(struct net_device *dev);
744
745 #if IS_ENABLED(CONFIG_MACSEC)
746 /* MACsec management functions */
747 const struct macsec_ops *macsec_ops;
748 #endif
749 };
750
751 /* Generic phy_device::dev_flags */
752 #define PHY_F_NO_IRQ 0x80000000
753
to_phy_device(const struct device * dev)754 static inline struct phy_device *to_phy_device(const struct device *dev)
755 {
756 return container_of(to_mdio_device(dev), struct phy_device, mdio);
757 }
758
759 /**
760 * struct phy_tdr_config - Configuration of a TDR raw test
761 *
762 * @first: Distance for first data collection point
763 * @last: Distance for last data collection point
764 * @step: Step between data collection points
765 * @pair: Bitmap of cable pairs to collect data for
766 *
767 * A structure containing possible configuration parameters
768 * for a TDR cable test. The driver does not need to implement
769 * all the parameters, but should report what is actually used.
770 * All distances are in centimeters.
771 */
772 struct phy_tdr_config {
773 u32 first;
774 u32 last;
775 u32 step;
776 s8 pair;
777 };
778 #define PHY_PAIR_ALL -1
779
780 /**
781 * struct phy_plca_cfg - Configuration of the PLCA (Physical Layer Collision
782 * Avoidance) Reconciliation Sublayer.
783 *
784 * @version: read-only PLCA register map version. -1 = not available. Ignored
785 * when setting the configuration. Format is the same as reported by the PLCA
786 * IDVER register (31.CA00). -1 = not available.
787 * @enabled: PLCA configured mode (enabled/disabled). -1 = not available / don't
788 * set. 0 = disabled, anything else = enabled.
789 * @node_id: the PLCA local node identifier. -1 = not available / don't set.
790 * Allowed values [0 .. 254]. 255 = node disabled.
791 * @node_cnt: the PLCA node count (maximum number of nodes having a TO). Only
792 * meaningful for the coordinator (node_id = 0). -1 = not available / don't
793 * set. Allowed values [1 .. 255].
794 * @to_tmr: The value of the PLCA to_timer in bit-times, which determines the
795 * PLCA transmit opportunity window opening. See IEEE802.3 Clause 148 for
796 * more details. The to_timer shall be set equal over all nodes.
797 * -1 = not available / don't set. Allowed values [0 .. 255].
798 * @burst_cnt: controls how many additional frames a node is allowed to send in
799 * single transmit opportunity (TO). The default value of 0 means that the
800 * node is allowed exactly one frame per TO. A value of 1 allows two frames
801 * per TO, and so on. -1 = not available / don't set.
802 * Allowed values [0 .. 255].
803 * @burst_tmr: controls how many bit times to wait for the MAC to send a new
804 * frame before interrupting the burst. This value should be set to a value
805 * greater than the MAC inter-packet gap (which is typically 96 bits).
806 * -1 = not available / don't set. Allowed values [0 .. 255].
807 *
808 * A structure containing configuration parameters for setting/getting the PLCA
809 * RS configuration. The driver does not need to implement all the parameters,
810 * but should report what is actually used.
811 */
812 struct phy_plca_cfg {
813 int version;
814 int enabled;
815 int node_id;
816 int node_cnt;
817 int to_tmr;
818 int burst_cnt;
819 int burst_tmr;
820 };
821
822 /**
823 * struct phy_plca_status - Status of the PLCA (Physical Layer Collision
824 * Avoidance) Reconciliation Sublayer.
825 *
826 * @pst: The PLCA status as reported by the PST bit in the PLCA STATUS
827 * register(31.CA03), indicating BEACON activity.
828 *
829 * A structure containing status information of the PLCA RS configuration.
830 * The driver does not need to implement all the parameters, but should report
831 * what is actually used.
832 */
833 struct phy_plca_status {
834 bool pst;
835 };
836
837 /**
838 * struct phy_driver - Driver structure for a particular PHY type
839 *
840 * @mdiodrv: Data common to all MDIO devices
841 * @phy_id: The result of reading the UID registers of this PHY
842 * type, and ANDing them with the phy_id_mask. This driver
843 * only works for PHYs with IDs which match this field
844 * @name: The friendly name of this PHY type
845 * @phy_id_mask: Defines the important bits of the phy_id
846 * @features: A mandatory list of features (speed, duplex, etc)
847 * supported by this PHY
848 * @flags: A bitfield defining certain other features this PHY
849 * supports (like interrupts)
850 * @driver_data: Static driver data
851 *
852 * All functions are optional. If config_aneg or read_status
853 * are not implemented, the phy core uses the genphy versions.
854 * Note that none of these functions should be called from
855 * interrupt time. The goal is for the bus read/write functions
856 * to be able to block when the bus transaction is happening,
857 * and be freed up by an interrupt (The MPC85xx has this ability,
858 * though it is not currently supported in the driver).
859 */
860 struct phy_driver {
861 struct mdio_driver_common mdiodrv;
862 u32 phy_id;
863 char *name;
864 u32 phy_id_mask;
865 const unsigned long * const features;
866 u32 flags;
867 const void *driver_data;
868
869 /**
870 * @soft_reset: Called to issue a PHY software reset
871 */
872 int (*soft_reset)(struct phy_device *phydev);
873
874 /**
875 * @config_init: Called to initialize the PHY,
876 * including after a reset
877 */
878 int (*config_init)(struct phy_device *phydev);
879
880 /**
881 * @probe: Called during discovery. Used to set
882 * up device-specific structures, if any
883 */
884 int (*probe)(struct phy_device *phydev);
885
886 /**
887 * @get_features: Probe the hardware to determine what
888 * abilities it has. Should only set phydev->supported.
889 */
890 int (*get_features)(struct phy_device *phydev);
891
892 /**
893 * @get_rate_matching: Get the supported type of rate matching for a
894 * particular phy interface. This is used by phy consumers to determine
895 * whether to advertise lower-speed modes for that interface. It is
896 * assumed that if a rate matching mode is supported on an interface,
897 * then that interface's rate can be adapted to all slower link speeds
898 * supported by the phy. If the interface is not supported, this should
899 * return %RATE_MATCH_NONE.
900 */
901 int (*get_rate_matching)(struct phy_device *phydev,
902 phy_interface_t iface);
903
904 /* PHY Power Management */
905 /** @suspend: Suspend the hardware, saving state if needed */
906 int (*suspend)(struct phy_device *phydev);
907 /** @resume: Resume the hardware, restoring state if needed */
908 int (*resume)(struct phy_device *phydev);
909
910 /**
911 * @config_aneg: Configures the advertisement and resets
912 * autonegotiation if phydev->autoneg is on,
913 * forces the speed to the current settings in phydev
914 * if phydev->autoneg is off
915 */
916 int (*config_aneg)(struct phy_device *phydev);
917
918 /** @aneg_done: Determines the auto negotiation result */
919 int (*aneg_done)(struct phy_device *phydev);
920
921 /** @read_status: Determines the negotiated speed and duplex */
922 int (*read_status)(struct phy_device *phydev);
923
924 /**
925 * @config_intr: Enables or disables interrupts.
926 * It should also clear any pending interrupts prior to enabling the
927 * IRQs and after disabling them.
928 */
929 int (*config_intr)(struct phy_device *phydev);
930
931 /** @handle_interrupt: Override default interrupt handling */
932 irqreturn_t (*handle_interrupt)(struct phy_device *phydev);
933
934 /** @remove: Clears up any memory if needed */
935 void (*remove)(struct phy_device *phydev);
936
937 /**
938 * @match_phy_device: Returns true if this is a suitable
939 * driver for the given phydev. If NULL, matching is based on
940 * phy_id and phy_id_mask.
941 */
942 int (*match_phy_device)(struct phy_device *phydev);
943
944 /**
945 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY
946 * register changes to enable Wake on LAN, so set_wol is
947 * provided to be called in the ethernet driver's set_wol
948 * function.
949 */
950 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
951
952 /**
953 * @get_wol: See set_wol, but for checking whether Wake on LAN
954 * is enabled.
955 */
956 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
957
958 /**
959 * @link_change_notify: Called to inform a PHY device driver
960 * when the core is about to change the link state. This
961 * callback is supposed to be used as fixup hook for drivers
962 * that need to take action when the link state
963 * changes. Drivers are by no means allowed to mess with the
964 * PHY device structure in their implementations.
965 */
966 void (*link_change_notify)(struct phy_device *dev);
967
968 /**
969 * @read_mmd: PHY specific driver override for reading a MMD
970 * register. This function is optional for PHY specific
971 * drivers. When not provided, the default MMD read function
972 * will be used by phy_read_mmd(), which will use either a
973 * direct read for Clause 45 PHYs or an indirect read for
974 * Clause 22 PHYs. devnum is the MMD device number within the
975 * PHY device, regnum is the register within the selected MMD
976 * device.
977 */
978 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum);
979
980 /**
981 * @write_mmd: PHY specific driver override for writing a MMD
982 * register. This function is optional for PHY specific
983 * drivers. When not provided, the default MMD write function
984 * will be used by phy_write_mmd(), which will use either a
985 * direct write for Clause 45 PHYs, or an indirect write for
986 * Clause 22 PHYs. devnum is the MMD device number within the
987 * PHY device, regnum is the register within the selected MMD
988 * device. val is the value to be written.
989 */
990 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum,
991 u16 val);
992
993 /** @read_page: Return the current PHY register page number */
994 int (*read_page)(struct phy_device *dev);
995 /** @write_page: Set the current PHY register page number */
996 int (*write_page)(struct phy_device *dev, int page);
997
998 /**
999 * @module_info: Get the size and type of the eeprom contained
1000 * within a plug-in module
1001 */
1002 int (*module_info)(struct phy_device *dev,
1003 struct ethtool_modinfo *modinfo);
1004
1005 /**
1006 * @module_eeprom: Get the eeprom information from the plug-in
1007 * module
1008 */
1009 int (*module_eeprom)(struct phy_device *dev,
1010 struct ethtool_eeprom *ee, u8 *data);
1011
1012 /** @cable_test_start: Start a cable test */
1013 int (*cable_test_start)(struct phy_device *dev);
1014
1015 /** @cable_test_tdr_start: Start a raw TDR cable test */
1016 int (*cable_test_tdr_start)(struct phy_device *dev,
1017 const struct phy_tdr_config *config);
1018
1019 /**
1020 * @cable_test_get_status: Once per second, or on interrupt,
1021 * request the status of the test.
1022 */
1023 int (*cable_test_get_status)(struct phy_device *dev, bool *finished);
1024
1025 /* Get statistics from the PHY using ethtool */
1026 /** @get_sset_count: Number of statistic counters */
1027 int (*get_sset_count)(struct phy_device *dev);
1028 /** @get_strings: Names of the statistic counters */
1029 void (*get_strings)(struct phy_device *dev, u8 *data);
1030 /** @get_stats: Return the statistic counter values */
1031 void (*get_stats)(struct phy_device *dev,
1032 struct ethtool_stats *stats, u64 *data);
1033
1034 /* Get and Set PHY tunables */
1035 /** @get_tunable: Return the value of a tunable */
1036 int (*get_tunable)(struct phy_device *dev,
1037 struct ethtool_tunable *tuna, void *data);
1038 /** @set_tunable: Set the value of a tunable */
1039 int (*set_tunable)(struct phy_device *dev,
1040 struct ethtool_tunable *tuna,
1041 const void *data);
1042 /** @set_loopback: Set the loopback mood of the PHY */
1043 int (*set_loopback)(struct phy_device *dev, bool enable);
1044 /** @get_sqi: Get the signal quality indication */
1045 int (*get_sqi)(struct phy_device *dev);
1046 /** @get_sqi_max: Get the maximum signal quality indication */
1047 int (*get_sqi_max)(struct phy_device *dev);
1048
1049 /* PLCA RS interface */
1050 /** @get_plca_cfg: Return the current PLCA configuration */
1051 int (*get_plca_cfg)(struct phy_device *dev,
1052 struct phy_plca_cfg *plca_cfg);
1053 /** @set_plca_cfg: Set the PLCA configuration */
1054 int (*set_plca_cfg)(struct phy_device *dev,
1055 const struct phy_plca_cfg *plca_cfg);
1056 /** @get_plca_status: Return the current PLCA status info */
1057 int (*get_plca_status)(struct phy_device *dev,
1058 struct phy_plca_status *plca_st);
1059 };
1060 #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \
1061 struct phy_driver, mdiodrv)
1062
1063 #define PHY_ANY_ID "MATCH ANY PHY"
1064 #define PHY_ANY_UID 0xffffffff
1065
1066 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0)
1067 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4)
1068 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10)
1069
1070 /* A Structure for boards to register fixups with the PHY Lib */
1071 struct phy_fixup {
1072 struct list_head list;
1073 char bus_id[MII_BUS_ID_SIZE + 3];
1074 u32 phy_uid;
1075 u32 phy_uid_mask;
1076 int (*run)(struct phy_device *phydev);
1077 };
1078
1079 const char *phy_speed_to_str(int speed);
1080 const char *phy_duplex_to_str(unsigned int duplex);
1081 const char *phy_rate_matching_to_str(int rate_matching);
1082
1083 int phy_interface_num_ports(phy_interface_t interface);
1084
1085 /* A structure for mapping a particular speed and duplex
1086 * combination to a particular SUPPORTED and ADVERTISED value
1087 */
1088 struct phy_setting {
1089 u32 speed;
1090 u8 duplex;
1091 u8 bit;
1092 };
1093
1094 const struct phy_setting *
1095 phy_lookup_setting(int speed, int duplex, const unsigned long *mask,
1096 bool exact);
1097 size_t phy_speeds(unsigned int *speeds, size_t size,
1098 unsigned long *mask);
1099 void of_set_phy_supported(struct phy_device *phydev);
1100 void of_set_phy_eee_broken(struct phy_device *phydev);
1101 int phy_speed_down_core(struct phy_device *phydev);
1102
1103 /**
1104 * phy_is_started - Convenience function to check whether PHY is started
1105 * @phydev: The phy_device struct
1106 */
phy_is_started(struct phy_device * phydev)1107 static inline bool phy_is_started(struct phy_device *phydev)
1108 {
1109 return phydev->state >= PHY_UP;
1110 }
1111
1112 void phy_resolve_aneg_pause(struct phy_device *phydev);
1113 void phy_resolve_aneg_linkmode(struct phy_device *phydev);
1114 void phy_check_downshift(struct phy_device *phydev);
1115
1116 /**
1117 * phy_read - Convenience function for reading a given PHY register
1118 * @phydev: the phy_device struct
1119 * @regnum: register number to read
1120 *
1121 * NOTE: MUST NOT be called from interrupt context,
1122 * because the bus read/write functions may wait for an interrupt
1123 * to conclude the operation.
1124 */
phy_read(struct phy_device * phydev,u32 regnum)1125 static inline int phy_read(struct phy_device *phydev, u32 regnum)
1126 {
1127 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
1128 }
1129
1130 #define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \
1131 timeout_us, sleep_before_read) \
1132 ({ \
1133 int __ret = read_poll_timeout(phy_read, val, (cond) || val < 0, \
1134 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \
1135 if (val < 0) \
1136 __ret = val; \
1137 if (__ret) \
1138 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
1139 __ret; \
1140 })
1141
1142
1143 /**
1144 * __phy_read - convenience function for reading a given PHY register
1145 * @phydev: the phy_device struct
1146 * @regnum: register number to read
1147 *
1148 * The caller must have taken the MDIO bus lock.
1149 */
__phy_read(struct phy_device * phydev,u32 regnum)1150 static inline int __phy_read(struct phy_device *phydev, u32 regnum)
1151 {
1152 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
1153 }
1154
1155 /**
1156 * phy_write - Convenience function for writing a given PHY register
1157 * @phydev: the phy_device struct
1158 * @regnum: register number to write
1159 * @val: value to write to @regnum
1160 *
1161 * NOTE: MUST NOT be called from interrupt context,
1162 * because the bus read/write functions may wait for an interrupt
1163 * to conclude the operation.
1164 */
phy_write(struct phy_device * phydev,u32 regnum,u16 val)1165 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
1166 {
1167 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
1168 }
1169
1170 /**
1171 * __phy_write - Convenience function for writing a given PHY register
1172 * @phydev: the phy_device struct
1173 * @regnum: register number to write
1174 * @val: value to write to @regnum
1175 *
1176 * The caller must have taken the MDIO bus lock.
1177 */
__phy_write(struct phy_device * phydev,u32 regnum,u16 val)1178 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val)
1179 {
1180 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum,
1181 val);
1182 }
1183
1184 /**
1185 * __phy_modify_changed() - Convenience function for modifying a PHY register
1186 * @phydev: a pointer to a &struct phy_device
1187 * @regnum: register number
1188 * @mask: bit mask of bits to clear
1189 * @set: bit mask of bits to set
1190 *
1191 * Unlocked helper function which allows a PHY register to be modified as
1192 * new register value = (old register value & ~mask) | set
1193 *
1194 * Returns negative errno, 0 if there was no change, and 1 in case of change
1195 */
__phy_modify_changed(struct phy_device * phydev,u32 regnum,u16 mask,u16 set)1196 static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum,
1197 u16 mask, u16 set)
1198 {
1199 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr,
1200 regnum, mask, set);
1201 }
1202
1203 /*
1204 * phy_read_mmd - Convenience function for reading a register
1205 * from an MMD on a given PHY.
1206 */
1207 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
1208
1209 /**
1210 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a
1211 * condition is met or a timeout occurs
1212 *
1213 * @phydev: The phy_device struct
1214 * @devaddr: The MMD to read from
1215 * @regnum: The register on the MMD to read
1216 * @val: Variable to read the register into
1217 * @cond: Break condition (usually involving @val)
1218 * @sleep_us: Maximum time to sleep between reads in us (0
1219 * tight-loops). Should be less than ~20ms since usleep_range
1220 * is used (see Documentation/timers/timers-howto.rst).
1221 * @timeout_us: Timeout in us, 0 means never timeout
1222 * @sleep_before_read: if it is true, sleep @sleep_us before read.
1223 * Returns 0 on success and -ETIMEDOUT upon a timeout. In either
1224 * case, the last read value at @args is stored in @val. Must not
1225 * be called from atomic context if sleep_us or timeout_us are used.
1226 */
1227 #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \
1228 sleep_us, timeout_us, sleep_before_read) \
1229 ({ \
1230 int __ret = read_poll_timeout(phy_read_mmd, val, (cond) || val < 0, \
1231 sleep_us, timeout_us, sleep_before_read, \
1232 phydev, devaddr, regnum); \
1233 if (val < 0) \
1234 __ret = val; \
1235 if (__ret) \
1236 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
1237 __ret; \
1238 })
1239
1240 /*
1241 * __phy_read_mmd - Convenience function for reading a register
1242 * from an MMD on a given PHY.
1243 */
1244 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
1245
1246 /*
1247 * phy_write_mmd - Convenience function for writing a register
1248 * on an MMD on a given PHY.
1249 */
1250 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
1251
1252 /*
1253 * __phy_write_mmd - Convenience function for writing a register
1254 * on an MMD on a given PHY.
1255 */
1256 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
1257
1258 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
1259 u16 set);
1260 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
1261 u16 set);
1262 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
1263 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
1264
1265 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
1266 u16 mask, u16 set);
1267 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
1268 u16 mask, u16 set);
1269 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
1270 u16 mask, u16 set);
1271 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
1272 u16 mask, u16 set);
1273
1274 /**
1275 * __phy_set_bits - Convenience function for setting bits in a PHY register
1276 * @phydev: the phy_device struct
1277 * @regnum: register number to write
1278 * @val: bits to set
1279 *
1280 * The caller must have taken the MDIO bus lock.
1281 */
__phy_set_bits(struct phy_device * phydev,u32 regnum,u16 val)1282 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
1283 {
1284 return __phy_modify(phydev, regnum, 0, val);
1285 }
1286
1287 /**
1288 * __phy_clear_bits - Convenience function for clearing bits in a PHY register
1289 * @phydev: the phy_device struct
1290 * @regnum: register number to write
1291 * @val: bits to clear
1292 *
1293 * The caller must have taken the MDIO bus lock.
1294 */
__phy_clear_bits(struct phy_device * phydev,u32 regnum,u16 val)1295 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum,
1296 u16 val)
1297 {
1298 return __phy_modify(phydev, regnum, val, 0);
1299 }
1300
1301 /**
1302 * phy_set_bits - Convenience function for setting bits in a PHY register
1303 * @phydev: the phy_device struct
1304 * @regnum: register number to write
1305 * @val: bits to set
1306 */
phy_set_bits(struct phy_device * phydev,u32 regnum,u16 val)1307 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
1308 {
1309 return phy_modify(phydev, regnum, 0, val);
1310 }
1311
1312 /**
1313 * phy_clear_bits - Convenience function for clearing bits in a PHY register
1314 * @phydev: the phy_device struct
1315 * @regnum: register number to write
1316 * @val: bits to clear
1317 */
phy_clear_bits(struct phy_device * phydev,u32 regnum,u16 val)1318 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val)
1319 {
1320 return phy_modify(phydev, regnum, val, 0);
1321 }
1322
1323 /**
1324 * __phy_set_bits_mmd - Convenience function for setting bits in a register
1325 * on MMD
1326 * @phydev: the phy_device struct
1327 * @devad: the MMD containing register to modify
1328 * @regnum: register number to modify
1329 * @val: bits to set
1330 *
1331 * The caller must have taken the MDIO bus lock.
1332 */
__phy_set_bits_mmd(struct phy_device * phydev,int devad,u32 regnum,u16 val)1333 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad,
1334 u32 regnum, u16 val)
1335 {
1336 return __phy_modify_mmd(phydev, devad, regnum, 0, val);
1337 }
1338
1339 /**
1340 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register
1341 * on MMD
1342 * @phydev: the phy_device struct
1343 * @devad: the MMD containing register to modify
1344 * @regnum: register number to modify
1345 * @val: bits to clear
1346 *
1347 * The caller must have taken the MDIO bus lock.
1348 */
__phy_clear_bits_mmd(struct phy_device * phydev,int devad,u32 regnum,u16 val)1349 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad,
1350 u32 regnum, u16 val)
1351 {
1352 return __phy_modify_mmd(phydev, devad, regnum, val, 0);
1353 }
1354
1355 /**
1356 * phy_set_bits_mmd - Convenience function for setting bits in a register
1357 * on MMD
1358 * @phydev: the phy_device struct
1359 * @devad: the MMD containing register to modify
1360 * @regnum: register number to modify
1361 * @val: bits to set
1362 */
phy_set_bits_mmd(struct phy_device * phydev,int devad,u32 regnum,u16 val)1363 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad,
1364 u32 regnum, u16 val)
1365 {
1366 return phy_modify_mmd(phydev, devad, regnum, 0, val);
1367 }
1368
1369 /**
1370 * phy_clear_bits_mmd - Convenience function for clearing bits in a register
1371 * on MMD
1372 * @phydev: the phy_device struct
1373 * @devad: the MMD containing register to modify
1374 * @regnum: register number to modify
1375 * @val: bits to clear
1376 */
phy_clear_bits_mmd(struct phy_device * phydev,int devad,u32 regnum,u16 val)1377 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad,
1378 u32 regnum, u16 val)
1379 {
1380 return phy_modify_mmd(phydev, devad, regnum, val, 0);
1381 }
1382
1383 /**
1384 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
1385 * @phydev: the phy_device struct
1386 *
1387 * NOTE: must be kept in sync with addition/removal of PHY_POLL and
1388 * PHY_MAC_INTERRUPT
1389 */
phy_interrupt_is_valid(struct phy_device * phydev)1390 static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
1391 {
1392 return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT;
1393 }
1394
1395 /**
1396 * phy_polling_mode - Convenience function for testing whether polling is
1397 * used to detect PHY status changes
1398 * @phydev: the phy_device struct
1399 */
phy_polling_mode(struct phy_device * phydev)1400 static inline bool phy_polling_mode(struct phy_device *phydev)
1401 {
1402 if (phydev->state == PHY_CABLETEST)
1403 if (phydev->drv->flags & PHY_POLL_CABLE_TEST)
1404 return true;
1405
1406 return phydev->irq == PHY_POLL;
1407 }
1408
1409 /**
1410 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration.
1411 * @phydev: the phy_device struct
1412 */
phy_has_hwtstamp(struct phy_device * phydev)1413 static inline bool phy_has_hwtstamp(struct phy_device *phydev)
1414 {
1415 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp;
1416 }
1417
1418 /**
1419 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping.
1420 * @phydev: the phy_device struct
1421 */
phy_has_rxtstamp(struct phy_device * phydev)1422 static inline bool phy_has_rxtstamp(struct phy_device *phydev)
1423 {
1424 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp;
1425 }
1426
1427 /**
1428 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or
1429 * PTP hardware clock capabilities.
1430 * @phydev: the phy_device struct
1431 */
phy_has_tsinfo(struct phy_device * phydev)1432 static inline bool phy_has_tsinfo(struct phy_device *phydev)
1433 {
1434 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info;
1435 }
1436
1437 /**
1438 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping.
1439 * @phydev: the phy_device struct
1440 */
phy_has_txtstamp(struct phy_device * phydev)1441 static inline bool phy_has_txtstamp(struct phy_device *phydev)
1442 {
1443 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp;
1444 }
1445
phy_hwtstamp(struct phy_device * phydev,struct ifreq * ifr)1446 static inline int phy_hwtstamp(struct phy_device *phydev, struct ifreq *ifr)
1447 {
1448 return phydev->mii_ts->hwtstamp(phydev->mii_ts, ifr);
1449 }
1450
phy_rxtstamp(struct phy_device * phydev,struct sk_buff * skb,int type)1451 static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb,
1452 int type)
1453 {
1454 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type);
1455 }
1456
phy_ts_info(struct phy_device * phydev,struct ethtool_ts_info * tsinfo)1457 static inline int phy_ts_info(struct phy_device *phydev,
1458 struct ethtool_ts_info *tsinfo)
1459 {
1460 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo);
1461 }
1462
phy_txtstamp(struct phy_device * phydev,struct sk_buff * skb,int type)1463 static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb,
1464 int type)
1465 {
1466 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type);
1467 }
1468
1469 /**
1470 * phy_is_internal - Convenience function for testing if a PHY is internal
1471 * @phydev: the phy_device struct
1472 */
phy_is_internal(struct phy_device * phydev)1473 static inline bool phy_is_internal(struct phy_device *phydev)
1474 {
1475 return phydev->is_internal;
1476 }
1477
1478 /**
1479 * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module
1480 * @phydev: the phy_device struct
1481 */
phy_on_sfp(struct phy_device * phydev)1482 static inline bool phy_on_sfp(struct phy_device *phydev)
1483 {
1484 return phydev->is_on_sfp_module;
1485 }
1486
1487 /**
1488 * phy_interface_mode_is_rgmii - Convenience function for testing if a
1489 * PHY interface mode is RGMII (all variants)
1490 * @mode: the &phy_interface_t enum
1491 */
phy_interface_mode_is_rgmii(phy_interface_t mode)1492 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode)
1493 {
1494 return mode >= PHY_INTERFACE_MODE_RGMII &&
1495 mode <= PHY_INTERFACE_MODE_RGMII_TXID;
1496 };
1497
1498 /**
1499 * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z
1500 * negotiation
1501 * @mode: one of &enum phy_interface_t
1502 *
1503 * Returns true if the PHY interface mode uses the 16-bit negotiation
1504 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding)
1505 */
phy_interface_mode_is_8023z(phy_interface_t mode)1506 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode)
1507 {
1508 return mode == PHY_INTERFACE_MODE_1000BASEX ||
1509 mode == PHY_INTERFACE_MODE_2500BASEX;
1510 }
1511
1512 /**
1513 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
1514 * is RGMII (all variants)
1515 * @phydev: the phy_device struct
1516 */
phy_interface_is_rgmii(struct phy_device * phydev)1517 static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
1518 {
1519 return phy_interface_mode_is_rgmii(phydev->interface);
1520 };
1521
1522 /**
1523 * phy_is_pseudo_fixed_link - Convenience function for testing if this
1524 * PHY is the CPU port facing side of an Ethernet switch, or similar.
1525 * @phydev: the phy_device struct
1526 */
phy_is_pseudo_fixed_link(struct phy_device * phydev)1527 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
1528 {
1529 return phydev->is_pseudo_fixed_link;
1530 }
1531
1532 int phy_save_page(struct phy_device *phydev);
1533 int phy_select_page(struct phy_device *phydev, int page);
1534 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret);
1535 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum);
1536 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val);
1537 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum,
1538 u16 mask, u16 set);
1539 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
1540 u16 mask, u16 set);
1541
1542 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id,
1543 bool is_c45,
1544 struct phy_c45_device_ids *c45_ids);
1545 #if IS_ENABLED(CONFIG_PHYLIB)
1546 int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id);
1547 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode);
1548 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode);
1549 struct phy_device *device_phy_find_device(struct device *dev);
1550 struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode);
1551 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
1552 int phy_device_register(struct phy_device *phy);
1553 void phy_device_free(struct phy_device *phydev);
1554 #else
fwnode_get_phy_id(struct fwnode_handle * fwnode,u32 * phy_id)1555 static inline int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id)
1556 {
1557 return 0;
1558 }
1559 static inline
fwnode_mdio_find_device(struct fwnode_handle * fwnode)1560 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode)
1561 {
1562 return 0;
1563 }
1564
1565 static inline
fwnode_phy_find_device(struct fwnode_handle * phy_fwnode)1566 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode)
1567 {
1568 return NULL;
1569 }
1570
device_phy_find_device(struct device * dev)1571 static inline struct phy_device *device_phy_find_device(struct device *dev)
1572 {
1573 return NULL;
1574 }
1575
1576 static inline
fwnode_get_phy_node(struct fwnode_handle * fwnode)1577 struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode)
1578 {
1579 return NULL;
1580 }
1581
1582 static inline
get_phy_device(struct mii_bus * bus,int addr,bool is_c45)1583 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
1584 {
1585 return NULL;
1586 }
1587
phy_device_register(struct phy_device * phy)1588 static inline int phy_device_register(struct phy_device *phy)
1589 {
1590 return 0;
1591 }
1592
phy_device_free(struct phy_device * phydev)1593 static inline void phy_device_free(struct phy_device *phydev) { }
1594 #endif /* CONFIG_PHYLIB */
1595 void phy_device_remove(struct phy_device *phydev);
1596 int phy_get_c45_ids(struct phy_device *phydev);
1597 int phy_init_hw(struct phy_device *phydev);
1598 int phy_suspend(struct phy_device *phydev);
1599 int phy_resume(struct phy_device *phydev);
1600 int __phy_resume(struct phy_device *phydev);
1601 int phy_loopback(struct phy_device *phydev, bool enable);
1602 void phy_sfp_attach(void *upstream, struct sfp_bus *bus);
1603 void phy_sfp_detach(void *upstream, struct sfp_bus *bus);
1604 int phy_sfp_probe(struct phy_device *phydev,
1605 const struct sfp_upstream_ops *ops);
1606 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
1607 phy_interface_t interface);
1608 struct phy_device *phy_find_first(struct mii_bus *bus);
1609 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
1610 u32 flags, phy_interface_t interface);
1611 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
1612 void (*handler)(struct net_device *),
1613 phy_interface_t interface);
1614 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
1615 void (*handler)(struct net_device *),
1616 phy_interface_t interface);
1617 void phy_disconnect(struct phy_device *phydev);
1618 void phy_detach(struct phy_device *phydev);
1619 void phy_start(struct phy_device *phydev);
1620 void phy_stop(struct phy_device *phydev);
1621 int phy_config_aneg(struct phy_device *phydev);
1622 int phy_start_aneg(struct phy_device *phydev);
1623 int phy_aneg_done(struct phy_device *phydev);
1624 int phy_speed_down(struct phy_device *phydev, bool sync);
1625 int phy_speed_up(struct phy_device *phydev);
1626 bool phy_check_valid(int speed, int duplex, unsigned long *features);
1627
1628 int phy_restart_aneg(struct phy_device *phydev);
1629 int phy_reset_after_clk_enable(struct phy_device *phydev);
1630
1631 #if IS_ENABLED(CONFIG_PHYLIB)
1632 int phy_start_cable_test(struct phy_device *phydev,
1633 struct netlink_ext_ack *extack);
1634 int phy_start_cable_test_tdr(struct phy_device *phydev,
1635 struct netlink_ext_ack *extack,
1636 const struct phy_tdr_config *config);
1637 #else
1638 static inline
phy_start_cable_test(struct phy_device * phydev,struct netlink_ext_ack * extack)1639 int phy_start_cable_test(struct phy_device *phydev,
1640 struct netlink_ext_ack *extack)
1641 {
1642 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support");
1643 return -EOPNOTSUPP;
1644 }
1645 static inline
phy_start_cable_test_tdr(struct phy_device * phydev,struct netlink_ext_ack * extack,const struct phy_tdr_config * config)1646 int phy_start_cable_test_tdr(struct phy_device *phydev,
1647 struct netlink_ext_ack *extack,
1648 const struct phy_tdr_config *config)
1649 {
1650 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support");
1651 return -EOPNOTSUPP;
1652 }
1653 #endif
1654
1655 int phy_cable_test_result(struct phy_device *phydev, u8 pair, u16 result);
1656 int phy_cable_test_fault_length(struct phy_device *phydev, u8 pair,
1657 u16 cm);
1658
phy_device_reset(struct phy_device * phydev,int value)1659 static inline void phy_device_reset(struct phy_device *phydev, int value)
1660 {
1661 mdio_device_reset(&phydev->mdio, value);
1662 }
1663
1664 #define phydev_err(_phydev, format, args...) \
1665 dev_err(&_phydev->mdio.dev, format, ##args)
1666
1667 #define phydev_err_probe(_phydev, err, format, args...) \
1668 dev_err_probe(&_phydev->mdio.dev, err, format, ##args)
1669
1670 #define phydev_info(_phydev, format, args...) \
1671 dev_info(&_phydev->mdio.dev, format, ##args)
1672
1673 #define phydev_warn(_phydev, format, args...) \
1674 dev_warn(&_phydev->mdio.dev, format, ##args)
1675
1676 #define phydev_dbg(_phydev, format, args...) \
1677 dev_dbg(&_phydev->mdio.dev, format, ##args)
1678
phydev_name(const struct phy_device * phydev)1679 static inline const char *phydev_name(const struct phy_device *phydev)
1680 {
1681 return dev_name(&phydev->mdio.dev);
1682 }
1683
phy_lock_mdio_bus(struct phy_device * phydev)1684 static inline void phy_lock_mdio_bus(struct phy_device *phydev)
1685 {
1686 mutex_lock(&phydev->mdio.bus->mdio_lock);
1687 }
1688
phy_unlock_mdio_bus(struct phy_device * phydev)1689 static inline void phy_unlock_mdio_bus(struct phy_device *phydev)
1690 {
1691 mutex_unlock(&phydev->mdio.bus->mdio_lock);
1692 }
1693
1694 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
1695 __printf(2, 3);
1696 char *phy_attached_info_irq(struct phy_device *phydev)
1697 __malloc;
1698 void phy_attached_info(struct phy_device *phydev);
1699
1700 /* Clause 22 PHY */
1701 int genphy_read_abilities(struct phy_device *phydev);
1702 int genphy_setup_forced(struct phy_device *phydev);
1703 int genphy_restart_aneg(struct phy_device *phydev);
1704 int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart);
1705 int genphy_config_eee_advert(struct phy_device *phydev);
1706 int __genphy_config_aneg(struct phy_device *phydev, bool changed);
1707 int genphy_aneg_done(struct phy_device *phydev);
1708 int genphy_update_link(struct phy_device *phydev);
1709 int genphy_read_lpa(struct phy_device *phydev);
1710 int genphy_read_status_fixed(struct phy_device *phydev);
1711 int genphy_read_status(struct phy_device *phydev);
1712 int genphy_read_master_slave(struct phy_device *phydev);
1713 int genphy_suspend(struct phy_device *phydev);
1714 int genphy_resume(struct phy_device *phydev);
1715 int genphy_loopback(struct phy_device *phydev, bool enable);
1716 int genphy_soft_reset(struct phy_device *phydev);
1717 irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev);
1718
genphy_config_aneg(struct phy_device * phydev)1719 static inline int genphy_config_aneg(struct phy_device *phydev)
1720 {
1721 return __genphy_config_aneg(phydev, false);
1722 }
1723
genphy_no_config_intr(struct phy_device * phydev)1724 static inline int genphy_no_config_intr(struct phy_device *phydev)
1725 {
1726 return 0;
1727 }
1728 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad,
1729 u16 regnum);
1730 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum,
1731 u16 regnum, u16 val);
1732
1733 /* Clause 37 */
1734 int genphy_c37_config_aneg(struct phy_device *phydev);
1735 int genphy_c37_read_status(struct phy_device *phydev);
1736
1737 /* Clause 45 PHY */
1738 int genphy_c45_restart_aneg(struct phy_device *phydev);
1739 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart);
1740 int genphy_c45_aneg_done(struct phy_device *phydev);
1741 int genphy_c45_read_link(struct phy_device *phydev);
1742 int genphy_c45_read_lpa(struct phy_device *phydev);
1743 int genphy_c45_read_pma(struct phy_device *phydev);
1744 int genphy_c45_pma_setup_forced(struct phy_device *phydev);
1745 int genphy_c45_pma_baset1_setup_master_slave(struct phy_device *phydev);
1746 int genphy_c45_an_config_aneg(struct phy_device *phydev);
1747 int genphy_c45_an_disable_aneg(struct phy_device *phydev);
1748 int genphy_c45_read_mdix(struct phy_device *phydev);
1749 int genphy_c45_pma_read_abilities(struct phy_device *phydev);
1750 int genphy_c45_read_eee_abilities(struct phy_device *phydev);
1751 int genphy_c45_pma_baset1_read_master_slave(struct phy_device *phydev);
1752 int genphy_c45_read_status(struct phy_device *phydev);
1753 int genphy_c45_baset1_read_status(struct phy_device *phydev);
1754 int genphy_c45_config_aneg(struct phy_device *phydev);
1755 int genphy_c45_loopback(struct phy_device *phydev, bool enable);
1756 int genphy_c45_pma_resume(struct phy_device *phydev);
1757 int genphy_c45_pma_suspend(struct phy_device *phydev);
1758 int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable);
1759 int genphy_c45_plca_get_cfg(struct phy_device *phydev,
1760 struct phy_plca_cfg *plca_cfg);
1761 int genphy_c45_plca_set_cfg(struct phy_device *phydev,
1762 const struct phy_plca_cfg *plca_cfg);
1763 int genphy_c45_plca_get_status(struct phy_device *phydev,
1764 struct phy_plca_status *plca_st);
1765 int genphy_c45_eee_is_active(struct phy_device *phydev, unsigned long *adv,
1766 unsigned long *lp, bool *is_enabled);
1767 int genphy_c45_ethtool_get_eee(struct phy_device *phydev,
1768 struct ethtool_eee *data);
1769 int genphy_c45_ethtool_set_eee(struct phy_device *phydev,
1770 struct ethtool_eee *data);
1771 int genphy_c45_write_eee_adv(struct phy_device *phydev, unsigned long *adv);
1772 int genphy_c45_an_config_eee_aneg(struct phy_device *phydev);
1773 int genphy_c45_read_eee_adv(struct phy_device *phydev, unsigned long *adv);
1774
1775 /* Generic C45 PHY driver */
1776 extern struct phy_driver genphy_c45_driver;
1777
1778 /* The gen10g_* functions are the old Clause 45 stub */
1779 int gen10g_config_aneg(struct phy_device *phydev);
1780
phy_read_status(struct phy_device * phydev)1781 static inline int phy_read_status(struct phy_device *phydev)
1782 {
1783 if (!phydev->drv)
1784 return -EIO;
1785
1786 if (phydev->drv->read_status)
1787 return phydev->drv->read_status(phydev);
1788 else
1789 return genphy_read_status(phydev);
1790 }
1791
1792 void phy_driver_unregister(struct phy_driver *drv);
1793 void phy_drivers_unregister(struct phy_driver *drv, int n);
1794 int phy_driver_register(struct phy_driver *new_driver, struct module *owner);
1795 int phy_drivers_register(struct phy_driver *new_driver, int n,
1796 struct module *owner);
1797 void phy_error(struct phy_device *phydev);
1798 void phy_state_machine(struct work_struct *work);
1799 void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies);
1800 void phy_trigger_machine(struct phy_device *phydev);
1801 void phy_mac_interrupt(struct phy_device *phydev);
1802 void phy_start_machine(struct phy_device *phydev);
1803 void phy_stop_machine(struct phy_device *phydev);
1804 void phy_ethtool_ksettings_get(struct phy_device *phydev,
1805 struct ethtool_link_ksettings *cmd);
1806 int phy_ethtool_ksettings_set(struct phy_device *phydev,
1807 const struct ethtool_link_ksettings *cmd);
1808 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
1809 int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
1810 int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd);
1811 int phy_disable_interrupts(struct phy_device *phydev);
1812 void phy_request_interrupt(struct phy_device *phydev);
1813 void phy_free_interrupt(struct phy_device *phydev);
1814 void phy_print_status(struct phy_device *phydev);
1815 int phy_get_rate_matching(struct phy_device *phydev,
1816 phy_interface_t iface);
1817 void phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
1818 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode);
1819 void phy_advertise_supported(struct phy_device *phydev);
1820 void phy_support_sym_pause(struct phy_device *phydev);
1821 void phy_support_asym_pause(struct phy_device *phydev);
1822 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx,
1823 bool autoneg);
1824 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx);
1825 bool phy_validate_pause(struct phy_device *phydev,
1826 struct ethtool_pauseparam *pp);
1827 void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause);
1828
1829 s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev,
1830 const int *delay_values, int size, bool is_rx);
1831
1832 void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv,
1833 bool *tx_pause, bool *rx_pause);
1834
1835 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
1836 int (*run)(struct phy_device *));
1837 int phy_register_fixup_for_id(const char *bus_id,
1838 int (*run)(struct phy_device *));
1839 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
1840 int (*run)(struct phy_device *));
1841
1842 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
1843 int phy_unregister_fixup_for_id(const char *bus_id);
1844 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
1845
1846 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
1847 int phy_get_eee_err(struct phy_device *phydev);
1848 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
1849 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
1850 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
1851 void phy_ethtool_get_wol(struct phy_device *phydev,
1852 struct ethtool_wolinfo *wol);
1853 int phy_ethtool_get_link_ksettings(struct net_device *ndev,
1854 struct ethtool_link_ksettings *cmd);
1855 int phy_ethtool_set_link_ksettings(struct net_device *ndev,
1856 const struct ethtool_link_ksettings *cmd);
1857 int phy_ethtool_nway_reset(struct net_device *ndev);
1858 int phy_package_join(struct phy_device *phydev, int addr, size_t priv_size);
1859 void phy_package_leave(struct phy_device *phydev);
1860 int devm_phy_package_join(struct device *dev, struct phy_device *phydev,
1861 int addr, size_t priv_size);
1862
1863 #if IS_ENABLED(CONFIG_PHYLIB)
1864 int __init mdio_bus_init(void);
1865 void mdio_bus_exit(void);
1866 #endif
1867
1868 int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data);
1869 int phy_ethtool_get_sset_count(struct phy_device *phydev);
1870 int phy_ethtool_get_stats(struct phy_device *phydev,
1871 struct ethtool_stats *stats, u64 *data);
1872 int phy_ethtool_get_plca_cfg(struct phy_device *phydev,
1873 struct phy_plca_cfg *plca_cfg);
1874 int phy_ethtool_set_plca_cfg(struct phy_device *phydev,
1875 const struct phy_plca_cfg *plca_cfg,
1876 struct netlink_ext_ack *extack);
1877 int phy_ethtool_get_plca_status(struct phy_device *phydev,
1878 struct phy_plca_status *plca_st);
1879
phy_package_read(struct phy_device * phydev,u32 regnum)1880 static inline int phy_package_read(struct phy_device *phydev, u32 regnum)
1881 {
1882 struct phy_package_shared *shared = phydev->shared;
1883
1884 if (!shared)
1885 return -EIO;
1886
1887 return mdiobus_read(phydev->mdio.bus, shared->addr, regnum);
1888 }
1889
__phy_package_read(struct phy_device * phydev,u32 regnum)1890 static inline int __phy_package_read(struct phy_device *phydev, u32 regnum)
1891 {
1892 struct phy_package_shared *shared = phydev->shared;
1893
1894 if (!shared)
1895 return -EIO;
1896
1897 return __mdiobus_read(phydev->mdio.bus, shared->addr, regnum);
1898 }
1899
phy_package_write(struct phy_device * phydev,u32 regnum,u16 val)1900 static inline int phy_package_write(struct phy_device *phydev,
1901 u32 regnum, u16 val)
1902 {
1903 struct phy_package_shared *shared = phydev->shared;
1904
1905 if (!shared)
1906 return -EIO;
1907
1908 return mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val);
1909 }
1910
__phy_package_write(struct phy_device * phydev,u32 regnum,u16 val)1911 static inline int __phy_package_write(struct phy_device *phydev,
1912 u32 regnum, u16 val)
1913 {
1914 struct phy_package_shared *shared = phydev->shared;
1915
1916 if (!shared)
1917 return -EIO;
1918
1919 return __mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val);
1920 }
1921
__phy_package_set_once(struct phy_device * phydev,unsigned int b)1922 static inline bool __phy_package_set_once(struct phy_device *phydev,
1923 unsigned int b)
1924 {
1925 struct phy_package_shared *shared = phydev->shared;
1926
1927 if (!shared)
1928 return false;
1929
1930 return !test_and_set_bit(b, &shared->flags);
1931 }
1932
phy_package_init_once(struct phy_device * phydev)1933 static inline bool phy_package_init_once(struct phy_device *phydev)
1934 {
1935 return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE);
1936 }
1937
phy_package_probe_once(struct phy_device * phydev)1938 static inline bool phy_package_probe_once(struct phy_device *phydev)
1939 {
1940 return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE);
1941 }
1942
1943 extern struct bus_type mdio_bus_type;
1944
1945 struct mdio_board_info {
1946 const char *bus_id;
1947 char modalias[MDIO_NAME_SIZE];
1948 int mdio_addr;
1949 const void *platform_data;
1950 };
1951
1952 #if IS_ENABLED(CONFIG_MDIO_DEVICE)
1953 int mdiobus_register_board_info(const struct mdio_board_info *info,
1954 unsigned int n);
1955 #else
mdiobus_register_board_info(const struct mdio_board_info * i,unsigned int n)1956 static inline int mdiobus_register_board_info(const struct mdio_board_info *i,
1957 unsigned int n)
1958 {
1959 return 0;
1960 }
1961 #endif
1962
1963
1964 /**
1965 * phy_module_driver() - Helper macro for registering PHY drivers
1966 * @__phy_drivers: array of PHY drivers to register
1967 * @__count: Numbers of members in array
1968 *
1969 * Helper macro for PHY drivers which do not do anything special in module
1970 * init/exit. Each module may only use this macro once, and calling it
1971 * replaces module_init() and module_exit().
1972 */
1973 #define phy_module_driver(__phy_drivers, __count) \
1974 static int __init phy_module_init(void) \
1975 { \
1976 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
1977 } \
1978 module_init(phy_module_init); \
1979 static void __exit phy_module_exit(void) \
1980 { \
1981 phy_drivers_unregister(__phy_drivers, __count); \
1982 } \
1983 module_exit(phy_module_exit)
1984
1985 #define module_phy_driver(__phy_drivers) \
1986 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
1987
1988 bool phy_driver_is_genphy(struct phy_device *phydev);
1989 bool phy_driver_is_genphy_10g(struct phy_device *phydev);
1990
1991 #endif /* __PHY_H */
1992