1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* Hisilicon Hibmc SoC drm driver
3 *
4 * Based on the bochs drm driver.
5 *
6 * Copyright (c) 2016 Huawei Limited.
7 *
8 * Author:
9 * Rongrong Zou <zourongrong@huawei.com>
10 * Rongrong Zou <zourongrong@gmail.com>
11 * Jianhua Li <lijianhua@huawei.com>
12 */
13
14 #include <linux/module.h>
15 #include <linux/pci.h>
16
17 #include <drm/drm_aperture.h>
18 #include <drm/drm_atomic_helper.h>
19 #include <drm/drm_drv.h>
20 #include <drm/drm_fbdev_generic.h>
21 #include <drm/drm_gem_framebuffer_helper.h>
22 #include <drm/drm_gem_vram_helper.h>
23 #include <drm/drm_managed.h>
24 #include <drm/drm_module.h>
25 #include <drm/drm_vblank.h>
26
27 #include "hibmc_drm_drv.h"
28 #include "hibmc_drm_regs.h"
29
30 DEFINE_DRM_GEM_FOPS(hibmc_fops);
31
hibmc_interrupt(int irq,void * arg)32 static irqreturn_t hibmc_interrupt(int irq, void *arg)
33 {
34 struct drm_device *dev = (struct drm_device *)arg;
35 struct hibmc_drm_private *priv = to_hibmc_drm_private(dev);
36 u32 status;
37
38 status = readl(priv->mmio + HIBMC_RAW_INTERRUPT);
39
40 if (status & HIBMC_RAW_INTERRUPT_VBLANK(1)) {
41 writel(HIBMC_RAW_INTERRUPT_VBLANK(1),
42 priv->mmio + HIBMC_RAW_INTERRUPT);
43 drm_handle_vblank(dev, 0);
44 }
45
46 return IRQ_HANDLED;
47 }
48
hibmc_dumb_create(struct drm_file * file,struct drm_device * dev,struct drm_mode_create_dumb * args)49 static int hibmc_dumb_create(struct drm_file *file, struct drm_device *dev,
50 struct drm_mode_create_dumb *args)
51 {
52 return drm_gem_vram_fill_create_dumb(file, dev, 0, 128, args);
53 }
54
55 static const struct drm_driver hibmc_driver = {
56 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
57 .fops = &hibmc_fops,
58 .name = "hibmc",
59 .date = "20160828",
60 .desc = "hibmc drm driver",
61 .major = 1,
62 .minor = 0,
63 .debugfs_init = drm_vram_mm_debugfs_init,
64 .dumb_create = hibmc_dumb_create,
65 .dumb_map_offset = drm_gem_ttm_dumb_map_offset,
66 .gem_prime_mmap = drm_gem_prime_mmap,
67 };
68
hibmc_pm_suspend(struct device * dev)69 static int __maybe_unused hibmc_pm_suspend(struct device *dev)
70 {
71 struct drm_device *drm_dev = dev_get_drvdata(dev);
72
73 return drm_mode_config_helper_suspend(drm_dev);
74 }
75
hibmc_pm_resume(struct device * dev)76 static int __maybe_unused hibmc_pm_resume(struct device *dev)
77 {
78 struct drm_device *drm_dev = dev_get_drvdata(dev);
79
80 return drm_mode_config_helper_resume(drm_dev);
81 }
82
83 static const struct dev_pm_ops hibmc_pm_ops = {
84 SET_SYSTEM_SLEEP_PM_OPS(hibmc_pm_suspend,
85 hibmc_pm_resume)
86 };
87
88 static const struct drm_mode_config_funcs hibmc_mode_funcs = {
89 .mode_valid = drm_vram_helper_mode_valid,
90 .atomic_check = drm_atomic_helper_check,
91 .atomic_commit = drm_atomic_helper_commit,
92 .fb_create = drm_gem_fb_create,
93 };
94
hibmc_kms_init(struct hibmc_drm_private * priv)95 static int hibmc_kms_init(struct hibmc_drm_private *priv)
96 {
97 struct drm_device *dev = &priv->dev;
98 int ret;
99
100 ret = drmm_mode_config_init(dev);
101 if (ret)
102 return ret;
103
104 dev->mode_config.min_width = 0;
105 dev->mode_config.min_height = 0;
106 dev->mode_config.max_width = 1920;
107 dev->mode_config.max_height = 1200;
108
109 dev->mode_config.preferred_depth = 24;
110 dev->mode_config.prefer_shadow = 1;
111
112 dev->mode_config.funcs = (void *)&hibmc_mode_funcs;
113
114 ret = hibmc_de_init(priv);
115 if (ret) {
116 drm_err(dev, "failed to init de: %d\n", ret);
117 return ret;
118 }
119
120 ret = hibmc_vdac_init(priv);
121 if (ret) {
122 drm_err(dev, "failed to init vdac: %d\n", ret);
123 return ret;
124 }
125
126 return 0;
127 }
128
129 /*
130 * It can operate in one of three modes: 0, 1 or Sleep.
131 */
hibmc_set_power_mode(struct hibmc_drm_private * priv,u32 power_mode)132 void hibmc_set_power_mode(struct hibmc_drm_private *priv, u32 power_mode)
133 {
134 u32 control_value = 0;
135 void __iomem *mmio = priv->mmio;
136 u32 input = 1;
137
138 if (power_mode > HIBMC_PW_MODE_CTL_MODE_SLEEP)
139 return;
140
141 if (power_mode == HIBMC_PW_MODE_CTL_MODE_SLEEP)
142 input = 0;
143
144 control_value = readl(mmio + HIBMC_POWER_MODE_CTRL);
145 control_value &= ~(HIBMC_PW_MODE_CTL_MODE_MASK |
146 HIBMC_PW_MODE_CTL_OSC_INPUT_MASK);
147 control_value |= HIBMC_FIELD(HIBMC_PW_MODE_CTL_MODE, power_mode);
148 control_value |= HIBMC_FIELD(HIBMC_PW_MODE_CTL_OSC_INPUT, input);
149 writel(control_value, mmio + HIBMC_POWER_MODE_CTRL);
150 }
151
hibmc_set_current_gate(struct hibmc_drm_private * priv,unsigned int gate)152 void hibmc_set_current_gate(struct hibmc_drm_private *priv, unsigned int gate)
153 {
154 u32 gate_reg;
155 u32 mode;
156 void __iomem *mmio = priv->mmio;
157
158 /* Get current power mode. */
159 mode = (readl(mmio + HIBMC_POWER_MODE_CTRL) &
160 HIBMC_PW_MODE_CTL_MODE_MASK) >> HIBMC_PW_MODE_CTL_MODE_SHIFT;
161
162 switch (mode) {
163 case HIBMC_PW_MODE_CTL_MODE_MODE0:
164 gate_reg = HIBMC_MODE0_GATE;
165 break;
166
167 case HIBMC_PW_MODE_CTL_MODE_MODE1:
168 gate_reg = HIBMC_MODE1_GATE;
169 break;
170
171 default:
172 gate_reg = HIBMC_MODE0_GATE;
173 break;
174 }
175 writel(gate, mmio + gate_reg);
176 }
177
hibmc_hw_config(struct hibmc_drm_private * priv)178 static void hibmc_hw_config(struct hibmc_drm_private *priv)
179 {
180 u32 reg;
181
182 /* On hardware reset, power mode 0 is default. */
183 hibmc_set_power_mode(priv, HIBMC_PW_MODE_CTL_MODE_MODE0);
184
185 /* Enable display power gate & LOCALMEM power gate*/
186 reg = readl(priv->mmio + HIBMC_CURRENT_GATE);
187 reg &= ~HIBMC_CURR_GATE_DISPLAY_MASK;
188 reg &= ~HIBMC_CURR_GATE_LOCALMEM_MASK;
189 reg |= HIBMC_CURR_GATE_DISPLAY(1);
190 reg |= HIBMC_CURR_GATE_LOCALMEM(1);
191
192 hibmc_set_current_gate(priv, reg);
193
194 /*
195 * Reset the memory controller. If the memory controller
196 * is not reset in chip,the system might hang when sw accesses
197 * the memory.The memory should be resetted after
198 * changing the MXCLK.
199 */
200 reg = readl(priv->mmio + HIBMC_MISC_CTRL);
201 reg &= ~HIBMC_MSCCTL_LOCALMEM_RESET_MASK;
202 reg |= HIBMC_MSCCTL_LOCALMEM_RESET(0);
203 writel(reg, priv->mmio + HIBMC_MISC_CTRL);
204
205 reg &= ~HIBMC_MSCCTL_LOCALMEM_RESET_MASK;
206 reg |= HIBMC_MSCCTL_LOCALMEM_RESET(1);
207
208 writel(reg, priv->mmio + HIBMC_MISC_CTRL);
209 }
210
hibmc_hw_map(struct hibmc_drm_private * priv)211 static int hibmc_hw_map(struct hibmc_drm_private *priv)
212 {
213 struct drm_device *dev = &priv->dev;
214 struct pci_dev *pdev = to_pci_dev(dev->dev);
215 resource_size_t ioaddr, iosize;
216
217 ioaddr = pci_resource_start(pdev, 1);
218 iosize = pci_resource_len(pdev, 1);
219 priv->mmio = devm_ioremap(dev->dev, ioaddr, iosize);
220 if (!priv->mmio) {
221 drm_err(dev, "Cannot map mmio region\n");
222 return -ENOMEM;
223 }
224
225 return 0;
226 }
227
hibmc_hw_init(struct hibmc_drm_private * priv)228 static int hibmc_hw_init(struct hibmc_drm_private *priv)
229 {
230 int ret;
231
232 ret = hibmc_hw_map(priv);
233 if (ret)
234 return ret;
235
236 hibmc_hw_config(priv);
237
238 return 0;
239 }
240
hibmc_unload(struct drm_device * dev)241 static int hibmc_unload(struct drm_device *dev)
242 {
243 struct pci_dev *pdev = to_pci_dev(dev->dev);
244
245 drm_atomic_helper_shutdown(dev);
246
247 free_irq(pdev->irq, dev);
248
249 pci_disable_msi(to_pci_dev(dev->dev));
250
251 return 0;
252 }
253
hibmc_load(struct drm_device * dev)254 static int hibmc_load(struct drm_device *dev)
255 {
256 struct pci_dev *pdev = to_pci_dev(dev->dev);
257 struct hibmc_drm_private *priv = to_hibmc_drm_private(dev);
258 int ret;
259
260 ret = hibmc_hw_init(priv);
261 if (ret)
262 goto err;
263
264 ret = drmm_vram_helper_init(dev, pci_resource_start(pdev, 0),
265 pci_resource_len(pdev, 0));
266 if (ret) {
267 drm_err(dev, "Error initializing VRAM MM; %d\n", ret);
268 goto err;
269 }
270
271 ret = hibmc_kms_init(priv);
272 if (ret)
273 goto err;
274
275 ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
276 if (ret) {
277 drm_err(dev, "failed to initialize vblank: %d\n", ret);
278 goto err;
279 }
280
281 ret = pci_enable_msi(pdev);
282 if (ret) {
283 drm_warn(dev, "enabling MSI failed: %d\n", ret);
284 } else {
285 /* PCI devices require shared interrupts. */
286 ret = request_irq(pdev->irq, hibmc_interrupt, IRQF_SHARED,
287 dev->driver->name, dev);
288 if (ret)
289 drm_warn(dev, "install irq failed: %d\n", ret);
290 }
291
292 /* reset all the states of crtc/plane/encoder/connector */
293 drm_mode_config_reset(dev);
294
295 return 0;
296
297 err:
298 hibmc_unload(dev);
299 drm_err(dev, "failed to initialize drm driver: %d\n", ret);
300 return ret;
301 }
302
hibmc_pci_probe(struct pci_dev * pdev,const struct pci_device_id * ent)303 static int hibmc_pci_probe(struct pci_dev *pdev,
304 const struct pci_device_id *ent)
305 {
306 struct hibmc_drm_private *priv;
307 struct drm_device *dev;
308 int ret;
309
310 ret = drm_aperture_remove_conflicting_pci_framebuffers(pdev, &hibmc_driver);
311 if (ret)
312 return ret;
313
314 priv = devm_drm_dev_alloc(&pdev->dev, &hibmc_driver,
315 struct hibmc_drm_private, dev);
316 if (IS_ERR(priv)) {
317 DRM_ERROR("failed to allocate drm_device\n");
318 return PTR_ERR(priv);
319 }
320
321 dev = &priv->dev;
322 pci_set_drvdata(pdev, dev);
323
324 ret = pcim_enable_device(pdev);
325 if (ret) {
326 drm_err(dev, "failed to enable pci device: %d\n", ret);
327 goto err_return;
328 }
329
330 ret = hibmc_load(dev);
331 if (ret) {
332 drm_err(dev, "failed to load hibmc: %d\n", ret);
333 goto err_return;
334 }
335
336 ret = drm_dev_register(dev, 0);
337 if (ret) {
338 drm_err(dev, "failed to register drv for userspace access: %d\n",
339 ret);
340 goto err_unload;
341 }
342
343 drm_fbdev_generic_setup(dev, 32);
344
345 return 0;
346
347 err_unload:
348 hibmc_unload(dev);
349 err_return:
350 return ret;
351 }
352
hibmc_pci_remove(struct pci_dev * pdev)353 static void hibmc_pci_remove(struct pci_dev *pdev)
354 {
355 struct drm_device *dev = pci_get_drvdata(pdev);
356
357 drm_dev_unregister(dev);
358 hibmc_unload(dev);
359 }
360
361 static const struct pci_device_id hibmc_pci_table[] = {
362 { PCI_VDEVICE(HUAWEI, 0x1711) },
363 {0,}
364 };
365
366 static struct pci_driver hibmc_pci_driver = {
367 .name = "hibmc-drm",
368 .id_table = hibmc_pci_table,
369 .probe = hibmc_pci_probe,
370 .remove = hibmc_pci_remove,
371 .driver.pm = &hibmc_pm_ops,
372 };
373
374 drm_module_pci_driver(hibmc_pci_driver);
375
376 MODULE_DEVICE_TABLE(pci, hibmc_pci_table);
377 MODULE_AUTHOR("RongrongZou <zourongrong@huawei.com>");
378 MODULE_DESCRIPTION("DRM Driver for Hisilicon Hibmc");
379 MODULE_LICENSE("GPL v2");
380