1 /* SPDX-License-Identifier: MIT */
2 /*
3 * Copyright © 2016 Intel Corporation
4 */
5
6 #ifndef I915_TIMELINE_H
7 #define I915_TIMELINE_H
8
9 #include <linux/lockdep.h>
10
11 #include "i915_active.h"
12 #include "i915_syncmap.h"
13 #include "intel_timeline_types.h"
14
15 struct drm_printer;
16
17 struct intel_timeline *
18 __intel_timeline_create(struct intel_gt *gt,
19 struct i915_vma *global_hwsp,
20 unsigned int offset);
21
22 static inline struct intel_timeline *
intel_timeline_create(struct intel_gt * gt)23 intel_timeline_create(struct intel_gt *gt)
24 {
25 return __intel_timeline_create(gt, NULL, 0);
26 }
27
28 struct intel_timeline *
29 intel_timeline_create_from_engine(struct intel_engine_cs *engine,
30 unsigned int offset);
31
32 static inline struct intel_timeline *
intel_timeline_get(struct intel_timeline * timeline)33 intel_timeline_get(struct intel_timeline *timeline)
34 {
35 kref_get(&timeline->kref);
36 return timeline;
37 }
38
39 void __intel_timeline_free(struct kref *kref);
intel_timeline_put(struct intel_timeline * timeline)40 static inline void intel_timeline_put(struct intel_timeline *timeline)
41 {
42 kref_put(&timeline->kref, __intel_timeline_free);
43 }
44
__intel_timeline_sync_set(struct intel_timeline * tl,u64 context,u32 seqno)45 static inline int __intel_timeline_sync_set(struct intel_timeline *tl,
46 u64 context, u32 seqno)
47 {
48 return i915_syncmap_set(&tl->sync, context, seqno);
49 }
50
intel_timeline_sync_set(struct intel_timeline * tl,const struct dma_fence * fence)51 static inline int intel_timeline_sync_set(struct intel_timeline *tl,
52 const struct dma_fence *fence)
53 {
54 return __intel_timeline_sync_set(tl, fence->context, fence->seqno);
55 }
56
__intel_timeline_sync_is_later(struct intel_timeline * tl,u64 context,u32 seqno)57 static inline bool __intel_timeline_sync_is_later(struct intel_timeline *tl,
58 u64 context, u32 seqno)
59 {
60 return i915_syncmap_is_later(&tl->sync, context, seqno);
61 }
62
intel_timeline_sync_is_later(struct intel_timeline * tl,const struct dma_fence * fence)63 static inline bool intel_timeline_sync_is_later(struct intel_timeline *tl,
64 const struct dma_fence *fence)
65 {
66 return __intel_timeline_sync_is_later(tl, fence->context, fence->seqno);
67 }
68
69 void __intel_timeline_pin(struct intel_timeline *tl);
70 int intel_timeline_pin(struct intel_timeline *tl, struct i915_gem_ww_ctx *ww);
71 void intel_timeline_enter(struct intel_timeline *tl);
72 int intel_timeline_get_seqno(struct intel_timeline *tl,
73 struct i915_request *rq,
74 u32 *seqno);
75 void intel_timeline_exit(struct intel_timeline *tl);
76 void intel_timeline_unpin(struct intel_timeline *tl);
77
78 void intel_timeline_reset_seqno(const struct intel_timeline *tl);
79
80 int intel_timeline_read_hwsp(struct i915_request *from,
81 struct i915_request *until,
82 u32 *hwsp_offset);
83
84 void intel_gt_init_timelines(struct intel_gt *gt);
85 void intel_gt_fini_timelines(struct intel_gt *gt);
86
87 void intel_gt_show_timelines(struct intel_gt *gt,
88 struct drm_printer *m,
89 void (*show_request)(struct drm_printer *m,
90 const struct i915_request *rq,
91 const char *prefix,
92 int indent));
93
94 static inline bool
intel_timeline_is_last(const struct intel_timeline * tl,const struct i915_request * rq)95 intel_timeline_is_last(const struct intel_timeline *tl,
96 const struct i915_request *rq)
97 {
98 return list_is_last_rcu(&rq->link, &tl->requests);
99 }
100
101 I915_SELFTEST_DECLARE(int intel_timeline_pin_map(struct intel_timeline *tl));
102
103 #endif
104