| /lk-master/platform/mediatek/mt6735/ |
| A D | interrupts.c | 122 unsigned int irq; in platform_deinit_interrupts() local
148 unsigned int irq = DRV_Reg32(GIC_CPU_BASE + GIC_CPU_INTACK); in platform_irq() local
173 void mt_irq_set_polarity(unsigned int irq, unsigned int polarity) { in mt_irq_set_polarity()
196 void mt_irq_set_sens(unsigned int irq, unsigned int sens) { in mt_irq_set_sens()
215 void mt_irq_mask(unsigned int irq) { in mt_irq_mask()
226 void mt_irq_unmask(unsigned int irq) { in mt_irq_unmask()
237 void mt_irq_ack(unsigned int irq) { in mt_irq_ack()
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| /lk-master/platform/mediatek/common/gic/ |
| A D | mt_gic_v3.c | 212 unsigned int irq; in platform_deinit_interrupts() local
229 void mt_irq_set_polarity(unsigned int irq, unsigned int polarity) { in mt_irq_set_polarity()
252 void mt_irq_set_sens(unsigned int irq, unsigned int sens) { in mt_irq_set_sens()
271 void mt_irq_mask(unsigned int irq) { in mt_irq_mask()
282 void mt_irq_unmask(unsigned int irq) { in mt_irq_unmask()
293 void mt_irq_ack(unsigned int irq) { in mt_irq_ack()
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| /lk-master/dev/interrupt/arm_gic/ |
| A D | arm_gic.c | 53 static bool arm_gic_interrupt_change_allowed(int irq) { in arm_gic_interrupt_change_allowed()
63 static bool arm_gic_interrupt_change_allowed(int irq) { in arm_gic_interrupt_change_allowed()
277 static status_t arm_gic_set_secure_locked(u_int irq, bool secure) { in arm_gic_set_secure_locked()
295 static status_t arm_gic_set_target_locked(u_int irq, u_int cpu_mask, u_int enable_mask) { in arm_gic_set_target_locked()
313 static status_t arm_gic_get_priority(u_int irq) { in arm_gic_get_priority()
319 static status_t arm_gic_set_priority_locked(u_int irq, uint8_t priority) { in arm_gic_set_priority_locked()
335 status_t arm_gic_sgi(u_int irq, u_int flags, u_int cpu_mask) { in arm_gic_sgi()
419 uint32_t irq; in platform_irq() local
462 u_int irq; in arm_gic_get_next_irq_locked() local
565 u_int irq = GICREG(0, GICC_IAR) & 0x3ff; in sm_intc_fiq_enter() local
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| /lk-master/platform/qemu-virt-riscv/ |
| A D | plic.c | 23 #define PLIC_PRIORITY(irq) (PLIC_BASE_VIRT + 4 + 4 * (irq)) argument
24 #define PLIC_PENDING(irq) (PLIC_BASE_VIRT + 0x1000 + (4 * ((irq) / 32))) argument
25 #define PLIC_ENABLE(irq, hart) (PLIC_BASE_VIRT + 0x2000 + (0x80 * PLIC_HART_IDX(hart)) + (4 * … argument
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| /lk-master/platform/sifive/ |
| A D | plic.c | 24 #define PLIC_PRIORITY(irq) (PLIC_BASE + 4 * (irq)) argument
25 #define PLIC_PENDING(irq) (PLIC_BASE + 0x1000 + (4 * ((irq) / 32))) argument
26 #define PLIC_ENABLE(irq, hart) (PLIC_BASE + 0x2000 + (0x80 * PLIC_HART_IDX(hart)) + (4 * ((irq… argument
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| /lk-master/external/platform/pico/rp2_common/hardware_pio/include/hardware/ |
| A D | pio_instructions.h | 103 inline static uint _pio_encode_irq(bool relative, uint irq) { in _pio_encode_irq()
116 inline static uint pio_encode_wait_irq(bool polarity, bool relative, uint irq) { in pio_encode_wait_irq()
157 inline static uint pio_encode_irq_set(bool relative, uint irq) { in pio_encode_irq_set()
161 inline static uint pio_encode_irq_clear(bool relative, uint irq) { in pio_encode_irq_clear()
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| /lk-master/platform/pc/include/platform/ |
| A D | uart.h | 13 int irq; member
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| /lk-master/platform/mediatek/mt6797/ |
| A D | interrupts.c | 47 unsigned int irq = mt_irq_get(); in platform_irq() local
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| /lk-master/platform/qemu-virt-m68k/include/platform/ |
| A D | virt.h | 35 #define PIC_IRQ_TO_LINEAR(pic, irq) (((pic) - 1) * 32 + ((irq) - 1)) argument
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| /lk-master/dev/interrupt/or1k_pic/ |
| A D | or1k_pic.c | 64 uint irq = __builtin_ffs(mfspr(OR1K_SPR_PIC_PICSR_ADDR)) - 1; in platform_irq() local
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| /lk-master/dev/virtio/include/dev/ |
| A D | virtio.h | 28 uint irq; member
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| /lk-master/platform/microblaze/ |
| A D | intc.c | 77 uint irq = INTC_REG(R_IVR); in platform_irq_handler() local
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| /lk-master/dev/bus/pci/ |
| A D | pci_backend.h | 68 virtual int set_irq_hw_int(const pci_location_t *state, uint8_t int_pin, uint8_t irq) { in set_irq_hw_int()
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| A D | pci.cpp | 143 status_t pci_set_irq_hw_int(const pci_location_t *state, uint8_t int_pin, uint8_t irq) { in pci_set_irq_hw_int()
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| A D | bios32.cpp | 380 int pci_bios32::set_irq_hw_int(const pci_location_t *state, uint8_t int_pin, uint8_t irq) { in set_irq_hw_int()
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| /lk-master/platform/stm32f0xx/ |
| A D | exti.c | 81 #define STM32_DISPATCH_EXTI(pr, irq, resched) do { \ argument
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| A D | timer_capture.c | 36 int irq; member
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| /lk-master/external/platform/nrfx/drivers/include/ |
| A D | nrfx_rtc.h | 67 IRQn_Type irq; /**< Instance IRQ ID. */ member
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| /lk-master/external/platform/pico/rp2040/hardware_structs/include/hardware/structs/ |
| A D | pio.h | 21 io_rw_32 irq; member
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| /lk-master/platform/bcm28xx/ |
| A D | intc.c | 250 void bcm28xx_send_ipi(uint irq, uint cpu_mask) { in bcm28xx_send_ipi()
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| /lk-master/external/platform/pico/rp2_common/hardware_irq/ |
| A D | irq.c | 397 for (uint irq = 0; irq < NUM_IRQS; irq++) { in irq_init_priorities() local
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| /lk-master/dev/net/pcnet/ |
| A D | pcnet.c | 39 int irq; member
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| /lk-master/dev/timer/arm_generic/ |
| A D | arm_generic_timer.c | 286 void arm_generic_timer_init(int irq, uint32_t freq_override) { in arm_generic_timer_init()
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| /lk-master/platform/pc/ |
| A D | ide.c | 131 int irq; member
|