1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Copyright (C) 2020-2023 Intel Corporation
4 */
5
6 #ifndef __IVPU_HW_H__
7 #define __IVPU_HW_H__
8
9 #include "ivpu_drv.h"
10
11 struct ivpu_hw_ops {
12 int (*info_init)(struct ivpu_device *vdev);
13 int (*power_up)(struct ivpu_device *vdev);
14 int (*boot_fw)(struct ivpu_device *vdev);
15 int (*power_down)(struct ivpu_device *vdev);
16 bool (*is_idle)(struct ivpu_device *vdev);
17 void (*wdt_disable)(struct ivpu_device *vdev);
18 void (*diagnose_failure)(struct ivpu_device *vdev);
19 u32 (*reg_pll_freq_get)(struct ivpu_device *vdev);
20 u32 (*reg_telemetry_offset_get)(struct ivpu_device *vdev);
21 u32 (*reg_telemetry_size_get)(struct ivpu_device *vdev);
22 u32 (*reg_telemetry_enable_get)(struct ivpu_device *vdev);
23 void (*reg_db_set)(struct ivpu_device *vdev, u32 db_id);
24 u32 (*reg_ipc_rx_addr_get)(struct ivpu_device *vdev);
25 u32 (*reg_ipc_rx_count_get)(struct ivpu_device *vdev);
26 void (*reg_ipc_tx_set)(struct ivpu_device *vdev, u32 vpu_addr);
27 void (*irq_clear)(struct ivpu_device *vdev);
28 void (*irq_enable)(struct ivpu_device *vdev);
29 void (*irq_disable)(struct ivpu_device *vdev);
30 irqreturn_t (*irq_handler)(int irq, void *ptr);
31 };
32
33 struct ivpu_addr_range {
34 resource_size_t start;
35 resource_size_t end;
36 };
37
38 struct ivpu_hw_info {
39 const struct ivpu_hw_ops *ops;
40 struct {
41 struct ivpu_addr_range global_low;
42 struct ivpu_addr_range global_high;
43 struct ivpu_addr_range user_low;
44 struct ivpu_addr_range user_high;
45 struct ivpu_addr_range global_aliased_pio;
46 } ranges;
47 struct {
48 u8 min_ratio;
49 u8 max_ratio;
50 /*
51 * Pll ratio for the efficiency frequency. The VPU has optimum
52 * performance to power ratio at this frequency.
53 */
54 u8 pn_ratio;
55 u32 profiling_freq;
56 } pll;
57 u32 tile_fuse;
58 u32 sku;
59 u16 config;
60 };
61
62 extern const struct ivpu_hw_ops ivpu_hw_mtl_ops;
63
ivpu_hw_info_init(struct ivpu_device * vdev)64 static inline int ivpu_hw_info_init(struct ivpu_device *vdev)
65 {
66 return vdev->hw->ops->info_init(vdev);
67 };
68
ivpu_hw_power_up(struct ivpu_device * vdev)69 static inline int ivpu_hw_power_up(struct ivpu_device *vdev)
70 {
71 ivpu_dbg(vdev, PM, "HW power up\n");
72
73 return vdev->hw->ops->power_up(vdev);
74 };
75
ivpu_hw_boot_fw(struct ivpu_device * vdev)76 static inline int ivpu_hw_boot_fw(struct ivpu_device *vdev)
77 {
78 return vdev->hw->ops->boot_fw(vdev);
79 };
80
ivpu_hw_is_idle(struct ivpu_device * vdev)81 static inline bool ivpu_hw_is_idle(struct ivpu_device *vdev)
82 {
83 return vdev->hw->ops->is_idle(vdev);
84 };
85
ivpu_hw_power_down(struct ivpu_device * vdev)86 static inline int ivpu_hw_power_down(struct ivpu_device *vdev)
87 {
88 ivpu_dbg(vdev, PM, "HW power down\n");
89
90 return vdev->hw->ops->power_down(vdev);
91 };
92
ivpu_hw_wdt_disable(struct ivpu_device * vdev)93 static inline void ivpu_hw_wdt_disable(struct ivpu_device *vdev)
94 {
95 vdev->hw->ops->wdt_disable(vdev);
96 };
97
98 /* Register indirect accesses */
ivpu_hw_reg_pll_freq_get(struct ivpu_device * vdev)99 static inline u32 ivpu_hw_reg_pll_freq_get(struct ivpu_device *vdev)
100 {
101 return vdev->hw->ops->reg_pll_freq_get(vdev);
102 };
103
ivpu_hw_reg_telemetry_offset_get(struct ivpu_device * vdev)104 static inline u32 ivpu_hw_reg_telemetry_offset_get(struct ivpu_device *vdev)
105 {
106 return vdev->hw->ops->reg_telemetry_offset_get(vdev);
107 };
108
ivpu_hw_reg_telemetry_size_get(struct ivpu_device * vdev)109 static inline u32 ivpu_hw_reg_telemetry_size_get(struct ivpu_device *vdev)
110 {
111 return vdev->hw->ops->reg_telemetry_size_get(vdev);
112 };
113
ivpu_hw_reg_telemetry_enable_get(struct ivpu_device * vdev)114 static inline u32 ivpu_hw_reg_telemetry_enable_get(struct ivpu_device *vdev)
115 {
116 return vdev->hw->ops->reg_telemetry_enable_get(vdev);
117 };
118
ivpu_hw_reg_db_set(struct ivpu_device * vdev,u32 db_id)119 static inline void ivpu_hw_reg_db_set(struct ivpu_device *vdev, u32 db_id)
120 {
121 vdev->hw->ops->reg_db_set(vdev, db_id);
122 };
123
ivpu_hw_reg_ipc_rx_addr_get(struct ivpu_device * vdev)124 static inline u32 ivpu_hw_reg_ipc_rx_addr_get(struct ivpu_device *vdev)
125 {
126 return vdev->hw->ops->reg_ipc_rx_addr_get(vdev);
127 };
128
ivpu_hw_reg_ipc_rx_count_get(struct ivpu_device * vdev)129 static inline u32 ivpu_hw_reg_ipc_rx_count_get(struct ivpu_device *vdev)
130 {
131 return vdev->hw->ops->reg_ipc_rx_count_get(vdev);
132 };
133
ivpu_hw_reg_ipc_tx_set(struct ivpu_device * vdev,u32 vpu_addr)134 static inline void ivpu_hw_reg_ipc_tx_set(struct ivpu_device *vdev, u32 vpu_addr)
135 {
136 vdev->hw->ops->reg_ipc_tx_set(vdev, vpu_addr);
137 };
138
ivpu_hw_irq_clear(struct ivpu_device * vdev)139 static inline void ivpu_hw_irq_clear(struct ivpu_device *vdev)
140 {
141 vdev->hw->ops->irq_clear(vdev);
142 };
143
ivpu_hw_irq_enable(struct ivpu_device * vdev)144 static inline void ivpu_hw_irq_enable(struct ivpu_device *vdev)
145 {
146 vdev->hw->ops->irq_enable(vdev);
147 };
148
ivpu_hw_irq_disable(struct ivpu_device * vdev)149 static inline void ivpu_hw_irq_disable(struct ivpu_device *vdev)
150 {
151 vdev->hw->ops->irq_disable(vdev);
152 };
153
ivpu_hw_init_range(struct ivpu_addr_range * range,u64 start,u64 size)154 static inline void ivpu_hw_init_range(struct ivpu_addr_range *range, u64 start, u64 size)
155 {
156 range->start = start;
157 range->end = start + size;
158 }
159
ivpu_hw_range_size(const struct ivpu_addr_range * range)160 static inline u64 ivpu_hw_range_size(const struct ivpu_addr_range *range)
161 {
162 return range->end - range->start;
163 }
164
ivpu_hw_diagnose_failure(struct ivpu_device * vdev)165 static inline void ivpu_hw_diagnose_failure(struct ivpu_device *vdev)
166 {
167 vdev->hw->ops->diagnose_failure(vdev);
168 }
169
170 #endif /* __IVPU_HW_H__ */
171