1 /*
2 * Copyright 2015 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 */
23
24 #ifndef _DRM_GPU_SCHEDULER_H_
25 #define _DRM_GPU_SCHEDULER_H_
26
27 #include <drm/spsc_queue.h>
28 #include <linux/dma-fence.h>
29 #include <linux/completion.h>
30 #include <linux/xarray.h>
31 #include <linux/workqueue.h>
32
33 #define MAX_WAIT_SCHED_ENTITY_Q_EMPTY msecs_to_jiffies(1000)
34
35 /**
36 * DRM_SCHED_FENCE_DONT_PIPELINE - Prefent dependency pipelining
37 *
38 * Setting this flag on a scheduler fence prevents pipelining of jobs depending
39 * on this fence. In other words we always insert a full CPU round trip before
40 * dependen jobs are pushed to the hw queue.
41 */
42 #define DRM_SCHED_FENCE_DONT_PIPELINE DMA_FENCE_FLAG_USER_BITS
43
44 enum dma_resv_usage;
45 struct dma_resv;
46 struct drm_gem_object;
47
48 struct drm_gpu_scheduler;
49 struct drm_sched_rq;
50
51 /* These are often used as an (initial) index
52 * to an array, and as such should start at 0.
53 */
54 enum drm_sched_priority {
55 DRM_SCHED_PRIORITY_MIN,
56 DRM_SCHED_PRIORITY_NORMAL,
57 DRM_SCHED_PRIORITY_HIGH,
58 DRM_SCHED_PRIORITY_KERNEL,
59
60 DRM_SCHED_PRIORITY_COUNT,
61 DRM_SCHED_PRIORITY_UNSET = -2
62 };
63
64 /* Used to chose between FIFO and RR jobs scheduling */
65 extern int drm_sched_policy;
66
67 #define DRM_SCHED_POLICY_RR 0
68 #define DRM_SCHED_POLICY_FIFO 1
69
70 /**
71 * struct drm_sched_entity - A wrapper around a job queue (typically
72 * attached to the DRM file_priv).
73 *
74 * Entities will emit jobs in order to their corresponding hardware
75 * ring, and the scheduler will alternate between entities based on
76 * scheduling policy.
77 */
78 struct drm_sched_entity {
79 /**
80 * @list:
81 *
82 * Used to append this struct to the list of entities in the runqueue
83 * @rq under &drm_sched_rq.entities.
84 *
85 * Protected by &drm_sched_rq.lock of @rq.
86 */
87 struct list_head list;
88
89 /**
90 * @rq:
91 *
92 * Runqueue on which this entity is currently scheduled.
93 *
94 * FIXME: Locking is very unclear for this. Writers are protected by
95 * @rq_lock, but readers are generally lockless and seem to just race
96 * with not even a READ_ONCE.
97 */
98 struct drm_sched_rq *rq;
99
100 /**
101 * @sched_list:
102 *
103 * A list of schedulers (struct drm_gpu_scheduler). Jobs from this entity can
104 * be scheduled on any scheduler on this list.
105 *
106 * This can be modified by calling drm_sched_entity_modify_sched().
107 * Locking is entirely up to the driver, see the above function for more
108 * details.
109 *
110 * This will be set to NULL if &num_sched_list equals 1 and @rq has been
111 * set already.
112 *
113 * FIXME: This means priority changes through
114 * drm_sched_entity_set_priority() will be lost henceforth in this case.
115 */
116 struct drm_gpu_scheduler **sched_list;
117
118 /**
119 * @num_sched_list:
120 *
121 * Number of drm_gpu_schedulers in the @sched_list.
122 */
123 unsigned int num_sched_list;
124
125 /**
126 * @priority:
127 *
128 * Priority of the entity. This can be modified by calling
129 * drm_sched_entity_set_priority(). Protected by &rq_lock.
130 */
131 enum drm_sched_priority priority;
132
133 /**
134 * @rq_lock:
135 *
136 * Lock to modify the runqueue to which this entity belongs.
137 */
138 spinlock_t rq_lock;
139
140 /**
141 * @job_queue: the list of jobs of this entity.
142 */
143 struct spsc_queue job_queue;
144
145 /**
146 * @fence_seq:
147 *
148 * A linearly increasing seqno incremented with each new
149 * &drm_sched_fence which is part of the entity.
150 *
151 * FIXME: Callers of drm_sched_job_arm() need to ensure correct locking,
152 * this doesn't need to be atomic.
153 */
154 atomic_t fence_seq;
155
156 /**
157 * @fence_context:
158 *
159 * A unique context for all the fences which belong to this entity. The
160 * &drm_sched_fence.scheduled uses the fence_context but
161 * &drm_sched_fence.finished uses fence_context + 1.
162 */
163 uint64_t fence_context;
164
165 /**
166 * @dependency:
167 *
168 * The dependency fence of the job which is on the top of the job queue.
169 */
170 struct dma_fence *dependency;
171
172 /**
173 * @cb:
174 *
175 * Callback for the dependency fence above.
176 */
177 struct dma_fence_cb cb;
178
179 /**
180 * @guilty:
181 *
182 * Points to entities' guilty.
183 */
184 atomic_t *guilty;
185
186 /**
187 * @last_scheduled:
188 *
189 * Points to the finished fence of the last scheduled job. Only written
190 * by the scheduler thread, can be accessed locklessly from
191 * drm_sched_job_arm() iff the queue is empty.
192 */
193 struct dma_fence *last_scheduled;
194
195 /**
196 * @last_user: last group leader pushing a job into the entity.
197 */
198 struct task_struct *last_user;
199
200 /**
201 * @stopped:
202 *
203 * Marks the enity as removed from rq and destined for
204 * termination. This is set by calling drm_sched_entity_flush() and by
205 * drm_sched_fini().
206 */
207 bool stopped;
208
209 /**
210 * @entity_idle:
211 *
212 * Signals when entity is not in use, used to sequence entity cleanup in
213 * drm_sched_entity_fini().
214 */
215 struct completion entity_idle;
216
217 /**
218 * @oldest_job_waiting:
219 *
220 * Marks earliest job waiting in SW queue
221 */
222 ktime_t oldest_job_waiting;
223
224 /**
225 * @rb_tree_node:
226 *
227 * The node used to insert this entity into time based priority queue
228 */
229 struct rb_node rb_tree_node;
230
231 /**
232 * @elapsed_ns:
233 *
234 * Records the amount of time where jobs from this entity were active
235 * on the GPU.
236 */
237 uint64_t elapsed_ns;
238 };
239
240 /**
241 * struct drm_sched_rq - queue of entities to be scheduled.
242 *
243 * @lock: to modify the entities list.
244 * @sched: the scheduler to which this rq belongs to.
245 * @entities: list of the entities to be scheduled.
246 * @current_entity: the entity which is to be scheduled.
247 * @rb_tree_root: root of time based priory queue of entities for FIFO scheduling
248 *
249 * Run queue is a set of entities scheduling command submissions for
250 * one specific ring. It implements the scheduling policy that selects
251 * the next entity to emit commands from.
252 */
253 struct drm_sched_rq {
254 spinlock_t lock;
255 struct drm_gpu_scheduler *sched;
256 struct list_head entities;
257 struct drm_sched_entity *current_entity;
258 struct rb_root_cached rb_tree_root;
259 };
260
261 /**
262 * struct drm_sched_fence - fences corresponding to the scheduling of a job.
263 */
264 struct drm_sched_fence {
265 /**
266 * @scheduled: this fence is what will be signaled by the scheduler
267 * when the job is scheduled.
268 */
269 struct dma_fence scheduled;
270
271 /**
272 * @finished: this fence is what will be signaled by the scheduler
273 * when the job is completed.
274 *
275 * When setting up an out fence for the job, you should use
276 * this, since it's available immediately upon
277 * drm_sched_job_init(), and the fence returned by the driver
278 * from run_job() won't be created until the dependencies have
279 * resolved.
280 */
281 struct dma_fence finished;
282
283 /**
284 * @parent: the fence returned by &drm_sched_backend_ops.run_job
285 * when scheduling the job on hardware. We signal the
286 * &drm_sched_fence.finished fence once parent is signalled.
287 */
288 struct dma_fence *parent;
289 /**
290 * @sched: the scheduler instance to which the job having this struct
291 * belongs to.
292 */
293 struct drm_gpu_scheduler *sched;
294 /**
295 * @lock: the lock used by the scheduled and the finished fences.
296 */
297 spinlock_t lock;
298 /**
299 * @owner: job owner for debugging
300 */
301 void *owner;
302 };
303
304 struct drm_sched_fence *to_drm_sched_fence(struct dma_fence *f);
305
306 /**
307 * struct drm_sched_job - A job to be run by an entity.
308 *
309 * @queue_node: used to append this struct to the queue of jobs in an entity.
310 * @list: a job participates in a "pending" and "done" lists.
311 * @sched: the scheduler instance on which this job is scheduled.
312 * @s_fence: contains the fences for the scheduling of job.
313 * @finish_cb: the callback for the finished fence.
314 * @work: Helper to reschdeule job kill to different context.
315 * @id: a unique id assigned to each job scheduled on the scheduler.
316 * @karma: increment on every hang caused by this job. If this exceeds the hang
317 * limit of the scheduler then the job is marked guilty and will not
318 * be scheduled further.
319 * @s_priority: the priority of the job.
320 * @entity: the entity to which this job belongs.
321 * @cb: the callback for the parent fence in s_fence.
322 *
323 * A job is created by the driver using drm_sched_job_init(), and
324 * should call drm_sched_entity_push_job() once it wants the scheduler
325 * to schedule the job.
326 */
327 struct drm_sched_job {
328 struct spsc_node queue_node;
329 struct list_head list;
330 struct drm_gpu_scheduler *sched;
331 struct drm_sched_fence *s_fence;
332
333 /*
334 * work is used only after finish_cb has been used and will not be
335 * accessed anymore.
336 */
337 union {
338 struct dma_fence_cb finish_cb;
339 struct work_struct work;
340 };
341
342 uint64_t id;
343 atomic_t karma;
344 enum drm_sched_priority s_priority;
345 struct drm_sched_entity *entity;
346 struct dma_fence_cb cb;
347 /**
348 * @dependencies:
349 *
350 * Contains the dependencies as struct dma_fence for this job, see
351 * drm_sched_job_add_dependency() and
352 * drm_sched_job_add_implicit_dependencies().
353 */
354 struct xarray dependencies;
355
356 /** @last_dependency: tracks @dependencies as they signal */
357 unsigned long last_dependency;
358
359 /**
360 * @submit_ts:
361 *
362 * When the job was pushed into the entity queue.
363 */
364 ktime_t submit_ts;
365 };
366
drm_sched_invalidate_job(struct drm_sched_job * s_job,int threshold)367 static inline bool drm_sched_invalidate_job(struct drm_sched_job *s_job,
368 int threshold)
369 {
370 return s_job && atomic_inc_return(&s_job->karma) > threshold;
371 }
372
373 enum drm_gpu_sched_stat {
374 DRM_GPU_SCHED_STAT_NONE, /* Reserve 0 */
375 DRM_GPU_SCHED_STAT_NOMINAL,
376 DRM_GPU_SCHED_STAT_ENODEV,
377 };
378
379 /**
380 * struct drm_sched_backend_ops - Define the backend operations
381 * called by the scheduler
382 *
383 * These functions should be implemented in the driver side.
384 */
385 struct drm_sched_backend_ops {
386 /**
387 * @prepare_job:
388 *
389 * Called when the scheduler is considering scheduling this job next, to
390 * get another struct dma_fence for this job to block on. Once it
391 * returns NULL, run_job() may be called.
392 *
393 * Can be NULL if no additional preparation to the dependencies are
394 * necessary. Skipped when jobs are killed instead of run.
395 */
396 struct dma_fence *(*prepare_job)(struct drm_sched_job *sched_job,
397 struct drm_sched_entity *s_entity);
398
399 /**
400 * @run_job: Called to execute the job once all of the dependencies
401 * have been resolved. This may be called multiple times, if
402 * timedout_job() has happened and drm_sched_job_recovery()
403 * decides to try it again.
404 */
405 struct dma_fence *(*run_job)(struct drm_sched_job *sched_job);
406
407 /**
408 * @timedout_job: Called when a job has taken too long to execute,
409 * to trigger GPU recovery.
410 *
411 * This method is called in a workqueue context.
412 *
413 * Drivers typically issue a reset to recover from GPU hangs, and this
414 * procedure usually follows the following workflow:
415 *
416 * 1. Stop the scheduler using drm_sched_stop(). This will park the
417 * scheduler thread and cancel the timeout work, guaranteeing that
418 * nothing is queued while we reset the hardware queue
419 * 2. Try to gracefully stop non-faulty jobs (optional)
420 * 3. Issue a GPU reset (driver-specific)
421 * 4. Re-submit jobs using drm_sched_resubmit_jobs()
422 * 5. Restart the scheduler using drm_sched_start(). At that point, new
423 * jobs can be queued, and the scheduler thread is unblocked
424 *
425 * Note that some GPUs have distinct hardware queues but need to reset
426 * the GPU globally, which requires extra synchronization between the
427 * timeout handler of the different &drm_gpu_scheduler. One way to
428 * achieve this synchronization is to create an ordered workqueue
429 * (using alloc_ordered_workqueue()) at the driver level, and pass this
430 * queue to drm_sched_init(), to guarantee that timeout handlers are
431 * executed sequentially. The above workflow needs to be slightly
432 * adjusted in that case:
433 *
434 * 1. Stop all schedulers impacted by the reset using drm_sched_stop()
435 * 2. Try to gracefully stop non-faulty jobs on all queues impacted by
436 * the reset (optional)
437 * 3. Issue a GPU reset on all faulty queues (driver-specific)
438 * 4. Re-submit jobs on all schedulers impacted by the reset using
439 * drm_sched_resubmit_jobs()
440 * 5. Restart all schedulers that were stopped in step #1 using
441 * drm_sched_start()
442 *
443 * Return DRM_GPU_SCHED_STAT_NOMINAL, when all is normal,
444 * and the underlying driver has started or completed recovery.
445 *
446 * Return DRM_GPU_SCHED_STAT_ENODEV, if the device is no longer
447 * available, i.e. has been unplugged.
448 */
449 enum drm_gpu_sched_stat (*timedout_job)(struct drm_sched_job *sched_job);
450
451 /**
452 * @free_job: Called once the job's finished fence has been signaled
453 * and it's time to clean it up.
454 */
455 void (*free_job)(struct drm_sched_job *sched_job);
456 };
457
458 /**
459 * struct drm_gpu_scheduler - scheduler instance-specific data
460 *
461 * @ops: backend operations provided by the driver.
462 * @hw_submission_limit: the max size of the hardware queue.
463 * @timeout: the time after which a job is removed from the scheduler.
464 * @name: name of the ring for which this scheduler is being used.
465 * @sched_rq: priority wise array of run queues.
466 * @wake_up_worker: the wait queue on which the scheduler sleeps until a job
467 * is ready to be scheduled.
468 * @job_scheduled: once @drm_sched_entity_do_release is called the scheduler
469 * waits on this wait queue until all the scheduled jobs are
470 * finished.
471 * @hw_rq_count: the number of jobs currently in the hardware queue.
472 * @job_id_count: used to assign unique id to the each job.
473 * @timeout_wq: workqueue used to queue @work_tdr
474 * @work_tdr: schedules a delayed call to @drm_sched_job_timedout after the
475 * timeout interval is over.
476 * @thread: the kthread on which the scheduler which run.
477 * @pending_list: the list of jobs which are currently in the job queue.
478 * @job_list_lock: lock to protect the pending_list.
479 * @hang_limit: once the hangs by a job crosses this limit then it is marked
480 * guilty and it will no longer be considered for scheduling.
481 * @score: score to help loadbalancer pick a idle sched
482 * @_score: score used when the driver doesn't provide one
483 * @ready: marks if the underlying HW is ready to work
484 * @free_guilty: A hit to time out handler to free the guilty job.
485 * @dev: system &struct device
486 *
487 * One scheduler is implemented for each hardware ring.
488 */
489 struct drm_gpu_scheduler {
490 const struct drm_sched_backend_ops *ops;
491 uint32_t hw_submission_limit;
492 long timeout;
493 const char *name;
494 struct drm_sched_rq sched_rq[DRM_SCHED_PRIORITY_COUNT];
495 wait_queue_head_t wake_up_worker;
496 wait_queue_head_t job_scheduled;
497 atomic_t hw_rq_count;
498 atomic64_t job_id_count;
499 struct workqueue_struct *timeout_wq;
500 struct delayed_work work_tdr;
501 struct task_struct *thread;
502 struct list_head pending_list;
503 spinlock_t job_list_lock;
504 int hang_limit;
505 atomic_t *score;
506 atomic_t _score;
507 bool ready;
508 bool free_guilty;
509 struct device *dev;
510 };
511
512 int drm_sched_init(struct drm_gpu_scheduler *sched,
513 const struct drm_sched_backend_ops *ops,
514 uint32_t hw_submission, unsigned hang_limit,
515 long timeout, struct workqueue_struct *timeout_wq,
516 atomic_t *score, const char *name, struct device *dev);
517
518 void drm_sched_fini(struct drm_gpu_scheduler *sched);
519 int drm_sched_job_init(struct drm_sched_job *job,
520 struct drm_sched_entity *entity,
521 void *owner);
522 void drm_sched_job_arm(struct drm_sched_job *job);
523 int drm_sched_job_add_dependency(struct drm_sched_job *job,
524 struct dma_fence *fence);
525 int drm_sched_job_add_resv_dependencies(struct drm_sched_job *job,
526 struct dma_resv *resv,
527 enum dma_resv_usage usage);
528 int drm_sched_job_add_implicit_dependencies(struct drm_sched_job *job,
529 struct drm_gem_object *obj,
530 bool write);
531
532
533 void drm_sched_entity_modify_sched(struct drm_sched_entity *entity,
534 struct drm_gpu_scheduler **sched_list,
535 unsigned int num_sched_list);
536
537 void drm_sched_job_cleanup(struct drm_sched_job *job);
538 void drm_sched_wakeup(struct drm_gpu_scheduler *sched);
539 void drm_sched_stop(struct drm_gpu_scheduler *sched, struct drm_sched_job *bad);
540 void drm_sched_start(struct drm_gpu_scheduler *sched, bool full_recovery);
541 void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched);
542 void drm_sched_increase_karma(struct drm_sched_job *bad);
543 void drm_sched_reset_karma(struct drm_sched_job *bad);
544 void drm_sched_increase_karma_ext(struct drm_sched_job *bad, int type);
545 bool drm_sched_dependency_optimized(struct dma_fence* fence,
546 struct drm_sched_entity *entity);
547 void drm_sched_fault(struct drm_gpu_scheduler *sched);
548
549 void drm_sched_rq_add_entity(struct drm_sched_rq *rq,
550 struct drm_sched_entity *entity);
551 void drm_sched_rq_remove_entity(struct drm_sched_rq *rq,
552 struct drm_sched_entity *entity);
553
554 void drm_sched_rq_update_fifo(struct drm_sched_entity *entity, ktime_t ts);
555
556 int drm_sched_entity_init(struct drm_sched_entity *entity,
557 enum drm_sched_priority priority,
558 struct drm_gpu_scheduler **sched_list,
559 unsigned int num_sched_list,
560 atomic_t *guilty);
561 long drm_sched_entity_flush(struct drm_sched_entity *entity, long timeout);
562 void drm_sched_entity_fini(struct drm_sched_entity *entity);
563 void drm_sched_entity_destroy(struct drm_sched_entity *entity);
564 void drm_sched_entity_select_rq(struct drm_sched_entity *entity);
565 struct drm_sched_job *drm_sched_entity_pop_job(struct drm_sched_entity *entity);
566 void drm_sched_entity_push_job(struct drm_sched_job *sched_job);
567 void drm_sched_entity_set_priority(struct drm_sched_entity *entity,
568 enum drm_sched_priority priority);
569 bool drm_sched_entity_is_ready(struct drm_sched_entity *entity);
570
571 struct drm_sched_fence *drm_sched_fence_alloc(
572 struct drm_sched_entity *s_entity, void *owner);
573 void drm_sched_fence_init(struct drm_sched_fence *fence,
574 struct drm_sched_entity *entity);
575 void drm_sched_fence_free(struct drm_sched_fence *fence);
576
577 void drm_sched_fence_scheduled(struct drm_sched_fence *fence);
578 void drm_sched_fence_finished(struct drm_sched_fence *fence);
579
580 unsigned long drm_sched_suspend_timeout(struct drm_gpu_scheduler *sched);
581 void drm_sched_resume_timeout(struct drm_gpu_scheduler *sched,
582 unsigned long remaining);
583 struct drm_gpu_scheduler *
584 drm_sched_pick_best(struct drm_gpu_scheduler **sched_list,
585 unsigned int num_sched_list);
586
587 #endif
588