1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2016 MediaTek Inc. 4 * Author: Ming Hsiu Tsai <minghsiu.tsai@mediatek.com> 5 * Rick Chang <rick.chang@mediatek.com> 6 * Xia Jiang <xia.jiang@mediatek.com> 7 */ 8 9 #ifndef _MTK_JPEG_CORE_H 10 #define _MTK_JPEG_CORE_H 11 12 #include <linux/clk.h> 13 #include <linux/interrupt.h> 14 #include <media/v4l2-ctrls.h> 15 #include <media/v4l2-device.h> 16 #include <media/v4l2-fh.h> 17 #include <media/videobuf2-v4l2.h> 18 19 #include "mtk_jpeg_dec_hw.h" 20 21 #define MTK_JPEG_NAME "mtk-jpeg" 22 23 #define MTK_JPEG_FMT_FLAG_OUTPUT BIT(0) 24 #define MTK_JPEG_FMT_FLAG_CAPTURE BIT(1) 25 26 #define MTK_JPEG_MIN_WIDTH 32U 27 #define MTK_JPEG_MIN_HEIGHT 32U 28 #define MTK_JPEG_MAX_WIDTH 65535U 29 #define MTK_JPEG_MAX_HEIGHT 65535U 30 31 #define MTK_JPEG_DEFAULT_SIZEIMAGE (1 * 1024 * 1024) 32 33 #define MTK_JPEG_HW_TIMEOUT_MSEC 1000 34 35 #define MTK_JPEG_MAX_EXIF_SIZE (64 * 1024) 36 37 /** 38 * enum mtk_jpeg_ctx_state - states of the context state machine 39 * @MTK_JPEG_INIT: current state is initialized 40 * @MTK_JPEG_RUNNING: current state is running 41 * @MTK_JPEG_SOURCE_CHANGE: current state is source resolution change 42 */ 43 enum mtk_jpeg_ctx_state { 44 MTK_JPEG_INIT = 0, 45 MTK_JPEG_RUNNING, 46 MTK_JPEG_SOURCE_CHANGE, 47 }; 48 49 /** 50 * struct mtk_jpeg_variant - mtk jpeg driver variant 51 * @clks: clock names 52 * @num_clks: numbers of clock 53 * @formats: jpeg driver's internal color format 54 * @num_formats: number of formats 55 * @qops: the callback of jpeg vb2_ops 56 * @irq_handler: jpeg irq handler callback 57 * @hw_reset: jpeg hardware reset callback 58 * @m2m_ops: the callback of jpeg v4l2_m2m_ops 59 * @dev_name: jpeg device name 60 * @ioctl_ops: the callback of jpeg v4l2_ioctl_ops 61 * @out_q_default_fourcc: output queue default fourcc 62 * @cap_q_default_fourcc: capture queue default fourcc 63 */ 64 struct mtk_jpeg_variant { 65 struct clk_bulk_data *clks; 66 int num_clks; 67 struct mtk_jpeg_fmt *formats; 68 int num_formats; 69 const struct vb2_ops *qops; 70 irqreturn_t (*irq_handler)(int irq, void *priv); 71 void (*hw_reset)(void __iomem *base); 72 const struct v4l2_m2m_ops *m2m_ops; 73 const char *dev_name; 74 const struct v4l2_ioctl_ops *ioctl_ops; 75 u32 out_q_default_fourcc; 76 u32 cap_q_default_fourcc; 77 }; 78 79 struct mtk_jpeg_src_buf { 80 u32 frame_num; 81 struct vb2_v4l2_buffer b; 82 struct list_head list; 83 u32 bs_size; 84 struct mtk_jpeg_dec_param dec_param; 85 86 struct mtk_jpeg_ctx *curr_ctx; 87 }; 88 89 enum mtk_jpeg_hw_state { 90 MTK_JPEG_HW_IDLE = 0, 91 MTK_JPEG_HW_BUSY = 1, 92 }; 93 94 struct mtk_jpeg_hw_param { 95 struct vb2_v4l2_buffer *src_buffer; 96 struct vb2_v4l2_buffer *dst_buffer; 97 struct mtk_jpeg_ctx *curr_ctx; 98 }; 99 100 enum mtk_jpegenc_hw_id { 101 MTK_JPEGENC_HW0, 102 MTK_JPEGENC_HW1, 103 MTK_JPEGENC_HW_MAX, 104 }; 105 106 enum mtk_jpegdec_hw_id { 107 MTK_JPEGDEC_HW0, 108 MTK_JPEGDEC_HW1, 109 MTK_JPEGDEC_HW2, 110 MTK_JPEGDEC_HW_MAX, 111 }; 112 113 /** 114 * struct mtk_jpegenc_clk - Structure used to store vcodec clock information 115 * @clks: JPEG encode clock 116 * @clk_num: JPEG encode clock numbers 117 */ 118 struct mtk_jpegenc_clk { 119 struct clk_bulk_data *clks; 120 int clk_num; 121 }; 122 123 /** 124 * struct mtk_jpegdec_clk - Structure used to store vcodec clock information 125 * @clks: JPEG decode clock 126 * @clk_num: JPEG decode clock numbers 127 */ 128 struct mtk_jpegdec_clk { 129 struct clk_bulk_data *clks; 130 int clk_num; 131 }; 132 133 /** 134 * struct mtk_jpegenc_comp_dev - JPEG COREX abstraction 135 * @dev: JPEG device 136 * @plat_dev: platform device data 137 * @reg_base: JPEG registers mapping 138 * @master_dev: mtk_jpeg_dev device 139 * @venc_clk: jpeg encode clock 140 * @jpegenc_irq: jpeg encode irq num 141 * @job_timeout_work: encode timeout workqueue 142 * @hw_param: jpeg encode hw parameters 143 * @hw_rdy: record hw ready 144 * @hw_state: record hw state 145 * @hw_lock: spinlock protecting the hw device resource 146 */ 147 struct mtk_jpegenc_comp_dev { 148 struct device *dev; 149 struct platform_device *plat_dev; 150 void __iomem *reg_base; 151 struct mtk_jpeg_dev *master_dev; 152 struct mtk_jpegenc_clk venc_clk; 153 int jpegenc_irq; 154 struct delayed_work job_timeout_work; 155 struct mtk_jpeg_hw_param hw_param; 156 enum mtk_jpeg_hw_state hw_state; 157 /* spinlock protecting the hw device resource */ 158 spinlock_t hw_lock; 159 }; 160 161 /** 162 * struct mtk_jpegdec_comp_dev - JPEG COREX abstraction 163 * @dev: JPEG device 164 * @plat_dev: platform device data 165 * @reg_base: JPEG registers mapping 166 * @master_dev: mtk_jpeg_dev device 167 * @jdec_clk: mtk_jpegdec_clk 168 * @jpegdec_irq: jpeg decode irq num 169 * @job_timeout_work: decode timeout workqueue 170 * @hw_param: jpeg decode hw parameters 171 * @hw_state: record hw state 172 * @hw_lock: spinlock protecting hw 173 */ 174 struct mtk_jpegdec_comp_dev { 175 struct device *dev; 176 struct platform_device *plat_dev; 177 void __iomem *reg_base; 178 struct mtk_jpeg_dev *master_dev; 179 struct mtk_jpegdec_clk jdec_clk; 180 int jpegdec_irq; 181 struct delayed_work job_timeout_work; 182 struct mtk_jpeg_hw_param hw_param; 183 enum mtk_jpeg_hw_state hw_state; 184 /* spinlock protecting the hw device resource */ 185 spinlock_t hw_lock; 186 }; 187 188 /** 189 * struct mtk_jpeg_dev - JPEG IP abstraction 190 * @lock: the mutex protecting this structure 191 * @hw_lock: spinlock protecting the hw device resource 192 * @workqueue: decode work queue 193 * @dev: JPEG device 194 * @v4l2_dev: v4l2 device for mem2mem mode 195 * @m2m_dev: v4l2 mem2mem device data 196 * @alloc_ctx: videobuf2 memory allocator's context 197 * @vdev: video device node for jpeg mem2mem mode 198 * @reg_base: JPEG registers mapping 199 * @job_timeout_work: IRQ timeout structure 200 * @variant: driver variant to be used 201 * @reg_encbase: jpg encode register base addr 202 * @enc_hw_dev: jpg encode hardware device 203 * @is_jpgenc_multihw: the flag of multi-hw core 204 * @enc_hw_wq: jpg encode wait queue 205 * @enchw_rdy: jpg encode hw ready flag 206 * @reg_decbase: jpg decode register base addr 207 * @dec_hw_dev: jpg decode hardware device 208 * @is_jpgdec_multihw: the flag of dec multi-hw core 209 * @dec_hw_wq: jpg decode wait queue 210 * @dec_workqueue: jpg decode work queue 211 * @dechw_rdy: jpg decode hw ready flag 212 */ 213 struct mtk_jpeg_dev { 214 struct mutex lock; 215 spinlock_t hw_lock; 216 struct workqueue_struct *workqueue; 217 struct device *dev; 218 struct v4l2_device v4l2_dev; 219 struct v4l2_m2m_dev *m2m_dev; 220 void *alloc_ctx; 221 struct video_device *vdev; 222 void __iomem *reg_base; 223 struct delayed_work job_timeout_work; 224 const struct mtk_jpeg_variant *variant; 225 226 void __iomem *reg_encbase[MTK_JPEGENC_HW_MAX]; 227 struct mtk_jpegenc_comp_dev *enc_hw_dev[MTK_JPEGENC_HW_MAX]; 228 bool is_jpgenc_multihw; 229 wait_queue_head_t enc_hw_wq; 230 atomic_t enchw_rdy; 231 232 void __iomem *reg_decbase[MTK_JPEGDEC_HW_MAX]; 233 struct mtk_jpegdec_comp_dev *dec_hw_dev[MTK_JPEGDEC_HW_MAX]; 234 bool is_jpgdec_multihw; 235 wait_queue_head_t dec_hw_wq; 236 struct workqueue_struct *dec_workqueue; 237 atomic_t dechw_rdy; 238 }; 239 240 /** 241 * struct mtk_jpeg_fmt - driver's internal color format data 242 * @fourcc: the fourcc code, 0 if not applicable 243 * @hw_format: hardware format value 244 * @h_sample: horizontal sample count of plane in 4 * 4 pixel image 245 * @v_sample: vertical sample count of plane in 4 * 4 pixel image 246 * @colplanes: number of color planes (1 for packed formats) 247 * @h_align: horizontal alignment order (align to 2^h_align) 248 * @v_align: vertical alignment order (align to 2^v_align) 249 * @flags: flags describing format applicability 250 */ 251 struct mtk_jpeg_fmt { 252 u32 fourcc; 253 u32 hw_format; 254 int h_sample[VIDEO_MAX_PLANES]; 255 int v_sample[VIDEO_MAX_PLANES]; 256 int colplanes; 257 int h_align; 258 int v_align; 259 u32 flags; 260 }; 261 262 /** 263 * struct mtk_jpeg_q_data - parameters of one queue 264 * @fmt: driver-specific format of this queue 265 * @pix_mp: multiplanar format 266 * @enc_crop_rect: jpeg encoder crop information 267 */ 268 struct mtk_jpeg_q_data { 269 struct mtk_jpeg_fmt *fmt; 270 struct v4l2_pix_format_mplane pix_mp; 271 struct v4l2_rect enc_crop_rect; 272 }; 273 274 /** 275 * struct mtk_jpeg_ctx - the device context data 276 * @jpeg: JPEG IP device for this context 277 * @out_q: source (output) queue information 278 * @cap_q: destination queue information 279 * @fh: V4L2 file handle 280 * @state: state of the context 281 * @enable_exif: enable exif mode of jpeg encoder 282 * @enc_quality: jpeg encoder quality 283 * @restart_interval: jpeg encoder restart interval 284 * @ctrl_hdl: controls handler 285 * @jpeg_work: jpeg encoder workqueue 286 * @total_frame_num: encoded frame number 287 * @dst_done_queue: encoded frame buffer queue 288 * @done_queue_lock: encoded frame operation spinlock 289 * @last_done_frame_num: the last encoded frame number 290 */ 291 struct mtk_jpeg_ctx { 292 struct mtk_jpeg_dev *jpeg; 293 struct mtk_jpeg_q_data out_q; 294 struct mtk_jpeg_q_data cap_q; 295 struct v4l2_fh fh; 296 enum mtk_jpeg_ctx_state state; 297 bool enable_exif; 298 u8 enc_quality; 299 u8 restart_interval; 300 struct v4l2_ctrl_handler ctrl_hdl; 301 302 struct work_struct jpeg_work; 303 u32 total_frame_num; 304 struct list_head dst_done_queue; 305 /* spinlock protecting the encode done buffer */ 306 spinlock_t done_queue_lock; 307 u32 last_done_frame_num; 308 }; 309 310 #endif /* _MTK_JPEG_CORE_H */ 311