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/lk-master/external/platform/pico/rp2_common/hardware_gpio/include/hardware/
A Dgpio.h351 static inline void gpio_set_mask(uint32_t mask) { in gpio_set_mask()
360 static inline void gpio_clr_mask(uint32_t mask) { in gpio_clr_mask()
369 static inline void gpio_xor_mask(uint32_t mask) { in gpio_xor_mask()
384 static inline void gpio_put_masked(uint32_t mask, uint32_t value) { in gpio_put_masked()
404 uint32_t mask = 1ul << gpio; in gpio_put() local
422 static inline void gpio_set_dir_out_masked(uint32_t mask) { in gpio_set_dir_out_masked()
431 static inline void gpio_set_dir_in_masked(uint32_t mask) { in gpio_set_dir_in_masked()
446 static inline void gpio_set_dir_masked(uint32_t mask, uint32_t value) { in gpio_set_dir_masked()
466 uint32_t mask = 1ul << gpio; in gpio_set_dir() local
/lk-master/external/platform/nrfx/hal/
A Dnrf_rng.h195 NRF_STATIC_INLINE void nrf_rng_int_enable(NRF_RNG_Type * p_reg, uint32_t mask) in nrf_rng_int_enable()
200 NRF_STATIC_INLINE void nrf_rng_int_disable(NRF_RNG_Type * p_reg, uint32_t mask) in nrf_rng_int_disable()
205 NRF_STATIC_INLINE uint32_t nrf_rng_int_enable_check(NRF_RNG_Type const * p_reg, uint32_t mask) in nrf_rng_int_enable_check()
238 NRF_STATIC_INLINE void nrf_rng_shorts_enable(NRF_RNG_Type * p_reg, uint32_t mask) in nrf_rng_shorts_enable()
243 NRF_STATIC_INLINE void nrf_rng_shorts_disable(NRF_RNG_Type * p_reg, uint32_t mask) in nrf_rng_shorts_disable()
A Dnrf_twi.h343 uint32_t mask) in nrf_twi_shorts_enable()
349 uint32_t mask) in nrf_twi_shorts_disable()
355 uint32_t mask) in nrf_twi_int_enable()
361 uint32_t mask) in nrf_twi_int_disable()
366 NRF_STATIC_INLINE uint32_t nrf_twi_int_enable_check(NRF_TWI_Type const * p_reg, uint32_t mask) in nrf_twi_int_enable_check()
448 uint32_t mask) in nrf_twi_shorts_set()
A Dnrf_mwu.h299 NRF_STATIC_INLINE void nrf_mwu_int_enable(NRF_MWU_Type * p_reg, uint32_t mask) in nrf_mwu_int_enable()
304 NRF_STATIC_INLINE uint32_t nrf_mwu_int_enable_check(NRF_MWU_Type const * p_reg, uint32_t mask) in nrf_mwu_int_enable_check()
309 NRF_STATIC_INLINE void nrf_mwu_int_disable(NRF_MWU_Type * p_reg, uint32_t mask) in nrf_mwu_int_disable()
314 NRF_STATIC_INLINE void nrf_mwu_nmi_enable(NRF_MWU_Type * p_reg, uint32_t mask) in nrf_mwu_nmi_enable()
319 NRF_STATIC_INLINE uint32_t nrf_mwu_nmi_enable_check(NRF_MWU_Type const * p_reg, uint32_t mask) in nrf_mwu_nmi_enable_check()
324 NRF_STATIC_INLINE void nrf_mwu_nmi_disable(NRF_MWU_Type * p_reg, uint32_t mask) in nrf_mwu_nmi_disable()
A Dnrf_ccm.h395 uint32_t mask) in nrf_ccm_shorts_enable()
401 uint32_t mask) in nrf_ccm_shorts_disable()
407 uint32_t mask) in nrf_ccm_shorts_set()
412 NRF_STATIC_INLINE void nrf_ccm_int_enable(NRF_CCM_Type * p_reg, uint32_t mask) in nrf_ccm_int_enable()
417 NRF_STATIC_INLINE void nrf_ccm_int_disable(NRF_CCM_Type * p_reg, uint32_t mask) in nrf_ccm_int_disable()
422 NRF_STATIC_INLINE uint32_t nrf_ccm_int_enable_check(NRF_CCM_Type const * p_reg, uint32_t mask) in nrf_ccm_int_enable_check()
A Dnrf_dcnf.h150 uint32_t mask) in nrf_dcnf_peripheral_access_set()
165 uint32_t mask) in nrf_dcnf_ram_access_set()
180 uint32_t mask) in nrf_dcnf_code_access_set()
A Dnrf_rtc.h302 NRF_STATIC_INLINE void nrf_rtc_int_enable(NRF_RTC_Type * p_reg, uint32_t mask) in nrf_rtc_int_enable()
307 NRF_STATIC_INLINE void nrf_rtc_int_disable(NRF_RTC_Type * p_reg, uint32_t mask) in nrf_rtc_int_disable()
312 NRF_STATIC_INLINE uint32_t nrf_rtc_int_enable_check(NRF_RTC_Type const * p_reg, uint32_t mask) in nrf_rtc_int_enable_check()
391 NRF_STATIC_INLINE void nrf_rtc_event_enable(NRF_RTC_Type * p_reg, uint32_t mask) in nrf_rtc_event_enable()
396 NRF_STATIC_INLINE void nrf_rtc_event_disable(NRF_RTC_Type * p_reg, uint32_t mask) in nrf_rtc_event_disable()
A Dnrf_usbreg.h144 NRF_STATIC_INLINE void nrf_usbreg_int_enable(NRF_USBREG_Type * p_reg, uint32_t mask) in nrf_usbreg_int_enable()
149 NRF_STATIC_INLINE void nrf_usbreg_int_disable(NRF_USBREG_Type * p_reg, uint32_t mask) in nrf_usbreg_int_disable()
155 uint32_t mask) in nrf_usbreg_int_enable_check()
A Dnrf_fpu.h133 NRF_STATIC_INLINE void nrf_fpu_int_enable(NRF_FPU_Type * p_reg, uint32_t mask) in nrf_fpu_int_enable()
138 NRF_STATIC_INLINE void nrf_fpu_int_disable(NRF_FPU_Type * p_reg, uint32_t mask) in nrf_fpu_int_disable()
143 NRF_STATIC_INLINE uint32_t nrf_fpu_int_enable_check(NRF_FPU_Type const * p_reg, uint32_t mask) in nrf_fpu_int_enable_check()
A Dnrf_twim.h463 uint32_t mask) in nrf_twim_shorts_enable()
469 uint32_t mask) in nrf_twim_shorts_disable()
475 uint32_t mask) in nrf_twim_int_enable()
481 uint32_t mask) in nrf_twim_int_disable()
486 NRF_STATIC_INLINE uint32_t nrf_twim_int_enable_check(NRF_TWIM_Type const * p_reg, uint32_t mask) in nrf_twim_int_enable_check()
588 uint32_t mask) in nrf_twim_shorts_set()
A Dnrf_temp.h155 NRF_STATIC_INLINE void nrf_temp_int_enable(NRF_TEMP_Type * p_reg, uint32_t mask) in nrf_temp_int_enable()
160 NRF_STATIC_INLINE void nrf_temp_int_disable(NRF_TEMP_Type * p_reg, uint32_t mask) in nrf_temp_int_disable()
165 NRF_STATIC_INLINE uint32_t nrf_temp_int_enable_check(NRF_TEMP_Type const * p_reg, uint32_t mask) in nrf_temp_int_enable_check()
A Dnrf_pwm.h570 NRF_STATIC_INLINE void nrf_pwm_shorts_enable(NRF_PWM_Type * p_reg, uint32_t mask) in nrf_pwm_shorts_enable()
575 NRF_STATIC_INLINE void nrf_pwm_shorts_disable(NRF_PWM_Type * p_reg, uint32_t mask) in nrf_pwm_shorts_disable()
580 NRF_STATIC_INLINE void nrf_pwm_shorts_set(NRF_PWM_Type * p_reg, uint32_t mask) in nrf_pwm_shorts_set()
585 NRF_STATIC_INLINE void nrf_pwm_int_enable(NRF_PWM_Type * p_reg, uint32_t mask) in nrf_pwm_int_enable()
590 NRF_STATIC_INLINE void nrf_pwm_int_disable(NRF_PWM_Type * p_reg, uint32_t mask) in nrf_pwm_int_disable()
595 NRF_STATIC_INLINE void nrf_pwm_int_set(NRF_PWM_Type * p_reg, uint32_t mask) in nrf_pwm_int_set()
600 NRF_STATIC_INLINE uint32_t nrf_pwm_int_enable_check(NRF_PWM_Type const * p_reg, uint32_t mask) in nrf_pwm_int_enable_check()
A Dnrf_ecb.h195 NRF_STATIC_INLINE void nrf_ecb_int_enable(NRF_ECB_Type * p_reg, uint32_t mask) in nrf_ecb_int_enable()
200 NRF_STATIC_INLINE void nrf_ecb_int_disable(NRF_ECB_Type * p_reg, uint32_t mask) in nrf_ecb_int_disable()
205 NRF_STATIC_INLINE uint32_t nrf_ecb_int_enable_check(NRF_ECB_Type const * p_reg, uint32_t mask) in nrf_ecb_int_enable_check()
A Dnrf_spis.h485 uint32_t mask) in nrf_spis_shorts_enable()
491 uint32_t mask) in nrf_spis_shorts_disable()
497 uint32_t mask) in nrf_spis_int_enable()
503 uint32_t mask) in nrf_spis_int_disable()
508 NRF_STATIC_INLINE uint32_t nrf_spis_int_enable_check(NRF_SPIS_Type const * p_reg, uint32_t mask) in nrf_spis_int_enable_check()
A Dnrf_comp.h438 NRF_STATIC_INLINE void nrf_comp_int_enable(NRF_COMP_Type * p_reg, uint32_t mask) in nrf_comp_int_enable()
443 NRF_STATIC_INLINE void nrf_comp_int_disable(NRF_COMP_Type * p_reg, uint32_t mask) in nrf_comp_int_disable()
448 NRF_STATIC_INLINE uint32_t nrf_comp_int_enable_check(NRF_COMP_Type const * p_reg, uint32_t mask) in nrf_comp_int_enable_check()
465 NRF_STATIC_INLINE void nrf_comp_shorts_enable(NRF_COMP_Type * p_reg, uint32_t mask) in nrf_comp_shorts_enable()
470 NRF_STATIC_INLINE void nrf_comp_shorts_disable(NRF_COMP_Type * p_reg, uint32_t mask) in nrf_comp_shorts_disable()
A Dnrf_timer.h591 uint32_t mask) in nrf_timer_shorts_enable()
597 uint32_t mask) in nrf_timer_shorts_disable()
603 uint32_t mask) in nrf_timer_shorts_set()
609 uint32_t mask) in nrf_timer_int_enable()
615 uint32_t mask) in nrf_timer_int_disable()
620 NRF_STATIC_INLINE uint32_t nrf_timer_int_enable_check(NRF_TIMER_Type const * p_reg, uint32_t mask) in nrf_timer_int_enable_check()
A Dnrf_kmu.h225 NRF_STATIC_INLINE void nrf_kmu_int_enable(NRF_KMU_Type * p_reg, uint32_t mask) in nrf_kmu_int_enable()
230 NRF_STATIC_INLINE void nrf_kmu_int_disable(NRF_KMU_Type * p_reg, uint32_t mask) in nrf_kmu_int_disable()
235 NRF_STATIC_INLINE uint32_t nrf_kmu_int_enable_check(NRF_KMU_Type const * p_reg, uint32_t mask) in nrf_kmu_int_enable_check()
A Dnrf_qdec.h478 NRF_STATIC_INLINE void nrf_qdec_int_enable(NRF_QDEC_Type * p_reg, uint32_t mask) in nrf_qdec_int_enable()
483 NRF_STATIC_INLINE void nrf_qdec_int_disable(NRF_QDEC_Type * p_reg, uint32_t mask) in nrf_qdec_int_disable()
488 NRF_STATIC_INLINE uint32_t nrf_qdec_int_enable_check(NRF_QDEC_Type const * p_reg, uint32_t mask) in nrf_qdec_int_enable_check()
595 NRF_STATIC_INLINE void nrf_qdec_shorts_enable(NRF_QDEC_Type * p_reg, uint32_t mask) in nrf_qdec_shorts_enable()
600 NRF_STATIC_INLINE void nrf_qdec_shorts_disable(NRF_QDEC_Type * p_reg, uint32_t mask) in nrf_qdec_shorts_disable()
A Dnrf_twis.h592 NRF_STATIC_INLINE void nrf_twis_shorts_enable(NRF_TWIS_Type * p_reg, uint32_t mask) in nrf_twis_shorts_enable()
597 NRF_STATIC_INLINE void nrf_twis_shorts_disable(NRF_TWIS_Type * p_reg, uint32_t mask) in nrf_twis_shorts_disable()
615 NRF_STATIC_INLINE void nrf_twis_int_enable(NRF_TWIS_Type * p_reg, uint32_t mask) in nrf_twis_int_enable()
620 NRF_STATIC_INLINE uint32_t nrf_twis_int_enable_check(NRF_TWIS_Type const * p_reg, uint32_t mask) in nrf_twis_int_enable_check()
625 NRF_STATIC_INLINE void nrf_twis_int_disable(NRF_TWIS_Type * p_reg, uint32_t mask) in nrf_twis_int_disable()
A Dnrf_aar.h281 NRF_STATIC_INLINE void nrf_aar_int_enable(NRF_AAR_Type * p_reg, uint32_t mask) in nrf_aar_int_enable()
286 NRF_STATIC_INLINE uint32_t nrf_aar_int_enable_check(NRF_AAR_Type const * p_reg, uint32_t mask) in nrf_aar_int_enable_check()
291 NRF_STATIC_INLINE void nrf_aar_int_disable(NRF_AAR_Type * p_reg, uint32_t mask) in nrf_aar_int_disable()
/lk-master/external/platform/nrfx/drivers/src/
A Dnrfx_rtc.c101 uint32_t mask = NRF_RTC_INT_TICK_MASK | in nrfx_rtc_uninit() local
226 uint32_t mask = NRF_RTC_INT_TICK_MASK; in nrfx_rtc_tick_enable() local
239 uint32_t mask = NRF_RTC_INT_TICK_MASK; in nrfx_rtc_tick_disable() local
249 uint32_t mask = NRF_RTC_INT_OVERFLOW_MASK; in nrfx_rtc_overflow_enable() local
261 uint32_t mask = NRF_RTC_INT_OVERFLOW_MASK; in nrfx_rtc_overflow_disable() local
/lk-master/platform/mediatek/mt6735/
A Dinterrupts.c216 unsigned int mask = 1 << (irq % 32); in mt_irq_mask() local
227 unsigned int mask = 1 << (irq % 32); in mt_irq_unmask() local
247 int mt_irq_mask_all(struct mtk_irq_mask *mask) { in mt_irq_mask_all()
284 int mt_irq_mask_restore(struct mtk_irq_mask *mask) { in mt_irq_mask_restore()
/lk-master/external/arch/arm/arm-m/CMSIS/Include/
A Dpmu_armv8.h244 __STATIC_INLINE void ARM_PMU_CNTR_Enable(uint32_t mask) in ARM_PMU_CNTR_Enable()
256 __STATIC_INLINE void ARM_PMU_CNTR_Disable(uint32_t mask) in ARM_PMU_CNTR_Disable()
298 __STATIC_INLINE void ARM_PMU_Set_CNTR_OVS(uint32_t mask) in ARM_PMU_Set_CNTR_OVS()
310 __STATIC_INLINE void ARM_PMU_Set_CNTR_IRQ_Enable(uint32_t mask) in ARM_PMU_Set_CNTR_IRQ_Enable()
322 __STATIC_INLINE void ARM_PMU_Set_CNTR_IRQ_Disable(uint32_t mask) in ARM_PMU_Set_CNTR_IRQ_Disable()
332 __STATIC_INLINE void ARM_PMU_CNTR_Increment(uint32_t mask) in ARM_PMU_CNTR_Increment()
/lk-master/platform/mediatek/common/gic/
A Dmt_gic_v3.c272 unsigned int mask = 1 << (irq % 32); in mt_irq_mask() local
283 unsigned int mask = 1 << (irq % 32); in mt_irq_unmask() local
303 int mt_irq_mask_all(struct mtk_irq_mask *mask) { in mt_irq_mask_all()
328 int mt_irq_mask_restore(struct mtk_irq_mask *mask) { in mt_irq_mask_restore()
/lk-master/external/platform/pico/rp2_common/hardware_base/include/hardware/
A Daddress_mapped.h83 inline static void hw_set_bits(io_rw_32 *addr, uint32_t mask) { in hw_set_bits()
93 inline static void hw_clear_bits(io_rw_32 *addr, uint32_t mask) { in hw_clear_bits()
103 inline static void hw_xor_bits(io_rw_32 *addr, uint32_t mask) { in hw_xor_bits()

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