1 /*
2  * This file is part of the MicroPython project, http://micropython.org/
3  *
4  * The MIT License (MIT)
5  *
6  * Copyright (c) 2016-2018 Damien P. George
7  *
8  * Permission is hereby granted, free of charge, to any person obtaining a copy
9  * of this software and associated documentation files (the "Software"), to deal
10  * in the Software without restriction, including without limitation the rights
11  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12  * copies of the Software, and to permit persons to whom the Software is
13  * furnished to do so, subject to the following conditions:
14  *
15  * The above copyright notice and this permission notice shall be included in
16  * all copies or substantial portions of the Software.
17  *
18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
21  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24  * THE SOFTWARE.
25  */
26 
27 #include <stdio.h>
28 #include <string.h>
29 
30 #include "py/mperrno.h"
31 #include "py/mphal.h"
32 #include "drivers/memory/spiflash.h"
33 
34 #define QSPI_QE_MASK (0x02)
35 #define USE_WR_DELAY (1)
36 
37 #define CMD_WRSR        (0x01)
38 #define CMD_WRITE       (0x02)
39 #define CMD_READ        (0x03)
40 #define CMD_RDSR        (0x05)
41 #define CMD_WREN        (0x06)
42 #define CMD_SEC_ERASE   (0x20)
43 #define CMD_RDCR        (0x35)
44 #define CMD_RD_DEVID    (0x9f)
45 #define CMD_CHIP_ERASE  (0xc7)
46 #define CMD_C4READ      (0xeb)
47 
48 // 32 bit addressing commands
49 #define CMD_WRITE_32    (0x12)
50 #define CMD_READ_32     (0x13)
51 #define CMD_SEC_ERASE_32 (0x21)
52 #define CMD_C4READ_32   (0xec)
53 
54 #define WAIT_SR_TIMEOUT (1000000)
55 
56 #define PAGE_SIZE (256) // maximum bytes we can write in one SPI transfer
57 #define SECTOR_SIZE MP_SPIFLASH_ERASE_BLOCK_SIZE
58 
mp_spiflash_acquire_bus(mp_spiflash_t * self)59 STATIC void mp_spiflash_acquire_bus(mp_spiflash_t *self) {
60     const mp_spiflash_config_t *c = self->config;
61     if (c->bus_kind == MP_SPIFLASH_BUS_QSPI) {
62         c->bus.u_qspi.proto->ioctl(c->bus.u_qspi.data, MP_QSPI_IOCTL_BUS_ACQUIRE);
63     }
64 }
65 
mp_spiflash_release_bus(mp_spiflash_t * self)66 STATIC void mp_spiflash_release_bus(mp_spiflash_t *self) {
67     const mp_spiflash_config_t *c = self->config;
68     if (c->bus_kind == MP_SPIFLASH_BUS_QSPI) {
69         c->bus.u_qspi.proto->ioctl(c->bus.u_qspi.data, MP_QSPI_IOCTL_BUS_RELEASE);
70     }
71 }
72 
mp_spiflash_write_cmd_data(mp_spiflash_t * self,uint8_t cmd,size_t len,uint32_t data)73 STATIC void mp_spiflash_write_cmd_data(mp_spiflash_t *self, uint8_t cmd, size_t len, uint32_t data) {
74     const mp_spiflash_config_t *c = self->config;
75     if (c->bus_kind == MP_SPIFLASH_BUS_SPI) {
76         // Note: len/data are unused for standard SPI
77         mp_hal_pin_write(c->bus.u_spi.cs, 0);
78         c->bus.u_spi.proto->transfer(c->bus.u_spi.data, 1, &cmd, NULL);
79         mp_hal_pin_write(c->bus.u_spi.cs, 1);
80     } else {
81         c->bus.u_qspi.proto->write_cmd_data(c->bus.u_qspi.data, cmd, len, data);
82     }
83 }
84 
mp_spiflash_transfer_cmd_addr_data(mp_spiflash_t * self,uint8_t cmd,uint32_t addr,size_t len,const uint8_t * src,uint8_t * dest)85 STATIC void mp_spiflash_transfer_cmd_addr_data(mp_spiflash_t *self, uint8_t cmd, uint32_t addr, size_t len, const uint8_t *src, uint8_t *dest) {
86     const mp_spiflash_config_t *c = self->config;
87     if (c->bus_kind == MP_SPIFLASH_BUS_SPI) {
88         uint8_t buf[5] = {cmd, 0};
89         uint8_t buff_len = 1 + mp_spi_set_addr_buff(&buf[1], addr);
90         mp_hal_pin_write(c->bus.u_spi.cs, 0);
91         c->bus.u_spi.proto->transfer(c->bus.u_spi.data, buff_len, buf, NULL);
92         if (len && (src != NULL)) {
93             c->bus.u_spi.proto->transfer(c->bus.u_spi.data, len, src, NULL);
94         } else if (len && (dest != NULL)) {
95             c->bus.u_spi.proto->transfer(c->bus.u_spi.data, len, dest, dest);
96         }
97 
98         mp_hal_pin_write(c->bus.u_spi.cs, 1);
99     } else {
100         if (dest != NULL) {
101             c->bus.u_qspi.proto->read_cmd_qaddr_qdata(c->bus.u_qspi.data, cmd, addr, len, dest);
102         } else {
103             c->bus.u_qspi.proto->write_cmd_addr_data(c->bus.u_qspi.data, cmd, addr, len, src);
104         }
105     }
106 }
107 
mp_spiflash_read_cmd(mp_spiflash_t * self,uint8_t cmd,size_t len)108 STATIC uint32_t mp_spiflash_read_cmd(mp_spiflash_t *self, uint8_t cmd, size_t len) {
109     const mp_spiflash_config_t *c = self->config;
110     if (c->bus_kind == MP_SPIFLASH_BUS_SPI) {
111         uint32_t buf;
112         mp_hal_pin_write(c->bus.u_spi.cs, 0);
113         c->bus.u_spi.proto->transfer(c->bus.u_spi.data, 1, &cmd, NULL);
114         c->bus.u_spi.proto->transfer(c->bus.u_spi.data, len, (void*)&buf, (void*)&buf);
115         mp_hal_pin_write(c->bus.u_spi.cs, 1);
116         return buf;
117     } else {
118         return c->bus.u_qspi.proto->read_cmd(c->bus.u_qspi.data, cmd, len);
119     }
120 }
121 
mp_spiflash_read_data(mp_spiflash_t * self,uint32_t addr,size_t len,uint8_t * dest)122 STATIC void mp_spiflash_read_data(mp_spiflash_t *self, uint32_t addr, size_t len, uint8_t *dest) {
123     const mp_spiflash_config_t *c = self->config;
124     uint8_t cmd;
125     if (c->bus_kind == MP_SPIFLASH_BUS_SPI) {
126         cmd = MP_SPI_ADDR_IS_32B(addr) ? CMD_READ_32 : CMD_READ;
127     } else {
128         cmd = MP_SPI_ADDR_IS_32B(addr) ? CMD_C4READ_32 : CMD_C4READ;
129     }
130     mp_spiflash_transfer_cmd_addr_data(self, cmd, addr, len, NULL, dest);
131 }
132 
mp_spiflash_write_cmd(mp_spiflash_t * self,uint8_t cmd)133 STATIC void mp_spiflash_write_cmd(mp_spiflash_t *self, uint8_t cmd) {
134     mp_spiflash_write_cmd_data(self, cmd, 0, 0);
135 }
136 
mp_spiflash_wait_sr(mp_spiflash_t * self,uint8_t mask,uint8_t val,uint32_t timeout)137 STATIC int mp_spiflash_wait_sr(mp_spiflash_t *self, uint8_t mask, uint8_t val, uint32_t timeout) {
138     uint8_t sr;
139     do {
140         sr = mp_spiflash_read_cmd(self, CMD_RDSR, 1);
141         if ((sr & mask) == val) {
142             return 0; // success
143         }
144     } while (timeout--);
145 
146     return -MP_ETIMEDOUT;
147 }
148 
mp_spiflash_wait_wel1(mp_spiflash_t * self)149 STATIC int mp_spiflash_wait_wel1(mp_spiflash_t *self) {
150     return mp_spiflash_wait_sr(self, 2, 2, WAIT_SR_TIMEOUT);
151 }
152 
mp_spiflash_wait_wip0(mp_spiflash_t * self)153 STATIC int mp_spiflash_wait_wip0(mp_spiflash_t *self) {
154     return mp_spiflash_wait_sr(self, 1, 0, WAIT_SR_TIMEOUT);
155 }
156 
mp_spiflash_deepsleep_internal(mp_spiflash_t * self,int value)157 static inline void mp_spiflash_deepsleep_internal(mp_spiflash_t *self, int value) {
158     mp_spiflash_write_cmd(self, value ? 0xb9 : 0xab); // sleep/wake
159 }
160 
mp_spiflash_init(mp_spiflash_t * self)161 void mp_spiflash_init(mp_spiflash_t *self) {
162     self->flags = 0;
163 
164     if (self->config->bus_kind == MP_SPIFLASH_BUS_SPI) {
165         mp_hal_pin_write(self->config->bus.u_spi.cs, 1);
166         mp_hal_pin_output(self->config->bus.u_spi.cs);
167         self->config->bus.u_spi.proto->ioctl(self->config->bus.u_spi.data, MP_SPI_IOCTL_INIT);
168     } else {
169         self->config->bus.u_qspi.proto->ioctl(self->config->bus.u_qspi.data, MP_QSPI_IOCTL_INIT);
170     }
171 
172     mp_spiflash_acquire_bus(self);
173 
174     // Ensure SPI flash is out of sleep mode
175     mp_spiflash_deepsleep_internal(self, 0);
176 
177     #if defined(CHECK_DEVID)
178     // Validate device id
179     uint32_t devid = mp_spiflash_read_cmd(self, CMD_RD_DEVID, 3);
180     if (devid != CHECK_DEVID) {
181         return 0;
182     }
183     #endif
184 
185     if (self->config->bus_kind == MP_SPIFLASH_BUS_QSPI) {
186         // Set QE bit
187         uint32_t data = (mp_spiflash_read_cmd(self, CMD_RDSR, 1) & 0xff)
188             | (mp_spiflash_read_cmd(self, CMD_RDCR, 1) & 0xff) << 8;
189         if (!(data & (QSPI_QE_MASK << 8))) {
190             data |= QSPI_QE_MASK << 8;
191             mp_spiflash_write_cmd(self, CMD_WREN);
192             mp_spiflash_write_cmd_data(self, CMD_WRSR, 2, data);
193             mp_spiflash_wait_wip0(self);
194         }
195     }
196 
197     mp_spiflash_release_bus(self);
198 }
199 
mp_spiflash_deepsleep(mp_spiflash_t * self,int value)200 void mp_spiflash_deepsleep(mp_spiflash_t *self, int value) {
201     if (value) {
202         mp_spiflash_acquire_bus(self);
203     }
204     mp_spiflash_deepsleep_internal(self, value);
205     if (!value) {
206         mp_spiflash_release_bus(self);
207     }
208 }
209 
mp_spiflash_erase_block_internal(mp_spiflash_t * self,uint32_t addr)210 STATIC int mp_spiflash_erase_block_internal(mp_spiflash_t *self, uint32_t addr) {
211     // enable writes
212     mp_spiflash_write_cmd(self, CMD_WREN);
213 
214     // wait WEL=1
215     int ret = mp_spiflash_wait_wel1(self);
216     if (ret != 0) {
217         return ret;
218     }
219 
220     // erase the sector
221     uint8_t cmd = MP_SPI_ADDR_IS_32B(addr) ? CMD_SEC_ERASE_32 : CMD_SEC_ERASE;
222     mp_spiflash_transfer_cmd_addr_data(self, cmd, addr, 0, NULL, NULL);
223 
224     // wait WIP=0
225     return mp_spiflash_wait_wip0(self);
226 }
227 
mp_spiflash_write_page(mp_spiflash_t * self,uint32_t addr,size_t len,const uint8_t * src)228 STATIC int mp_spiflash_write_page(mp_spiflash_t *self, uint32_t addr, size_t len, const uint8_t *src) {
229     // enable writes
230     mp_spiflash_write_cmd(self, CMD_WREN);
231 
232     // wait WEL=1
233     int ret = mp_spiflash_wait_wel1(self);
234     if (ret != 0) {
235         return ret;
236     }
237 
238     // write the page
239     uint8_t cmd = MP_SPI_ADDR_IS_32B(addr) ? CMD_WRITE_32 : CMD_WRITE;
240     mp_spiflash_transfer_cmd_addr_data(self, cmd, addr, len, src, NULL);
241 
242     // wait WIP=0
243     return mp_spiflash_wait_wip0(self);
244 }
245 
246 /******************************************************************************/
247 // Interface functions that go direct to the SPI flash device
248 
mp_spiflash_erase_block(mp_spiflash_t * self,uint32_t addr)249 int mp_spiflash_erase_block(mp_spiflash_t *self, uint32_t addr) {
250     mp_spiflash_acquire_bus(self);
251     int ret = mp_spiflash_erase_block_internal(self, addr);
252     mp_spiflash_release_bus(self);
253     return ret;
254 }
255 
mp_spiflash_read(mp_spiflash_t * self,uint32_t addr,size_t len,uint8_t * dest)256 void mp_spiflash_read(mp_spiflash_t *self, uint32_t addr, size_t len, uint8_t *dest) {
257     if (len == 0) {
258         return;
259     }
260     mp_spiflash_acquire_bus(self);
261     mp_spiflash_read_data(self, addr, len, dest);
262     mp_spiflash_release_bus(self);
263 }
264 
mp_spiflash_write(mp_spiflash_t * self,uint32_t addr,size_t len,const uint8_t * src)265 int mp_spiflash_write(mp_spiflash_t *self, uint32_t addr, size_t len, const uint8_t *src) {
266     mp_spiflash_acquire_bus(self);
267     int ret = 0;
268     uint32_t offset = addr & (PAGE_SIZE - 1);
269     while (len) {
270         size_t rest = PAGE_SIZE - offset;
271         if (rest > len) {
272             rest = len;
273         }
274         ret = mp_spiflash_write_page(self, addr, rest, src);
275         if (ret != 0) {
276             break;
277         }
278         len -= rest;
279         addr += rest;
280         src += rest;
281         offset = 0;
282     }
283     mp_spiflash_release_bus(self);
284     return ret;
285 }
286 
287 /******************************************************************************/
288 // Interface functions that use the cache
289 
290 #if MICROPY_HW_SPIFLASH_ENABLE_CACHE
291 
mp_spiflash_cached_read(mp_spiflash_t * self,uint32_t addr,size_t len,uint8_t * dest)292 void mp_spiflash_cached_read(mp_spiflash_t *self, uint32_t addr, size_t len, uint8_t *dest) {
293     if (len == 0) {
294         return;
295     }
296     mp_spiflash_acquire_bus(self);
297     mp_spiflash_cache_t *cache = self->config->cache;
298     if (cache->user == self && cache->block != 0xffffffff) {
299         uint32_t bis = addr / SECTOR_SIZE;
300         uint32_t bie = (addr + len - 1) / SECTOR_SIZE;
301         if (bis <= cache->block && cache->block <= bie) {
302             // Read straddles current buffer
303             size_t rest = 0;
304             if (bis < cache->block) {
305                 // Read direct from flash for first part
306                 rest = cache->block * SECTOR_SIZE - addr;
307                 mp_spiflash_read_data(self, addr, rest, dest);
308                 len -= rest;
309                 dest += rest;
310                 addr += rest;
311             }
312             uint32_t offset = addr & (SECTOR_SIZE - 1);
313             rest = SECTOR_SIZE - offset;
314             if (rest > len) {
315                 rest = len;
316             }
317             memcpy(dest, &cache->buf[offset], rest);
318             len -= rest;
319             if (len == 0) {
320                 mp_spiflash_release_bus(self);
321                 return;
322             }
323             dest += rest;
324             addr += rest;
325         }
326     }
327     // Read rest direct from flash
328     mp_spiflash_read_data(self, addr, len, dest);
329     mp_spiflash_release_bus(self);
330 }
331 
mp_spiflash_cache_flush_internal(mp_spiflash_t * self)332 STATIC void mp_spiflash_cache_flush_internal(mp_spiflash_t *self) {
333     #if USE_WR_DELAY
334     if (!(self->flags & 1)) {
335         return;
336     }
337 
338     self->flags &= ~1;
339 
340     mp_spiflash_cache_t *cache = self->config->cache;
341 
342     // Erase sector
343     int ret = mp_spiflash_erase_block_internal(self, cache->block * SECTOR_SIZE);
344     if (ret != 0) {
345         return;
346     }
347 
348     // Write
349     for (int i = 0; i < 16; i += 1) {
350         uint32_t addr = cache->block * SECTOR_SIZE + i * PAGE_SIZE;
351         int ret = mp_spiflash_write_page(self, addr, PAGE_SIZE, cache->buf + i * PAGE_SIZE);
352         if (ret != 0) {
353             return;
354         }
355     }
356     #endif
357 }
358 
mp_spiflash_cache_flush(mp_spiflash_t * self)359 void mp_spiflash_cache_flush(mp_spiflash_t *self) {
360     mp_spiflash_acquire_bus(self);
361     mp_spiflash_cache_flush_internal(self);
362     mp_spiflash_release_bus(self);
363 }
364 
mp_spiflash_cached_write_part(mp_spiflash_t * self,uint32_t addr,size_t len,const uint8_t * src)365 STATIC int mp_spiflash_cached_write_part(mp_spiflash_t *self, uint32_t addr, size_t len, const uint8_t *src) {
366     // Align to 4096 sector
367     uint32_t offset = addr & 0xfff;
368     uint32_t sec = addr >> 12;
369     addr = sec << 12;
370 
371     // Restriction for now, so we don't need to erase multiple pages
372     if (offset + len > SECTOR_SIZE) {
373         printf("mp_spiflash_cached_write_part: len is too large\n");
374         return -MP_EIO;
375     }
376 
377     mp_spiflash_cache_t *cache = self->config->cache;
378 
379     // Acquire the sector buffer
380     if (cache->user != self) {
381         if (cache->user != NULL) {
382             mp_spiflash_cache_flush(cache->user);
383         }
384         cache->user = self;
385         cache->block = 0xffffffff;
386     }
387 
388     if (cache->block != sec) {
389         // Read sector
390         #if USE_WR_DELAY
391         if (cache->block != 0xffffffff) {
392             mp_spiflash_cache_flush_internal(self);
393         }
394         #endif
395         mp_spiflash_read_data(self, addr, SECTOR_SIZE, cache->buf);
396     }
397 
398     #if USE_WR_DELAY
399 
400     cache->block = sec;
401     // Just copy to buffer
402     memcpy(cache->buf + offset, src, len);
403     // And mark dirty
404     self->flags |= 1;
405 
406     #else
407 
408     uint32_t dirty = 0;
409     for (size_t i = 0; i < len; ++i) {
410         if (cache->buf[offset + i] != src[i]) {
411             if (cache->buf[offset + i] != 0xff) {
412                 // Erase sector
413                 int ret = mp_spiflash_erase_block_internal(self, addr);
414                 if (ret != 0) {
415                     return ret;
416                 }
417                 dirty = 0xffff;
418                 break;
419             } else {
420                 dirty |= (1 << ((offset + i) >> 8));
421             }
422         }
423     }
424 
425     cache->block = sec;
426     // Copy new block into buffer
427     memcpy(cache->buf + offset, src, len);
428 
429     // Write sector in pages of 256 bytes
430     for (size_t i = 0; i < 16; ++i) {
431         if (dirty & (1 << i)) {
432             int ret = mp_spiflash_write_page(self, addr + i * PAGE_SIZE, PAGE_SIZE, cache->buf + i * PAGE_SIZE);
433             if (ret != 0) {
434                 return ret;
435             }
436         }
437     }
438 
439     #endif
440 
441     return 0; // success
442 }
443 
mp_spiflash_cached_write(mp_spiflash_t * self,uint32_t addr,size_t len,const uint8_t * src)444 int mp_spiflash_cached_write(mp_spiflash_t *self, uint32_t addr, size_t len, const uint8_t *src) {
445     uint32_t bis = addr / SECTOR_SIZE;
446     uint32_t bie = (addr + len - 1) / SECTOR_SIZE;
447 
448     mp_spiflash_acquire_bus(self);
449 
450     mp_spiflash_cache_t *cache = self->config->cache;
451     if (cache->user == self && bis <= cache->block && bie >= cache->block) {
452         // Write straddles current buffer
453         uint32_t pre;
454         uint32_t offset;
455         if (cache->block * SECTOR_SIZE >= addr) {
456             pre = cache->block * SECTOR_SIZE - addr;
457             offset = 0;
458         } else {
459             pre = 0;
460             offset = addr - cache->block * SECTOR_SIZE;
461         }
462 
463         // Write buffered part first
464         uint32_t len_in_buf = len - pre;
465         len = 0;
466         if (len_in_buf > SECTOR_SIZE - offset) {
467             len = len_in_buf - (SECTOR_SIZE - offset);
468             len_in_buf = SECTOR_SIZE - offset;
469         }
470         memcpy(&cache->buf[offset], &src[pre], len_in_buf);
471         self->flags |= 1; // Mark dirty
472 
473         // Write part before buffer sector
474         while (pre) {
475             int rest = pre & (SECTOR_SIZE - 1);
476             if (rest == 0) {
477                 rest = SECTOR_SIZE;
478             }
479             int ret = mp_spiflash_cached_write_part(self, addr, rest, src);
480             if (ret != 0) {
481                 mp_spiflash_release_bus(self);
482                 return ret;
483             }
484             src += rest;
485             addr += rest;
486             pre -= rest;
487         }
488         src += len_in_buf;
489         addr += len_in_buf;
490 
491         // Fall through to write remaining part
492     }
493 
494     uint32_t offset = addr & (SECTOR_SIZE - 1);
495     while (len) {
496         int rest = SECTOR_SIZE - offset;
497         if (rest > len) {
498             rest = len;
499         }
500         int ret = mp_spiflash_cached_write_part(self, addr, rest, src);
501         if (ret != 0) {
502             mp_spiflash_release_bus(self);
503             return ret;
504         }
505         len -= rest;
506         addr += rest;
507         src += rest;
508         offset = 0;
509     }
510 
511     mp_spiflash_release_bus(self);
512     return 0;
513 }
514 
515 #endif // MICROPY_HW_SPIFLASH_ENABLE_CACHE
516