1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
4 * Copyright (C) 2013 Red Hat
5 * Author: Rob Clark <robdclark@gmail.com>
6 */
7
8 #ifndef __MSM_DRV_H__
9 #define __MSM_DRV_H__
10
11 #include <linux/kernel.h>
12 #include <linux/clk.h>
13 #include <linux/cpufreq.h>
14 #include <linux/devfreq.h>
15 #include <linux/module.h>
16 #include <linux/component.h>
17 #include <linux/platform_device.h>
18 #include <linux/pm.h>
19 #include <linux/pm_runtime.h>
20 #include <linux/slab.h>
21 #include <linux/list.h>
22 #include <linux/iommu.h>
23 #include <linux/types.h>
24 #include <linux/of_graph.h>
25 #include <linux/of_device.h>
26 #include <linux/sizes.h>
27 #include <linux/kthread.h>
28
29 #include <drm/drm_atomic.h>
30 #include <drm/drm_atomic_helper.h>
31 #include <drm/drm_probe_helper.h>
32 #include <drm/drm_fb_helper.h>
33 #include <drm/display/drm_dsc.h>
34 #include <drm/msm_drm.h>
35 #include <drm/drm_gem.h>
36
37 #ifdef CONFIG_FAULT_INJECTION
38 extern struct fault_attr fail_gem_alloc;
39 extern struct fault_attr fail_gem_iova;
40 #else
41 # define should_fail(attr, size) 0
42 #endif
43
44 struct msm_kms;
45 struct msm_gpu;
46 struct msm_mmu;
47 struct msm_mdss;
48 struct msm_rd_state;
49 struct msm_perf_state;
50 struct msm_gem_submit;
51 struct msm_fence_context;
52 struct msm_gem_address_space;
53 struct msm_gem_vma;
54 struct msm_disp_state;
55
56 #define MAX_CRTCS 8
57 #define MAX_BRIDGES 8
58
59 #define FRAC_16_16(mult, div) (((mult) << 16) / (div))
60
61 enum msm_dp_controller {
62 MSM_DP_CONTROLLER_0,
63 MSM_DP_CONTROLLER_1,
64 MSM_DP_CONTROLLER_2,
65 MSM_DP_CONTROLLER_3,
66 MSM_DP_CONTROLLER_COUNT,
67 };
68
69 #define MSM_GPU_MAX_RINGS 4
70 #define MAX_H_TILES_PER_DISPLAY 2
71
72 /**
73 * enum msm_event_wait - type of HW events to wait for
74 * @MSM_ENC_COMMIT_DONE - wait for the driver to flush the registers to HW
75 * @MSM_ENC_TX_COMPLETE - wait for the HW to transfer the frame to panel
76 * @MSM_ENC_VBLANK - wait for the HW VBLANK event (for driver-internal waiters)
77 */
78 enum msm_event_wait {
79 MSM_ENC_COMMIT_DONE = 0,
80 MSM_ENC_TX_COMPLETE,
81 MSM_ENC_VBLANK,
82 };
83
84 /**
85 * struct msm_display_topology - defines a display topology pipeline
86 * @num_lm: number of layer mixers used
87 * @num_intf: number of interfaces the panel is mounted on
88 * @num_dspp: number of dspp blocks used
89 * @num_dsc: number of Display Stream Compression (DSC) blocks used
90 */
91 struct msm_display_topology {
92 u32 num_lm;
93 u32 num_intf;
94 u32 num_dspp;
95 u32 num_dsc;
96 };
97
98 /* Commit/Event thread specific structure */
99 struct msm_drm_thread {
100 struct drm_device *dev;
101 unsigned int crtc_id;
102 struct kthread_worker *worker;
103 };
104
105 struct msm_drm_private {
106
107 struct drm_device *dev;
108
109 struct msm_kms *kms;
110 int (*kms_init)(struct drm_device *dev);
111
112 /* subordinate devices, if present: */
113 struct platform_device *gpu_pdev;
114
115 /* possibly this should be in the kms component, but it is
116 * shared by both mdp4 and mdp5..
117 */
118 struct hdmi *hdmi;
119
120 /* DSI is shared by mdp4 and mdp5 */
121 struct msm_dsi *dsi[2];
122
123 struct msm_dp *dp[MSM_DP_CONTROLLER_COUNT];
124
125 /* when we have more than one 'msm_gpu' these need to be an array: */
126 struct msm_gpu *gpu;
127
128 /* gpu is only set on open(), but we need this info earlier */
129 bool is_a2xx;
130 bool has_cached_coherent;
131
132 struct drm_fb_helper *fbdev;
133
134 struct msm_rd_state *rd; /* debugfs to dump all submits */
135 struct msm_rd_state *hangrd; /* debugfs to dump hanging submits */
136 struct msm_perf_state *perf;
137
138 /**
139 * List of all GEM objects (mainly for debugfs, protected by obj_lock
140 * (acquire before per GEM object lock)
141 */
142 struct list_head objects;
143 struct mutex obj_lock;
144
145 /**
146 * lru:
147 *
148 * The various LRU's that a GEM object is in at various stages of
149 * it's lifetime. Objects start out in the unbacked LRU. When
150 * pinned (for scannout or permanently mapped GPU buffers, like
151 * ringbuffer, memptr, fw, etc) it moves to the pinned LRU. When
152 * unpinned, it moves into willneed or dontneed LRU depending on
153 * madvise state. When backing pages are evicted (willneed) or
154 * purged (dontneed) it moves back into the unbacked LRU.
155 *
156 * The dontneed LRU is considered by the shrinker for objects
157 * that are candidate for purging, and the willneed LRU is
158 * considered for objects that could be evicted.
159 */
160 struct {
161 /**
162 * unbacked:
163 *
164 * The LRU for GEM objects without backing pages allocated.
165 * This mostly exists so that objects are always is one
166 * LRU.
167 */
168 struct drm_gem_lru unbacked;
169
170 /**
171 * pinned:
172 *
173 * The LRU for pinned GEM objects
174 */
175 struct drm_gem_lru pinned;
176
177 /**
178 * willneed:
179 *
180 * The LRU for unpinned GEM objects which are in madvise
181 * WILLNEED state (ie. can be evicted)
182 */
183 struct drm_gem_lru willneed;
184
185 /**
186 * dontneed:
187 *
188 * The LRU for unpinned GEM objects which are in madvise
189 * DONTNEED state (ie. can be purged)
190 */
191 struct drm_gem_lru dontneed;
192
193 /**
194 * lock:
195 *
196 * Protects manipulation of all of the LRUs.
197 */
198 struct mutex lock;
199 } lru;
200
201 struct workqueue_struct *wq;
202
203 unsigned int num_crtcs;
204 struct drm_crtc *crtcs[MAX_CRTCS];
205
206 struct msm_drm_thread event_thread[MAX_CRTCS];
207
208 unsigned int num_bridges;
209 struct drm_bridge *bridges[MAX_BRIDGES];
210
211 /* VRAM carveout, used when no IOMMU: */
212 struct {
213 unsigned long size;
214 dma_addr_t paddr;
215 /* NOTE: mm managed at the page level, size is in # of pages
216 * and position mm_node->start is in # of pages:
217 */
218 struct drm_mm mm;
219 spinlock_t lock; /* Protects drm_mm node allocation/removal */
220 } vram;
221
222 struct notifier_block vmap_notifier;
223 struct shrinker shrinker;
224
225 struct drm_atomic_state *pm_state;
226
227 /**
228 * hangcheck_period: For hang detection, in ms
229 *
230 * Note that in practice, a submit/job will get at least two hangcheck
231 * periods, due to checking for progress being implemented as simply
232 * "have the CP position registers changed since last time?"
233 */
234 unsigned int hangcheck_period;
235
236 /** gpu_devfreq_config: Devfreq tuning config for the GPU. */
237 struct devfreq_simple_ondemand_data gpu_devfreq_config;
238
239 /**
240 * gpu_clamp_to_idle: Enable clamping to idle freq when inactive
241 */
242 bool gpu_clamp_to_idle;
243
244 /**
245 * disable_err_irq:
246 *
247 * Disable handling of GPU hw error interrupts, to force fallback to
248 * sw hangcheck timer. Written (via debugfs) by igt tests to test
249 * the sw hangcheck mechanism.
250 */
251 bool disable_err_irq;
252 };
253
254 struct msm_format {
255 uint32_t pixel_format;
256 };
257
258 struct msm_pending_timer;
259
260 int msm_atomic_init_pending_timer(struct msm_pending_timer *timer,
261 struct msm_kms *kms, int crtc_idx);
262 void msm_atomic_destroy_pending_timer(struct msm_pending_timer *timer);
263 void msm_atomic_commit_tail(struct drm_atomic_state *state);
264 struct drm_atomic_state *msm_atomic_state_alloc(struct drm_device *dev);
265 void msm_atomic_state_clear(struct drm_atomic_state *state);
266 void msm_atomic_state_free(struct drm_atomic_state *state);
267
268 int msm_crtc_enable_vblank(struct drm_crtc *crtc);
269 void msm_crtc_disable_vblank(struct drm_crtc *crtc);
270
271 int msm_register_mmu(struct drm_device *dev, struct msm_mmu *mmu);
272 void msm_unregister_mmu(struct drm_device *dev, struct msm_mmu *mmu);
273
274 struct msm_gem_address_space *msm_kms_init_aspace(struct drm_device *dev);
275 bool msm_use_mmu(struct drm_device *dev);
276
277 int msm_ioctl_gem_submit(struct drm_device *dev, void *data,
278 struct drm_file *file);
279
280 #ifdef CONFIG_DEBUG_FS
281 unsigned long msm_gem_shrinker_shrink(struct drm_device *dev, unsigned long nr_to_scan);
282 #endif
283
284 void msm_gem_shrinker_init(struct drm_device *dev);
285 void msm_gem_shrinker_cleanup(struct drm_device *dev);
286
287 int msm_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma);
288 struct sg_table *msm_gem_prime_get_sg_table(struct drm_gem_object *obj);
289 int msm_gem_prime_vmap(struct drm_gem_object *obj, struct iosys_map *map);
290 void msm_gem_prime_vunmap(struct drm_gem_object *obj, struct iosys_map *map);
291 struct drm_gem_object *msm_gem_prime_import_sg_table(struct drm_device *dev,
292 struct dma_buf_attachment *attach, struct sg_table *sg);
293 int msm_gem_prime_pin(struct drm_gem_object *obj);
294 void msm_gem_prime_unpin(struct drm_gem_object *obj);
295
296 int msm_framebuffer_prepare(struct drm_framebuffer *fb,
297 struct msm_gem_address_space *aspace, bool needs_dirtyfb);
298 void msm_framebuffer_cleanup(struct drm_framebuffer *fb,
299 struct msm_gem_address_space *aspace, bool needed_dirtyfb);
300 uint32_t msm_framebuffer_iova(struct drm_framebuffer *fb,
301 struct msm_gem_address_space *aspace, int plane);
302 struct drm_gem_object *msm_framebuffer_bo(struct drm_framebuffer *fb, int plane);
303 const struct msm_format *msm_framebuffer_format(struct drm_framebuffer *fb);
304 struct drm_framebuffer *msm_framebuffer_create(struct drm_device *dev,
305 struct drm_file *file, const struct drm_mode_fb_cmd2 *mode_cmd);
306 struct drm_framebuffer * msm_alloc_stolen_fb(struct drm_device *dev,
307 int w, int h, int p, uint32_t format);
308
309 struct drm_fb_helper *msm_fbdev_init(struct drm_device *dev);
310 void msm_fbdev_free(struct drm_device *dev);
311
312 struct hdmi;
313 #ifdef CONFIG_DRM_MSM_HDMI
314 int msm_hdmi_modeset_init(struct hdmi *hdmi, struct drm_device *dev,
315 struct drm_encoder *encoder);
316 void __init msm_hdmi_register(void);
317 void __exit msm_hdmi_unregister(void);
318 #else
msm_hdmi_modeset_init(struct hdmi * hdmi,struct drm_device * dev,struct drm_encoder * encoder)319 static inline int msm_hdmi_modeset_init(struct hdmi *hdmi, struct drm_device *dev,
320 struct drm_encoder *encoder)
321 {
322 return -EINVAL;
323 }
msm_hdmi_register(void)324 static inline void __init msm_hdmi_register(void) {}
msm_hdmi_unregister(void)325 static inline void __exit msm_hdmi_unregister(void) {}
326 #endif
327
328 struct msm_dsi;
329 #ifdef CONFIG_DRM_MSM_DSI
330 int dsi_dev_attach(struct platform_device *pdev);
331 void dsi_dev_detach(struct platform_device *pdev);
332 void __init msm_dsi_register(void);
333 void __exit msm_dsi_unregister(void);
334 int msm_dsi_modeset_init(struct msm_dsi *msm_dsi, struct drm_device *dev,
335 struct drm_encoder *encoder);
336 void msm_dsi_snapshot(struct msm_disp_state *disp_state, struct msm_dsi *msm_dsi);
337 bool msm_dsi_is_cmd_mode(struct msm_dsi *msm_dsi);
338 bool msm_dsi_is_bonded_dsi(struct msm_dsi *msm_dsi);
339 bool msm_dsi_is_master_dsi(struct msm_dsi *msm_dsi);
340 struct drm_dsc_config *msm_dsi_get_dsc_config(struct msm_dsi *msm_dsi);
341 #else
msm_dsi_register(void)342 static inline void __init msm_dsi_register(void)
343 {
344 }
msm_dsi_unregister(void)345 static inline void __exit msm_dsi_unregister(void)
346 {
347 }
msm_dsi_modeset_init(struct msm_dsi * msm_dsi,struct drm_device * dev,struct drm_encoder * encoder)348 static inline int msm_dsi_modeset_init(struct msm_dsi *msm_dsi,
349 struct drm_device *dev,
350 struct drm_encoder *encoder)
351 {
352 return -EINVAL;
353 }
msm_dsi_snapshot(struct msm_disp_state * disp_state,struct msm_dsi * msm_dsi)354 static inline void msm_dsi_snapshot(struct msm_disp_state *disp_state, struct msm_dsi *msm_dsi)
355 {
356 }
msm_dsi_is_cmd_mode(struct msm_dsi * msm_dsi)357 static inline bool msm_dsi_is_cmd_mode(struct msm_dsi *msm_dsi)
358 {
359 return false;
360 }
msm_dsi_is_bonded_dsi(struct msm_dsi * msm_dsi)361 static inline bool msm_dsi_is_bonded_dsi(struct msm_dsi *msm_dsi)
362 {
363 return false;
364 }
msm_dsi_is_master_dsi(struct msm_dsi * msm_dsi)365 static inline bool msm_dsi_is_master_dsi(struct msm_dsi *msm_dsi)
366 {
367 return false;
368 }
369
msm_dsi_get_dsc_config(struct msm_dsi * msm_dsi)370 static inline struct drm_dsc_config *msm_dsi_get_dsc_config(struct msm_dsi *msm_dsi)
371 {
372 return NULL;
373 }
374 #endif
375
376 #ifdef CONFIG_DRM_MSM_DP
377 int __init msm_dp_register(void);
378 void __exit msm_dp_unregister(void);
379 int msm_dp_modeset_init(struct msm_dp *dp_display, struct drm_device *dev,
380 struct drm_encoder *encoder);
381 void msm_dp_irq_postinstall(struct msm_dp *dp_display);
382 void msm_dp_snapshot(struct msm_disp_state *disp_state, struct msm_dp *dp_display);
383
384 void msm_dp_debugfs_init(struct msm_dp *dp_display, struct drm_minor *minor);
385 bool msm_dp_wide_bus_available(const struct msm_dp *dp_display);
386
387 #else
msm_dp_register(void)388 static inline int __init msm_dp_register(void)
389 {
390 return -EINVAL;
391 }
msm_dp_unregister(void)392 static inline void __exit msm_dp_unregister(void)
393 {
394 }
msm_dp_modeset_init(struct msm_dp * dp_display,struct drm_device * dev,struct drm_encoder * encoder)395 static inline int msm_dp_modeset_init(struct msm_dp *dp_display,
396 struct drm_device *dev,
397 struct drm_encoder *encoder)
398 {
399 return -EINVAL;
400 }
401
msm_dp_irq_postinstall(struct msm_dp * dp_display)402 static inline void msm_dp_irq_postinstall(struct msm_dp *dp_display)
403 {
404 }
405
msm_dp_snapshot(struct msm_disp_state * disp_state,struct msm_dp * dp_display)406 static inline void msm_dp_snapshot(struct msm_disp_state *disp_state, struct msm_dp *dp_display)
407 {
408 }
409
msm_dp_debugfs_init(struct msm_dp * dp_display,struct drm_minor * minor)410 static inline void msm_dp_debugfs_init(struct msm_dp *dp_display,
411 struct drm_minor *minor)
412 {
413 }
414
msm_dp_wide_bus_available(const struct msm_dp * dp_display)415 static inline bool msm_dp_wide_bus_available(const struct msm_dp *dp_display)
416 {
417 return false;
418 }
419
420 #endif
421
422 #ifdef CONFIG_DRM_MSM_MDP4
423 void msm_mdp4_register(void);
424 void msm_mdp4_unregister(void);
425 #else
msm_mdp4_register(void)426 static inline void msm_mdp4_register(void) {}
msm_mdp4_unregister(void)427 static inline void msm_mdp4_unregister(void) {}
428 #endif
429
430 #ifdef CONFIG_DRM_MSM_MDP5
431 void msm_mdp_register(void);
432 void msm_mdp_unregister(void);
433 #else
msm_mdp_register(void)434 static inline void msm_mdp_register(void) {}
msm_mdp_unregister(void)435 static inline void msm_mdp_unregister(void) {}
436 #endif
437
438 #ifdef CONFIG_DRM_MSM_DPU
439 void msm_dpu_register(void);
440 void msm_dpu_unregister(void);
441 #else
msm_dpu_register(void)442 static inline void msm_dpu_register(void) {}
msm_dpu_unregister(void)443 static inline void msm_dpu_unregister(void) {}
444 #endif
445
446 #ifdef CONFIG_DRM_MSM_MDSS
447 void msm_mdss_register(void);
448 void msm_mdss_unregister(void);
449 #else
msm_mdss_register(void)450 static inline void msm_mdss_register(void) {}
msm_mdss_unregister(void)451 static inline void msm_mdss_unregister(void) {}
452 #endif
453
454 #ifdef CONFIG_DEBUG_FS
455 void msm_framebuffer_describe(struct drm_framebuffer *fb, struct seq_file *m);
456 int msm_debugfs_late_init(struct drm_device *dev);
457 int msm_rd_debugfs_init(struct drm_minor *minor);
458 void msm_rd_debugfs_cleanup(struct msm_drm_private *priv);
459 __printf(3, 4)
460 void msm_rd_dump_submit(struct msm_rd_state *rd, struct msm_gem_submit *submit,
461 const char *fmt, ...);
462 int msm_perf_debugfs_init(struct drm_minor *minor);
463 void msm_perf_debugfs_cleanup(struct msm_drm_private *priv);
464 #else
msm_debugfs_late_init(struct drm_device * dev)465 static inline int msm_debugfs_late_init(struct drm_device *dev) { return 0; }
466 __printf(3, 4)
msm_rd_dump_submit(struct msm_rd_state * rd,struct msm_gem_submit * submit,const char * fmt,...)467 static inline void msm_rd_dump_submit(struct msm_rd_state *rd,
468 struct msm_gem_submit *submit,
469 const char *fmt, ...) {}
msm_rd_debugfs_cleanup(struct msm_drm_private * priv)470 static inline void msm_rd_debugfs_cleanup(struct msm_drm_private *priv) {}
msm_perf_debugfs_cleanup(struct msm_drm_private * priv)471 static inline void msm_perf_debugfs_cleanup(struct msm_drm_private *priv) {}
472 #endif
473
474 struct clk *msm_clk_get(struct platform_device *pdev, const char *name);
475
476 struct clk *msm_clk_bulk_get_clock(struct clk_bulk_data *bulk, int count,
477 const char *name);
478 void __iomem *msm_ioremap(struct platform_device *pdev, const char *name);
479 void __iomem *msm_ioremap_size(struct platform_device *pdev, const char *name,
480 phys_addr_t *size);
481 void __iomem *msm_ioremap_quiet(struct platform_device *pdev, const char *name);
482
483 struct icc_path *msm_icc_get(struct device *dev, const char *name);
484
485 #define msm_writel(data, addr) writel((data), (addr))
486 #define msm_readl(addr) readl((addr))
487
msm_rmw(void __iomem * addr,u32 mask,u32 or)488 static inline void msm_rmw(void __iomem *addr, u32 mask, u32 or)
489 {
490 u32 val = msm_readl(addr);
491
492 val &= ~mask;
493 msm_writel(val | or, addr);
494 }
495
496 /**
497 * struct msm_hrtimer_work - a helper to combine an hrtimer with kthread_work
498 *
499 * @timer: hrtimer to control when the kthread work is triggered
500 * @work: the kthread work
501 * @worker: the kthread worker the work will be scheduled on
502 */
503 struct msm_hrtimer_work {
504 struct hrtimer timer;
505 struct kthread_work work;
506 struct kthread_worker *worker;
507 };
508
509 void msm_hrtimer_queue_work(struct msm_hrtimer_work *work,
510 ktime_t wakeup_time,
511 enum hrtimer_mode mode);
512 void msm_hrtimer_work_init(struct msm_hrtimer_work *work,
513 struct kthread_worker *worker,
514 kthread_work_func_t fn,
515 clockid_t clock_id,
516 enum hrtimer_mode mode);
517
518 #define DBG(fmt, ...) DRM_DEBUG_DRIVER(fmt"\n", ##__VA_ARGS__)
519 #define VERB(fmt, ...) if (0) DRM_DEBUG_DRIVER(fmt"\n", ##__VA_ARGS__)
520
align_pitch(int width,int bpp)521 static inline int align_pitch(int width, int bpp)
522 {
523 int bytespp = (bpp + 7) / 8;
524 /* adreno needs pitch aligned to 32 pixels: */
525 return bytespp * ALIGN(width, 32);
526 }
527
528 /* for the generated headers: */
529 #define INVALID_IDX(idx) ({BUG(); 0;})
530 #define fui(x) ({BUG(); 0;})
531 #define _mesa_float_to_half(x) ({BUG(); 0;})
532
533
534 #define FIELD(val, name) (((val) & name ## __MASK) >> name ## __SHIFT)
535
536 /* for conditionally setting boolean flag(s): */
537 #define COND(bool, val) ((bool) ? (val) : 0)
538
timeout_to_jiffies(const ktime_t * timeout)539 static inline unsigned long timeout_to_jiffies(const ktime_t *timeout)
540 {
541 ktime_t now = ktime_get();
542 s64 remaining_jiffies;
543
544 if (ktime_compare(*timeout, now) < 0) {
545 remaining_jiffies = 0;
546 } else {
547 ktime_t rem = ktime_sub(*timeout, now);
548 remaining_jiffies = ktime_divns(rem, NSEC_PER_SEC / HZ);
549 }
550
551 return clamp(remaining_jiffies, 0LL, (s64)INT_MAX);
552 }
553
554 /* Driver helpers */
555
556 extern const struct component_master_ops msm_drm_ops;
557
558 int msm_pm_prepare(struct device *dev);
559 void msm_pm_complete(struct device *dev);
560
561 int msm_drv_probe(struct device *dev,
562 int (*kms_init)(struct drm_device *dev));
563 void msm_drv_shutdown(struct platform_device *pdev);
564
565
566 #endif /* __MSM_DRV_H__ */
567