1 // SPDX-License-Identifier: ISC
2 /* Copyright (C) 2020 MediaTek Inc. */
3
4 #include "mt76_connac.h"
5 #include "mt76_connac2_mac.h"
6 #include "dma.h"
7
8 #define HE_BITS(f) cpu_to_le16(IEEE80211_RADIOTAP_HE_##f)
9 #define HE_PREP(f, m, v) le16_encode_bits(le32_get_bits(v, MT_CRXV_HE_##m),\
10 IEEE80211_RADIOTAP_HE_##f)
11
mt76_connac_pm_wake(struct mt76_phy * phy,struct mt76_connac_pm * pm)12 int mt76_connac_pm_wake(struct mt76_phy *phy, struct mt76_connac_pm *pm)
13 {
14 struct mt76_dev *dev = phy->dev;
15
16 if (mt76_is_usb(dev))
17 return 0;
18
19 cancel_delayed_work_sync(&pm->ps_work);
20 if (!test_bit(MT76_STATE_PM, &phy->state))
21 return 0;
22
23 if (pm->suspended)
24 return 0;
25
26 queue_work(dev->wq, &pm->wake_work);
27 if (!wait_event_timeout(pm->wait,
28 !test_bit(MT76_STATE_PM, &phy->state),
29 3 * HZ)) {
30 ieee80211_wake_queues(phy->hw);
31 return -ETIMEDOUT;
32 }
33
34 return 0;
35 }
36 EXPORT_SYMBOL_GPL(mt76_connac_pm_wake);
37
mt76_connac_power_save_sched(struct mt76_phy * phy,struct mt76_connac_pm * pm)38 void mt76_connac_power_save_sched(struct mt76_phy *phy,
39 struct mt76_connac_pm *pm)
40 {
41 struct mt76_dev *dev = phy->dev;
42
43 if (mt76_is_usb(dev))
44 return;
45
46 if (!pm->enable)
47 return;
48
49 if (pm->suspended)
50 return;
51
52 pm->last_activity = jiffies;
53
54 if (!test_bit(MT76_STATE_PM, &phy->state)) {
55 cancel_delayed_work(&phy->mac_work);
56 queue_delayed_work(dev->wq, &pm->ps_work, pm->idle_timeout);
57 }
58 }
59 EXPORT_SYMBOL_GPL(mt76_connac_power_save_sched);
60
mt76_connac_free_pending_tx_skbs(struct mt76_connac_pm * pm,struct mt76_wcid * wcid)61 void mt76_connac_free_pending_tx_skbs(struct mt76_connac_pm *pm,
62 struct mt76_wcid *wcid)
63 {
64 int i;
65
66 spin_lock_bh(&pm->txq_lock);
67 for (i = 0; i < IEEE80211_NUM_ACS; i++) {
68 if (wcid && pm->tx_q[i].wcid != wcid)
69 continue;
70
71 dev_kfree_skb(pm->tx_q[i].skb);
72 pm->tx_q[i].skb = NULL;
73 }
74 spin_unlock_bh(&pm->txq_lock);
75 }
76 EXPORT_SYMBOL_GPL(mt76_connac_free_pending_tx_skbs);
77
mt76_connac_pm_queue_skb(struct ieee80211_hw * hw,struct mt76_connac_pm * pm,struct mt76_wcid * wcid,struct sk_buff * skb)78 void mt76_connac_pm_queue_skb(struct ieee80211_hw *hw,
79 struct mt76_connac_pm *pm,
80 struct mt76_wcid *wcid,
81 struct sk_buff *skb)
82 {
83 int qid = skb_get_queue_mapping(skb);
84 struct mt76_phy *phy = hw->priv;
85
86 spin_lock_bh(&pm->txq_lock);
87 if (!pm->tx_q[qid].skb) {
88 ieee80211_stop_queues(hw);
89 pm->tx_q[qid].wcid = wcid;
90 pm->tx_q[qid].skb = skb;
91 queue_work(phy->dev->wq, &pm->wake_work);
92 } else {
93 dev_kfree_skb(skb);
94 }
95 spin_unlock_bh(&pm->txq_lock);
96 }
97 EXPORT_SYMBOL_GPL(mt76_connac_pm_queue_skb);
98
mt76_connac_pm_dequeue_skbs(struct mt76_phy * phy,struct mt76_connac_pm * pm)99 void mt76_connac_pm_dequeue_skbs(struct mt76_phy *phy,
100 struct mt76_connac_pm *pm)
101 {
102 int i;
103
104 spin_lock_bh(&pm->txq_lock);
105 for (i = 0; i < IEEE80211_NUM_ACS; i++) {
106 struct mt76_wcid *wcid = pm->tx_q[i].wcid;
107 struct ieee80211_sta *sta = NULL;
108
109 if (!pm->tx_q[i].skb)
110 continue;
111
112 if (wcid && wcid->sta)
113 sta = container_of((void *)wcid, struct ieee80211_sta,
114 drv_priv);
115
116 mt76_tx(phy, sta, wcid, pm->tx_q[i].skb);
117 pm->tx_q[i].skb = NULL;
118 }
119 spin_unlock_bh(&pm->txq_lock);
120
121 mt76_worker_schedule(&phy->dev->tx_worker);
122 }
123 EXPORT_SYMBOL_GPL(mt76_connac_pm_dequeue_skbs);
124
mt76_connac_tx_complete_skb(struct mt76_dev * mdev,struct mt76_queue_entry * e)125 void mt76_connac_tx_complete_skb(struct mt76_dev *mdev,
126 struct mt76_queue_entry *e)
127 {
128 if (!e->txwi) {
129 dev_kfree_skb_any(e->skb);
130 return;
131 }
132
133 /* error path */
134 if (e->skb == DMA_DUMMY_DATA) {
135 struct mt76_connac_txp_common *txp;
136 struct mt76_txwi_cache *t;
137 u16 token;
138
139 txp = mt76_connac_txwi_to_txp(mdev, e->txwi);
140 if (is_mt76_fw_txp(mdev))
141 token = le16_to_cpu(txp->fw.token);
142 else
143 token = le16_to_cpu(txp->hw.msdu_id[0]) &
144 ~MT_MSDU_ID_VALID;
145
146 t = mt76_token_put(mdev, token);
147 e->skb = t ? t->skb : NULL;
148 }
149
150 if (e->skb)
151 mt76_tx_complete_skb(mdev, e->wcid, e->skb);
152 }
153 EXPORT_SYMBOL_GPL(mt76_connac_tx_complete_skb);
154
mt76_connac_write_hw_txp(struct mt76_dev * dev,struct mt76_tx_info * tx_info,void * txp_ptr,u32 id)155 void mt76_connac_write_hw_txp(struct mt76_dev *dev,
156 struct mt76_tx_info *tx_info,
157 void *txp_ptr, u32 id)
158 {
159 struct mt76_connac_hw_txp *txp = txp_ptr;
160 struct mt76_connac_txp_ptr *ptr = &txp->ptr[0];
161 int i, nbuf = tx_info->nbuf - 1;
162 u32 last_mask;
163
164 tx_info->buf[0].len = MT_TXD_SIZE + sizeof(*txp);
165 tx_info->nbuf = 1;
166
167 txp->msdu_id[0] = cpu_to_le16(id | MT_MSDU_ID_VALID);
168
169 if (is_mt7663(dev) || is_mt7921(dev))
170 last_mask = MT_TXD_LEN_LAST;
171 else
172 last_mask = MT_TXD_LEN_AMSDU_LAST |
173 MT_TXD_LEN_MSDU_LAST;
174
175 for (i = 0; i < nbuf; i++) {
176 u16 len = tx_info->buf[i + 1].len & MT_TXD_LEN_MASK;
177 u32 addr = tx_info->buf[i + 1].addr;
178
179 if (i == nbuf - 1)
180 len |= last_mask;
181
182 if (i & 1) {
183 ptr->buf1 = cpu_to_le32(addr);
184 ptr->len1 = cpu_to_le16(len);
185 ptr++;
186 } else {
187 ptr->buf0 = cpu_to_le32(addr);
188 ptr->len0 = cpu_to_le16(len);
189 }
190 }
191 }
192 EXPORT_SYMBOL_GPL(mt76_connac_write_hw_txp);
193
194 static void
mt76_connac_txp_skb_unmap_fw(struct mt76_dev * mdev,struct mt76_connac_fw_txp * txp)195 mt76_connac_txp_skb_unmap_fw(struct mt76_dev *mdev,
196 struct mt76_connac_fw_txp *txp)
197 {
198 struct device *dev = is_connac_v1(mdev) ? mdev->dev : mdev->dma_dev;
199 int i;
200
201 for (i = 0; i < txp->nbuf; i++)
202 dma_unmap_single(dev, le32_to_cpu(txp->buf[i]),
203 le16_to_cpu(txp->len[i]), DMA_TO_DEVICE);
204 }
205
206 static void
mt76_connac_txp_skb_unmap_hw(struct mt76_dev * dev,struct mt76_connac_hw_txp * txp)207 mt76_connac_txp_skb_unmap_hw(struct mt76_dev *dev,
208 struct mt76_connac_hw_txp *txp)
209 {
210 u32 last_mask;
211 int i;
212
213 if (is_mt7663(dev) || is_mt7921(dev))
214 last_mask = MT_TXD_LEN_LAST;
215 else
216 last_mask = MT_TXD_LEN_MSDU_LAST;
217
218 for (i = 0; i < ARRAY_SIZE(txp->ptr); i++) {
219 struct mt76_connac_txp_ptr *ptr = &txp->ptr[i];
220 bool last;
221 u16 len;
222
223 len = le16_to_cpu(ptr->len0);
224 last = len & last_mask;
225 len &= MT_TXD_LEN_MASK;
226 dma_unmap_single(dev->dev, le32_to_cpu(ptr->buf0), len,
227 DMA_TO_DEVICE);
228 if (last)
229 break;
230
231 len = le16_to_cpu(ptr->len1);
232 last = len & last_mask;
233 len &= MT_TXD_LEN_MASK;
234 dma_unmap_single(dev->dev, le32_to_cpu(ptr->buf1), len,
235 DMA_TO_DEVICE);
236 if (last)
237 break;
238 }
239 }
240
mt76_connac_txp_skb_unmap(struct mt76_dev * dev,struct mt76_txwi_cache * t)241 void mt76_connac_txp_skb_unmap(struct mt76_dev *dev,
242 struct mt76_txwi_cache *t)
243 {
244 struct mt76_connac_txp_common *txp;
245
246 txp = mt76_connac_txwi_to_txp(dev, t);
247 if (is_mt76_fw_txp(dev))
248 mt76_connac_txp_skb_unmap_fw(dev, &txp->fw);
249 else
250 mt76_connac_txp_skb_unmap_hw(dev, &txp->hw);
251 }
252 EXPORT_SYMBOL_GPL(mt76_connac_txp_skb_unmap);
253
mt76_connac_init_tx_queues(struct mt76_phy * phy,int idx,int n_desc,int ring_base,u32 flags)254 int mt76_connac_init_tx_queues(struct mt76_phy *phy, int idx, int n_desc,
255 int ring_base, u32 flags)
256 {
257 int i, err;
258
259 err = mt76_init_tx_queue(phy, 0, idx, n_desc, ring_base, flags);
260 if (err < 0)
261 return err;
262
263 for (i = 1; i <= MT_TXQ_PSD; i++)
264 phy->q_tx[i] = phy->q_tx[0];
265
266 return 0;
267 }
268 EXPORT_SYMBOL_GPL(mt76_connac_init_tx_queues);
269
mt76_connac2_mac_tx_rate_val(struct mt76_phy * mphy,struct ieee80211_vif * vif,bool beacon,bool mcast)270 u16 mt76_connac2_mac_tx_rate_val(struct mt76_phy *mphy,
271 struct ieee80211_vif *vif,
272 bool beacon, bool mcast)
273 {
274 u8 mode = 0, band = mphy->chandef.chan->band;
275 int rateidx = 0, mcast_rate;
276
277 if (!vif)
278 goto legacy;
279
280 if (is_mt7921(mphy->dev)) {
281 rateidx = ffs(vif->bss_conf.basic_rates) - 1;
282 goto legacy;
283 }
284
285 if (beacon) {
286 struct cfg80211_bitrate_mask *mask;
287
288 mask = &vif->bss_conf.beacon_tx_rate;
289 if (hweight16(mask->control[band].he_mcs[0]) == 1) {
290 rateidx = ffs(mask->control[band].he_mcs[0]) - 1;
291 mode = MT_PHY_TYPE_HE_SU;
292 goto out;
293 } else if (hweight16(mask->control[band].vht_mcs[0]) == 1) {
294 rateidx = ffs(mask->control[band].vht_mcs[0]) - 1;
295 mode = MT_PHY_TYPE_VHT;
296 goto out;
297 } else if (hweight8(mask->control[band].ht_mcs[0]) == 1) {
298 rateidx = ffs(mask->control[band].ht_mcs[0]) - 1;
299 mode = MT_PHY_TYPE_HT;
300 goto out;
301 } else if (hweight32(mask->control[band].legacy) == 1) {
302 rateidx = ffs(mask->control[band].legacy) - 1;
303 goto legacy;
304 }
305 }
306
307 mcast_rate = vif->bss_conf.mcast_rate[band];
308 if (mcast && mcast_rate > 0)
309 rateidx = mcast_rate - 1;
310 else
311 rateidx = ffs(vif->bss_conf.basic_rates) - 1;
312
313 legacy:
314 rateidx = mt76_calculate_default_rate(mphy, rateidx);
315 mode = rateidx >> 8;
316 rateidx &= GENMASK(7, 0);
317
318 out:
319 return FIELD_PREP(MT_TX_RATE_IDX, rateidx) |
320 FIELD_PREP(MT_TX_RATE_MODE, mode);
321 }
322 EXPORT_SYMBOL_GPL(mt76_connac2_mac_tx_rate_val);
323
324 static void
mt76_connac2_mac_write_txwi_8023(__le32 * txwi,struct sk_buff * skb,struct mt76_wcid * wcid)325 mt76_connac2_mac_write_txwi_8023(__le32 *txwi, struct sk_buff *skb,
326 struct mt76_wcid *wcid)
327 {
328 u8 tid = skb->priority & IEEE80211_QOS_CTL_TID_MASK;
329 u8 fc_type, fc_stype;
330 u16 ethertype;
331 bool wmm = false;
332 u32 val;
333
334 if (wcid->sta) {
335 struct ieee80211_sta *sta;
336
337 sta = container_of((void *)wcid, struct ieee80211_sta, drv_priv);
338 wmm = sta->wme;
339 }
340
341 val = FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_802_3) |
342 FIELD_PREP(MT_TXD1_TID, tid);
343
344 ethertype = get_unaligned_be16(&skb->data[12]);
345 if (ethertype >= ETH_P_802_3_MIN)
346 val |= MT_TXD1_ETH_802_3;
347
348 txwi[1] |= cpu_to_le32(val);
349
350 fc_type = IEEE80211_FTYPE_DATA >> 2;
351 fc_stype = wmm ? IEEE80211_STYPE_QOS_DATA >> 4 : 0;
352
353 val = FIELD_PREP(MT_TXD2_FRAME_TYPE, fc_type) |
354 FIELD_PREP(MT_TXD2_SUB_TYPE, fc_stype);
355
356 txwi[2] |= cpu_to_le32(val);
357
358 val = FIELD_PREP(MT_TXD7_TYPE, fc_type) |
359 FIELD_PREP(MT_TXD7_SUB_TYPE, fc_stype);
360
361 txwi[7] |= cpu_to_le32(val);
362 }
363
364 static void
mt76_connac2_mac_write_txwi_80211(struct mt76_dev * dev,__le32 * txwi,struct sk_buff * skb,struct ieee80211_key_conf * key)365 mt76_connac2_mac_write_txwi_80211(struct mt76_dev *dev, __le32 *txwi,
366 struct sk_buff *skb,
367 struct ieee80211_key_conf *key)
368 {
369 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
370 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data;
371 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
372 bool multicast = is_multicast_ether_addr(hdr->addr1);
373 u8 tid = skb->priority & IEEE80211_QOS_CTL_TID_MASK;
374 __le16 fc = hdr->frame_control;
375 u8 fc_type, fc_stype;
376 u32 val;
377
378 if (ieee80211_is_action(fc) &&
379 mgmt->u.action.category == WLAN_CATEGORY_BACK &&
380 mgmt->u.action.u.addba_req.action_code == WLAN_ACTION_ADDBA_REQ) {
381 u16 capab = le16_to_cpu(mgmt->u.action.u.addba_req.capab);
382
383 txwi[5] |= cpu_to_le32(MT_TXD5_ADD_BA);
384 tid = (capab >> 2) & IEEE80211_QOS_CTL_TID_MASK;
385 } else if (ieee80211_is_back_req(hdr->frame_control)) {
386 struct ieee80211_bar *bar = (struct ieee80211_bar *)hdr;
387 u16 control = le16_to_cpu(bar->control);
388
389 tid = FIELD_GET(IEEE80211_BAR_CTRL_TID_INFO_MASK, control);
390 }
391
392 val = FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_802_11) |
393 FIELD_PREP(MT_TXD1_HDR_INFO,
394 ieee80211_get_hdrlen_from_skb(skb) / 2) |
395 FIELD_PREP(MT_TXD1_TID, tid);
396
397 txwi[1] |= cpu_to_le32(val);
398
399 fc_type = (le16_to_cpu(fc) & IEEE80211_FCTL_FTYPE) >> 2;
400 fc_stype = (le16_to_cpu(fc) & IEEE80211_FCTL_STYPE) >> 4;
401
402 val = FIELD_PREP(MT_TXD2_FRAME_TYPE, fc_type) |
403 FIELD_PREP(MT_TXD2_SUB_TYPE, fc_stype) |
404 FIELD_PREP(MT_TXD2_MULTICAST, multicast);
405
406 if (key && multicast && ieee80211_is_robust_mgmt_frame(skb) &&
407 key->cipher == WLAN_CIPHER_SUITE_AES_CMAC) {
408 val |= MT_TXD2_BIP;
409 txwi[3] &= ~cpu_to_le32(MT_TXD3_PROTECT_FRAME);
410 }
411
412 if (!ieee80211_is_data(fc) || multicast ||
413 info->flags & IEEE80211_TX_CTL_USE_MINRATE)
414 val |= MT_TXD2_FIX_RATE;
415
416 txwi[2] |= cpu_to_le32(val);
417
418 if (ieee80211_is_beacon(fc)) {
419 txwi[3] &= ~cpu_to_le32(MT_TXD3_SW_POWER_MGMT);
420 txwi[3] |= cpu_to_le32(MT_TXD3_REM_TX_COUNT);
421 }
422
423 if (info->flags & IEEE80211_TX_CTL_INJECTED) {
424 u16 seqno = le16_to_cpu(hdr->seq_ctrl);
425
426 if (ieee80211_is_back_req(hdr->frame_control)) {
427 struct ieee80211_bar *bar;
428
429 bar = (struct ieee80211_bar *)skb->data;
430 seqno = le16_to_cpu(bar->start_seq_num);
431 }
432
433 val = MT_TXD3_SN_VALID |
434 FIELD_PREP(MT_TXD3_SEQ, IEEE80211_SEQ_TO_SN(seqno));
435 txwi[3] |= cpu_to_le32(val);
436 txwi[7] &= ~cpu_to_le32(MT_TXD7_HW_AMSDU);
437 }
438
439 if (mt76_is_mmio(dev)) {
440 val = FIELD_PREP(MT_TXD7_TYPE, fc_type) |
441 FIELD_PREP(MT_TXD7_SUB_TYPE, fc_stype);
442 txwi[7] |= cpu_to_le32(val);
443 } else {
444 val = FIELD_PREP(MT_TXD8_L_TYPE, fc_type) |
445 FIELD_PREP(MT_TXD8_L_SUB_TYPE, fc_stype);
446 txwi[8] |= cpu_to_le32(val);
447 }
448 }
449
mt76_connac2_mac_write_txwi(struct mt76_dev * dev,__le32 * txwi,struct sk_buff * skb,struct mt76_wcid * wcid,struct ieee80211_key_conf * key,int pid,enum mt76_txq_id qid,u32 changed)450 void mt76_connac2_mac_write_txwi(struct mt76_dev *dev, __le32 *txwi,
451 struct sk_buff *skb, struct mt76_wcid *wcid,
452 struct ieee80211_key_conf *key, int pid,
453 enum mt76_txq_id qid, u32 changed)
454 {
455 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
456 u8 phy_idx = (info->hw_queue & MT_TX_HW_QUEUE_PHY) >> 2;
457 struct ieee80211_vif *vif = info->control.vif;
458 struct mt76_phy *mphy = &dev->phy;
459 u8 p_fmt, q_idx, omac_idx = 0, wmm_idx = 0, band_idx = 0;
460 u32 val, sz_txd = mt76_is_mmio(dev) ? MT_TXD_SIZE : MT_SDIO_TXD_SIZE;
461 bool is_8023 = info->flags & IEEE80211_TX_CTL_HW_80211_ENCAP;
462 bool beacon = !!(changed & (BSS_CHANGED_BEACON |
463 BSS_CHANGED_BEACON_ENABLED));
464 bool inband_disc = !!(changed & (BSS_CHANGED_UNSOL_BCAST_PROBE_RESP |
465 BSS_CHANGED_FILS_DISCOVERY));
466
467 if (vif) {
468 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
469
470 omac_idx = mvif->omac_idx;
471 wmm_idx = mvif->wmm_idx;
472 band_idx = mvif->band_idx;
473 }
474
475 if (phy_idx && dev->phys[MT_BAND1])
476 mphy = dev->phys[MT_BAND1];
477
478 if (inband_disc) {
479 p_fmt = MT_TX_TYPE_FW;
480 q_idx = MT_LMAC_ALTX0;
481 } else if (beacon) {
482 p_fmt = MT_TX_TYPE_FW;
483 q_idx = MT_LMAC_BCN0;
484 } else if (qid >= MT_TXQ_PSD) {
485 p_fmt = mt76_is_mmio(dev) ? MT_TX_TYPE_CT : MT_TX_TYPE_SF;
486 q_idx = MT_LMAC_ALTX0;
487 } else {
488 p_fmt = mt76_is_mmio(dev) ? MT_TX_TYPE_CT : MT_TX_TYPE_SF;
489 q_idx = wmm_idx * MT76_CONNAC_MAX_WMM_SETS +
490 mt76_connac_lmac_mapping(skb_get_queue_mapping(skb));
491
492 /* counting non-offloading skbs */
493 wcid->stats.tx_bytes += skb->len;
494 wcid->stats.tx_packets++;
495 }
496
497 val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len + sz_txd) |
498 FIELD_PREP(MT_TXD0_PKT_FMT, p_fmt) |
499 FIELD_PREP(MT_TXD0_Q_IDX, q_idx);
500 txwi[0] = cpu_to_le32(val);
501
502 val = MT_TXD1_LONG_FORMAT |
503 FIELD_PREP(MT_TXD1_WLAN_IDX, wcid->idx) |
504 FIELD_PREP(MT_TXD1_OWN_MAC, omac_idx);
505 if (!is_mt7921(dev))
506 val |= MT_TXD1_VTA;
507 if (phy_idx || band_idx)
508 val |= MT_TXD1_TGID;
509
510 txwi[1] = cpu_to_le32(val);
511 txwi[2] = 0;
512
513 val = FIELD_PREP(MT_TXD3_REM_TX_COUNT, 15);
514 if (!is_mt7921(dev))
515 val |= MT_TXD3_SW_POWER_MGMT;
516 if (key)
517 val |= MT_TXD3_PROTECT_FRAME;
518 if (info->flags & IEEE80211_TX_CTL_NO_ACK)
519 val |= MT_TXD3_NO_ACK;
520
521 txwi[3] = cpu_to_le32(val);
522 txwi[4] = 0;
523
524 val = FIELD_PREP(MT_TXD5_PID, pid);
525 if (pid >= MT_PACKET_ID_FIRST)
526 val |= MT_TXD5_TX_STATUS_HOST;
527
528 txwi[5] = cpu_to_le32(val);
529 txwi[6] = 0;
530 txwi[7] = wcid->amsdu ? cpu_to_le32(MT_TXD7_HW_AMSDU) : 0;
531
532 if (is_8023)
533 mt76_connac2_mac_write_txwi_8023(txwi, skb, wcid);
534 else
535 mt76_connac2_mac_write_txwi_80211(dev, txwi, skb, key);
536
537 if (txwi[2] & cpu_to_le32(MT_TXD2_FIX_RATE)) {
538 /* Fixed rata is available just for 802.11 txd */
539 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
540 bool multicast = is_multicast_ether_addr(hdr->addr1);
541 u16 rate = mt76_connac2_mac_tx_rate_val(mphy, vif, beacon,
542 multicast);
543 u32 val = MT_TXD6_FIXED_BW;
544
545 /* hardware won't add HTC for mgmt/ctrl frame */
546 txwi[2] |= cpu_to_le32(MT_TXD2_HTC_VLD);
547
548 val |= FIELD_PREP(MT_TXD6_TX_RATE, rate);
549 txwi[6] |= cpu_to_le32(val);
550 txwi[3] |= cpu_to_le32(MT_TXD3_BA_DISABLE);
551
552 if (!is_mt7921(dev)) {
553 u8 spe_idx = mt76_connac_spe_idx(mphy->antenna_mask);
554
555 if (!spe_idx)
556 spe_idx = 24 + phy_idx;
557 txwi[7] |= cpu_to_le32(FIELD_PREP(MT_TXD7_SPE_IDX, spe_idx));
558 }
559 }
560 }
561 EXPORT_SYMBOL_GPL(mt76_connac2_mac_write_txwi);
562
mt76_connac2_mac_fill_txs(struct mt76_dev * dev,struct mt76_wcid * wcid,__le32 * txs_data)563 bool mt76_connac2_mac_fill_txs(struct mt76_dev *dev, struct mt76_wcid *wcid,
564 __le32 *txs_data)
565 {
566 struct mt76_sta_stats *stats = &wcid->stats;
567 struct ieee80211_supported_band *sband;
568 struct mt76_phy *mphy;
569 struct rate_info rate = {};
570 bool cck = false;
571 u32 txrate, txs, mode, stbc;
572
573 txs = le32_to_cpu(txs_data[0]);
574
575 /* PPDU based reporting */
576 if (FIELD_GET(MT_TXS0_TXS_FORMAT, txs) > 1) {
577 stats->tx_bytes +=
578 le32_get_bits(txs_data[5], MT_TXS5_MPDU_TX_BYTE);
579 stats->tx_packets +=
580 le32_get_bits(txs_data[5], MT_TXS5_MPDU_TX_CNT);
581 stats->tx_failed +=
582 le32_get_bits(txs_data[6], MT_TXS6_MPDU_FAIL_CNT);
583 stats->tx_retries +=
584 le32_get_bits(txs_data[7], MT_TXS7_MPDU_RETRY_CNT);
585 }
586
587 txrate = FIELD_GET(MT_TXS0_TX_RATE, txs);
588
589 rate.mcs = FIELD_GET(MT_TX_RATE_IDX, txrate);
590 rate.nss = FIELD_GET(MT_TX_RATE_NSS, txrate) + 1;
591 stbc = FIELD_GET(MT_TX_RATE_STBC, txrate);
592
593 if (stbc && rate.nss > 1)
594 rate.nss >>= 1;
595
596 if (rate.nss - 1 < ARRAY_SIZE(stats->tx_nss))
597 stats->tx_nss[rate.nss - 1]++;
598 if (rate.mcs < ARRAY_SIZE(stats->tx_mcs))
599 stats->tx_mcs[rate.mcs]++;
600
601 mode = FIELD_GET(MT_TX_RATE_MODE, txrate);
602 switch (mode) {
603 case MT_PHY_TYPE_CCK:
604 cck = true;
605 fallthrough;
606 case MT_PHY_TYPE_OFDM:
607 mphy = &dev->phy;
608 if (wcid->phy_idx == MT_BAND1 && dev->phys[MT_BAND1])
609 mphy = dev->phys[MT_BAND1];
610
611 if (mphy->chandef.chan->band == NL80211_BAND_5GHZ)
612 sband = &mphy->sband_5g.sband;
613 else if (mphy->chandef.chan->band == NL80211_BAND_6GHZ)
614 sband = &mphy->sband_6g.sband;
615 else
616 sband = &mphy->sband_2g.sband;
617
618 rate.mcs = mt76_get_rate(mphy->dev, sband, rate.mcs, cck);
619 rate.legacy = sband->bitrates[rate.mcs].bitrate;
620 break;
621 case MT_PHY_TYPE_HT:
622 case MT_PHY_TYPE_HT_GF:
623 if (rate.mcs > 31)
624 return false;
625
626 rate.flags = RATE_INFO_FLAGS_MCS;
627 if (wcid->rate.flags & RATE_INFO_FLAGS_SHORT_GI)
628 rate.flags |= RATE_INFO_FLAGS_SHORT_GI;
629 break;
630 case MT_PHY_TYPE_VHT:
631 if (rate.mcs > 9)
632 return false;
633
634 rate.flags = RATE_INFO_FLAGS_VHT_MCS;
635 break;
636 case MT_PHY_TYPE_HE_SU:
637 case MT_PHY_TYPE_HE_EXT_SU:
638 case MT_PHY_TYPE_HE_TB:
639 case MT_PHY_TYPE_HE_MU:
640 if (rate.mcs > 11)
641 return false;
642
643 rate.he_gi = wcid->rate.he_gi;
644 rate.he_dcm = FIELD_GET(MT_TX_RATE_DCM, txrate);
645 rate.flags = RATE_INFO_FLAGS_HE_MCS;
646 break;
647 default:
648 return false;
649 }
650
651 stats->tx_mode[mode]++;
652
653 switch (FIELD_GET(MT_TXS0_BW, txs)) {
654 case IEEE80211_STA_RX_BW_160:
655 rate.bw = RATE_INFO_BW_160;
656 stats->tx_bw[3]++;
657 break;
658 case IEEE80211_STA_RX_BW_80:
659 rate.bw = RATE_INFO_BW_80;
660 stats->tx_bw[2]++;
661 break;
662 case IEEE80211_STA_RX_BW_40:
663 rate.bw = RATE_INFO_BW_40;
664 stats->tx_bw[1]++;
665 break;
666 default:
667 rate.bw = RATE_INFO_BW_20;
668 stats->tx_bw[0]++;
669 break;
670 }
671 wcid->rate = rate;
672
673 return true;
674 }
675 EXPORT_SYMBOL_GPL(mt76_connac2_mac_fill_txs);
676
mt76_connac2_mac_add_txs_skb(struct mt76_dev * dev,struct mt76_wcid * wcid,int pid,__le32 * txs_data)677 bool mt76_connac2_mac_add_txs_skb(struct mt76_dev *dev, struct mt76_wcid *wcid,
678 int pid, __le32 *txs_data)
679 {
680 struct sk_buff_head list;
681 struct sk_buff *skb;
682
683 mt76_tx_status_lock(dev, &list);
684 skb = mt76_tx_status_skb_get(dev, wcid, pid, &list);
685 if (skb) {
686 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
687 bool noacked = !(info->flags & IEEE80211_TX_STAT_ACK);
688
689 if (!(le32_to_cpu(txs_data[0]) & MT_TXS0_ACK_ERROR_MASK))
690 info->flags |= IEEE80211_TX_STAT_ACK;
691
692 info->status.ampdu_len = 1;
693 info->status.ampdu_ack_len = !noacked;
694 info->status.rates[0].idx = -1;
695
696 wcid->stats.tx_failed += noacked;
697
698 mt76_connac2_mac_fill_txs(dev, wcid, txs_data);
699 mt76_tx_status_skb_done(dev, skb, &list);
700 }
701 mt76_tx_status_unlock(dev, &list);
702
703 return !!skb;
704 }
705 EXPORT_SYMBOL_GPL(mt76_connac2_mac_add_txs_skb);
706
707 static void
mt76_connac2_mac_decode_he_radiotap_ru(struct mt76_rx_status * status,struct ieee80211_radiotap_he * he,__le32 * rxv)708 mt76_connac2_mac_decode_he_radiotap_ru(struct mt76_rx_status *status,
709 struct ieee80211_radiotap_he *he,
710 __le32 *rxv)
711 {
712 u32 ru_h, ru_l;
713 u8 ru, offs = 0;
714
715 ru_l = le32_get_bits(rxv[0], MT_PRXV_HE_RU_ALLOC_L);
716 ru_h = le32_get_bits(rxv[1], MT_PRXV_HE_RU_ALLOC_H);
717 ru = (u8)(ru_l | ru_h << 4);
718
719 status->bw = RATE_INFO_BW_HE_RU;
720
721 switch (ru) {
722 case 0 ... 36:
723 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_26;
724 offs = ru;
725 break;
726 case 37 ... 52:
727 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_52;
728 offs = ru - 37;
729 break;
730 case 53 ... 60:
731 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_106;
732 offs = ru - 53;
733 break;
734 case 61 ... 64:
735 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_242;
736 offs = ru - 61;
737 break;
738 case 65 ... 66:
739 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_484;
740 offs = ru - 65;
741 break;
742 case 67:
743 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_996;
744 break;
745 case 68:
746 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_2x996;
747 break;
748 }
749
750 he->data1 |= HE_BITS(DATA1_BW_RU_ALLOC_KNOWN);
751 he->data2 |= HE_BITS(DATA2_RU_OFFSET_KNOWN) |
752 le16_encode_bits(offs,
753 IEEE80211_RADIOTAP_HE_DATA2_RU_OFFSET);
754 }
755
756 static void
mt76_connac2_mac_decode_he_mu_radiotap(struct mt76_dev * dev,struct sk_buff * skb,__le32 * rxv)757 mt76_connac2_mac_decode_he_mu_radiotap(struct mt76_dev *dev, struct sk_buff *skb,
758 __le32 *rxv)
759 {
760 struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb;
761 static struct ieee80211_radiotap_he_mu mu_known = {
762 .flags1 = HE_BITS(MU_FLAGS1_SIG_B_MCS_KNOWN) |
763 HE_BITS(MU_FLAGS1_SIG_B_DCM_KNOWN) |
764 HE_BITS(MU_FLAGS1_CH1_RU_KNOWN) |
765 HE_BITS(MU_FLAGS1_SIG_B_SYMS_USERS_KNOWN),
766 .flags2 = HE_BITS(MU_FLAGS2_BW_FROM_SIG_A_BW_KNOWN),
767 };
768 struct ieee80211_radiotap_he_mu *he_mu;
769
770 if (is_mt7921(dev)) {
771 mu_known.flags1 |= HE_BITS(MU_FLAGS1_SIG_B_COMP_KNOWN);
772 mu_known.flags2 |= HE_BITS(MU_FLAGS2_PUNC_FROM_SIG_A_BW_KNOWN);
773 }
774
775 status->flag |= RX_FLAG_RADIOTAP_HE_MU;
776
777 he_mu = skb_push(skb, sizeof(mu_known));
778 memcpy(he_mu, &mu_known, sizeof(mu_known));
779
780 #define MU_PREP(f, v) le16_encode_bits(v, IEEE80211_RADIOTAP_HE_MU_##f)
781
782 he_mu->flags1 |= MU_PREP(FLAGS1_SIG_B_MCS, status->rate_idx);
783 if (status->he_dcm)
784 he_mu->flags1 |= MU_PREP(FLAGS1_SIG_B_DCM, status->he_dcm);
785
786 he_mu->flags2 |= MU_PREP(FLAGS2_BW_FROM_SIG_A_BW, status->bw) |
787 MU_PREP(FLAGS2_SIG_B_SYMS_USERS,
788 le32_get_bits(rxv[2], MT_CRXV_HE_NUM_USER));
789
790 he_mu->ru_ch1[0] = le32_get_bits(rxv[3], MT_CRXV_HE_RU0);
791
792 if (status->bw >= RATE_INFO_BW_40) {
793 he_mu->flags1 |= HE_BITS(MU_FLAGS1_CH2_RU_KNOWN);
794 he_mu->ru_ch2[0] =
795 le32_get_bits(rxv[3], MT_CRXV_HE_RU1);
796 }
797
798 if (status->bw >= RATE_INFO_BW_80) {
799 he_mu->ru_ch1[1] =
800 le32_get_bits(rxv[3], MT_CRXV_HE_RU2);
801 he_mu->ru_ch2[1] =
802 le32_get_bits(rxv[3], MT_CRXV_HE_RU3);
803 }
804 }
805
mt76_connac2_mac_decode_he_radiotap(struct mt76_dev * dev,struct sk_buff * skb,__le32 * rxv,u32 mode)806 void mt76_connac2_mac_decode_he_radiotap(struct mt76_dev *dev,
807 struct sk_buff *skb,
808 __le32 *rxv, u32 mode)
809 {
810 struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb;
811 static const struct ieee80211_radiotap_he known = {
812 .data1 = HE_BITS(DATA1_DATA_MCS_KNOWN) |
813 HE_BITS(DATA1_DATA_DCM_KNOWN) |
814 HE_BITS(DATA1_STBC_KNOWN) |
815 HE_BITS(DATA1_CODING_KNOWN) |
816 HE_BITS(DATA1_LDPC_XSYMSEG_KNOWN) |
817 HE_BITS(DATA1_DOPPLER_KNOWN) |
818 HE_BITS(DATA1_SPTL_REUSE_KNOWN) |
819 HE_BITS(DATA1_BSS_COLOR_KNOWN),
820 .data2 = HE_BITS(DATA2_GI_KNOWN) |
821 HE_BITS(DATA2_TXBF_KNOWN) |
822 HE_BITS(DATA2_PE_DISAMBIG_KNOWN) |
823 HE_BITS(DATA2_TXOP_KNOWN),
824 };
825 u32 ltf_size = le32_get_bits(rxv[2], MT_CRXV_HE_LTF_SIZE) + 1;
826 struct ieee80211_radiotap_he *he;
827
828 status->flag |= RX_FLAG_RADIOTAP_HE;
829
830 he = skb_push(skb, sizeof(known));
831 memcpy(he, &known, sizeof(known));
832
833 he->data3 = HE_PREP(DATA3_BSS_COLOR, BSS_COLOR, rxv[14]) |
834 HE_PREP(DATA3_LDPC_XSYMSEG, LDPC_EXT_SYM, rxv[2]);
835 he->data4 = HE_PREP(DATA4_SU_MU_SPTL_REUSE, SR_MASK, rxv[11]);
836 he->data5 = HE_PREP(DATA5_PE_DISAMBIG, PE_DISAMBIG, rxv[2]) |
837 le16_encode_bits(ltf_size,
838 IEEE80211_RADIOTAP_HE_DATA5_LTF_SIZE);
839 if (le32_to_cpu(rxv[0]) & MT_PRXV_TXBF)
840 he->data5 |= HE_BITS(DATA5_TXBF);
841 he->data6 = HE_PREP(DATA6_TXOP, TXOP_DUR, rxv[14]) |
842 HE_PREP(DATA6_DOPPLER, DOPPLER, rxv[14]);
843
844 switch (mode) {
845 case MT_PHY_TYPE_HE_SU:
846 he->data1 |= HE_BITS(DATA1_FORMAT_SU) |
847 HE_BITS(DATA1_UL_DL_KNOWN) |
848 HE_BITS(DATA1_BEAM_CHANGE_KNOWN) |
849 HE_BITS(DATA1_BW_RU_ALLOC_KNOWN);
850
851 he->data3 |= HE_PREP(DATA3_BEAM_CHANGE, BEAM_CHNG, rxv[14]) |
852 HE_PREP(DATA3_UL_DL, UPLINK, rxv[2]);
853 break;
854 case MT_PHY_TYPE_HE_EXT_SU:
855 he->data1 |= HE_BITS(DATA1_FORMAT_EXT_SU) |
856 HE_BITS(DATA1_UL_DL_KNOWN) |
857 HE_BITS(DATA1_BW_RU_ALLOC_KNOWN);
858
859 he->data3 |= HE_PREP(DATA3_UL_DL, UPLINK, rxv[2]);
860 break;
861 case MT_PHY_TYPE_HE_MU:
862 he->data1 |= HE_BITS(DATA1_FORMAT_MU) |
863 HE_BITS(DATA1_UL_DL_KNOWN);
864
865 he->data3 |= HE_PREP(DATA3_UL_DL, UPLINK, rxv[2]);
866 he->data4 |= HE_PREP(DATA4_MU_STA_ID, MU_AID, rxv[7]);
867
868 mt76_connac2_mac_decode_he_radiotap_ru(status, he, rxv);
869 mt76_connac2_mac_decode_he_mu_radiotap(dev, skb, rxv);
870 break;
871 case MT_PHY_TYPE_HE_TB:
872 he->data1 |= HE_BITS(DATA1_FORMAT_TRIG) |
873 HE_BITS(DATA1_SPTL_REUSE2_KNOWN) |
874 HE_BITS(DATA1_SPTL_REUSE3_KNOWN) |
875 HE_BITS(DATA1_SPTL_REUSE4_KNOWN);
876
877 he->data4 |= HE_PREP(DATA4_TB_SPTL_REUSE1, SR_MASK, rxv[11]) |
878 HE_PREP(DATA4_TB_SPTL_REUSE2, SR1_MASK, rxv[11]) |
879 HE_PREP(DATA4_TB_SPTL_REUSE3, SR2_MASK, rxv[11]) |
880 HE_PREP(DATA4_TB_SPTL_REUSE4, SR3_MASK, rxv[11]);
881
882 mt76_connac2_mac_decode_he_radiotap_ru(status, he, rxv);
883 break;
884 default:
885 break;
886 }
887 }
888 EXPORT_SYMBOL_GPL(mt76_connac2_mac_decode_he_radiotap);
889
890 /* The HW does not translate the mac header to 802.3 for mesh point */
mt76_connac2_reverse_frag0_hdr_trans(struct ieee80211_vif * vif,struct sk_buff * skb,u16 hdr_offset)891 int mt76_connac2_reverse_frag0_hdr_trans(struct ieee80211_vif *vif,
892 struct sk_buff *skb, u16 hdr_offset)
893 {
894 struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb;
895 struct ethhdr *eth_hdr = (struct ethhdr *)(skb->data + hdr_offset);
896 __le32 *rxd = (__le32 *)skb->data;
897 struct ieee80211_sta *sta;
898 struct ieee80211_hdr hdr;
899 u16 frame_control;
900
901 if (le32_get_bits(rxd[3], MT_RXD3_NORMAL_ADDR_TYPE) !=
902 MT_RXD3_NORMAL_U2M)
903 return -EINVAL;
904
905 if (!(le32_to_cpu(rxd[1]) & MT_RXD1_NORMAL_GROUP_4))
906 return -EINVAL;
907
908 sta = container_of((void *)status->wcid, struct ieee80211_sta, drv_priv);
909
910 /* store the info from RXD and ethhdr to avoid being overridden */
911 frame_control = le32_get_bits(rxd[6], MT_RXD6_FRAME_CONTROL);
912 hdr.frame_control = cpu_to_le16(frame_control);
913 hdr.seq_ctrl = cpu_to_le16(le32_get_bits(rxd[8], MT_RXD8_SEQ_CTRL));
914 hdr.duration_id = 0;
915
916 ether_addr_copy(hdr.addr1, vif->addr);
917 ether_addr_copy(hdr.addr2, sta->addr);
918 switch (frame_control & (IEEE80211_FCTL_TODS |
919 IEEE80211_FCTL_FROMDS)) {
920 case 0:
921 ether_addr_copy(hdr.addr3, vif->bss_conf.bssid);
922 break;
923 case IEEE80211_FCTL_FROMDS:
924 ether_addr_copy(hdr.addr3, eth_hdr->h_source);
925 break;
926 case IEEE80211_FCTL_TODS:
927 ether_addr_copy(hdr.addr3, eth_hdr->h_dest);
928 break;
929 case IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS:
930 ether_addr_copy(hdr.addr3, eth_hdr->h_dest);
931 ether_addr_copy(hdr.addr4, eth_hdr->h_source);
932 break;
933 default:
934 return -EINVAL;
935 }
936
937 skb_pull(skb, hdr_offset + sizeof(struct ethhdr) - 2);
938 if (eth_hdr->h_proto == cpu_to_be16(ETH_P_AARP) ||
939 eth_hdr->h_proto == cpu_to_be16(ETH_P_IPX))
940 ether_addr_copy(skb_push(skb, ETH_ALEN), bridge_tunnel_header);
941 else if (be16_to_cpu(eth_hdr->h_proto) >= ETH_P_802_3_MIN)
942 ether_addr_copy(skb_push(skb, ETH_ALEN), rfc1042_header);
943 else
944 skb_pull(skb, 2);
945
946 if (ieee80211_has_order(hdr.frame_control))
947 memcpy(skb_push(skb, IEEE80211_HT_CTL_LEN), &rxd[9],
948 IEEE80211_HT_CTL_LEN);
949 if (ieee80211_is_data_qos(hdr.frame_control)) {
950 __le16 qos_ctrl;
951
952 qos_ctrl = cpu_to_le16(le32_get_bits(rxd[8], MT_RXD8_QOS_CTL));
953 memcpy(skb_push(skb, IEEE80211_QOS_CTL_LEN), &qos_ctrl,
954 IEEE80211_QOS_CTL_LEN);
955 }
956
957 if (ieee80211_has_a4(hdr.frame_control))
958 memcpy(skb_push(skb, sizeof(hdr)), &hdr, sizeof(hdr));
959 else
960 memcpy(skb_push(skb, sizeof(hdr) - 6), &hdr, sizeof(hdr) - 6);
961
962 return 0;
963 }
964 EXPORT_SYMBOL_GPL(mt76_connac2_reverse_frag0_hdr_trans);
965
mt76_connac2_mac_fill_rx_rate(struct mt76_dev * dev,struct mt76_rx_status * status,struct ieee80211_supported_band * sband,__le32 * rxv,u8 * mode)966 int mt76_connac2_mac_fill_rx_rate(struct mt76_dev *dev,
967 struct mt76_rx_status *status,
968 struct ieee80211_supported_band *sband,
969 __le32 *rxv, u8 *mode)
970 {
971 u32 v0, v2;
972 u8 stbc, gi, bw, dcm, nss;
973 int i, idx;
974 bool cck = false;
975
976 v0 = le32_to_cpu(rxv[0]);
977 v2 = le32_to_cpu(rxv[2]);
978
979 idx = i = FIELD_GET(MT_PRXV_TX_RATE, v0);
980 nss = FIELD_GET(MT_PRXV_NSTS, v0) + 1;
981
982 if (!is_mt7915(dev)) {
983 stbc = FIELD_GET(MT_PRXV_HT_STBC, v0);
984 gi = FIELD_GET(MT_PRXV_HT_SGI, v0);
985 *mode = FIELD_GET(MT_PRXV_TX_MODE, v0);
986 if (is_mt7921(dev))
987 dcm = !!(idx & MT_PRXV_TX_DCM);
988 else
989 dcm = FIELD_GET(MT_PRXV_DCM, v0);
990 bw = FIELD_GET(MT_PRXV_FRAME_MODE, v0);
991 } else {
992 stbc = FIELD_GET(MT_CRXV_HT_STBC, v2);
993 gi = FIELD_GET(MT_CRXV_HT_SHORT_GI, v2);
994 *mode = FIELD_GET(MT_CRXV_TX_MODE, v2);
995 dcm = !!(idx & GENMASK(3, 0) & MT_PRXV_TX_DCM);
996 bw = FIELD_GET(MT_CRXV_FRAME_MODE, v2);
997 }
998
999 switch (*mode) {
1000 case MT_PHY_TYPE_CCK:
1001 cck = true;
1002 fallthrough;
1003 case MT_PHY_TYPE_OFDM:
1004 i = mt76_get_rate(dev, sband, i, cck);
1005 break;
1006 case MT_PHY_TYPE_HT_GF:
1007 case MT_PHY_TYPE_HT:
1008 status->encoding = RX_ENC_HT;
1009 if (gi)
1010 status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
1011 if (i > 31)
1012 return -EINVAL;
1013 break;
1014 case MT_PHY_TYPE_VHT:
1015 status->nss = nss;
1016 status->encoding = RX_ENC_VHT;
1017 if (gi)
1018 status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
1019 if (i > 11)
1020 return -EINVAL;
1021 break;
1022 case MT_PHY_TYPE_HE_MU:
1023 case MT_PHY_TYPE_HE_SU:
1024 case MT_PHY_TYPE_HE_EXT_SU:
1025 case MT_PHY_TYPE_HE_TB:
1026 status->nss = nss;
1027 status->encoding = RX_ENC_HE;
1028 i &= GENMASK(3, 0);
1029
1030 if (gi <= NL80211_RATE_INFO_HE_GI_3_2)
1031 status->he_gi = gi;
1032
1033 status->he_dcm = dcm;
1034 break;
1035 default:
1036 return -EINVAL;
1037 }
1038 status->rate_idx = i;
1039
1040 switch (bw) {
1041 case IEEE80211_STA_RX_BW_20:
1042 break;
1043 case IEEE80211_STA_RX_BW_40:
1044 if (*mode & MT_PHY_TYPE_HE_EXT_SU &&
1045 (idx & MT_PRXV_TX_ER_SU_106T)) {
1046 status->bw = RATE_INFO_BW_HE_RU;
1047 status->he_ru =
1048 NL80211_RATE_INFO_HE_RU_ALLOC_106;
1049 } else {
1050 status->bw = RATE_INFO_BW_40;
1051 }
1052 break;
1053 case IEEE80211_STA_RX_BW_80:
1054 status->bw = RATE_INFO_BW_80;
1055 break;
1056 case IEEE80211_STA_RX_BW_160:
1057 status->bw = RATE_INFO_BW_160;
1058 break;
1059 default:
1060 return -EINVAL;
1061 }
1062
1063 status->enc_flags |= RX_ENC_FLAG_STBC_MASK * stbc;
1064 if (*mode < MT_PHY_TYPE_HE_SU && gi)
1065 status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
1066
1067 return 0;
1068 }
1069 EXPORT_SYMBOL_GPL(mt76_connac2_mac_fill_rx_rate);
1070