1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * phylink models the MAC to optional PHY connection, supporting
4 * technologies such as SFP cages where the PHY is hot-pluggable.
5 *
6 * Copyright (C) 2015 Russell King
7 */
8 #include <linux/acpi.h>
9 #include <linux/ethtool.h>
10 #include <linux/export.h>
11 #include <linux/gpio/consumer.h>
12 #include <linux/netdevice.h>
13 #include <linux/of.h>
14 #include <linux/of_mdio.h>
15 #include <linux/phy.h>
16 #include <linux/phy_fixed.h>
17 #include <linux/phylink.h>
18 #include <linux/rtnetlink.h>
19 #include <linux/spinlock.h>
20 #include <linux/timer.h>
21 #include <linux/workqueue.h>
22
23 #include "sfp.h"
24 #include "swphy.h"
25
26 #define SUPPORTED_INTERFACES \
27 (SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \
28 SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane)
29 #define ADVERTISED_INTERFACES \
30 (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \
31 ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane)
32
33 enum {
34 PHYLINK_DISABLE_STOPPED,
35 PHYLINK_DISABLE_LINK,
36 PHYLINK_DISABLE_MAC_WOL,
37 };
38
39 /**
40 * struct phylink - internal data type for phylink
41 */
42 struct phylink {
43 /* private: */
44 struct net_device *netdev;
45 const struct phylink_mac_ops *mac_ops;
46 struct phylink_config *config;
47 struct phylink_pcs *pcs;
48 struct device *dev;
49 unsigned int old_link_state:1;
50
51 unsigned long phylink_disable_state; /* bitmask of disables */
52 struct phy_device *phydev;
53 phy_interface_t link_interface; /* PHY_INTERFACE_xxx */
54 u8 cfg_link_an_mode; /* MLO_AN_xxx */
55 u8 cur_link_an_mode;
56 u8 link_port; /* The current non-phy ethtool port */
57 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
58
59 /* The link configuration settings */
60 struct phylink_link_state link_config;
61
62 /* The current settings */
63 phy_interface_t cur_interface;
64
65 struct gpio_desc *link_gpio;
66 unsigned int link_irq;
67 struct timer_list link_poll;
68 void (*get_fixed_state)(struct net_device *dev,
69 struct phylink_link_state *s);
70
71 struct mutex state_mutex;
72 struct phylink_link_state phy_state;
73 struct work_struct resolve;
74
75 bool mac_link_dropped;
76 bool using_mac_select_pcs;
77
78 struct sfp_bus *sfp_bus;
79 bool sfp_may_have_phy;
80 DECLARE_PHY_INTERFACE_MASK(sfp_interfaces);
81 __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support);
82 u8 sfp_port;
83 };
84
85 #define phylink_printk(level, pl, fmt, ...) \
86 do { \
87 if ((pl)->config->type == PHYLINK_NETDEV) \
88 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \
89 else if ((pl)->config->type == PHYLINK_DEV) \
90 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \
91 } while (0)
92
93 #define phylink_err(pl, fmt, ...) \
94 phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__)
95 #define phylink_warn(pl, fmt, ...) \
96 phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__)
97 #define phylink_info(pl, fmt, ...) \
98 phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__)
99 #if defined(CONFIG_DYNAMIC_DEBUG)
100 #define phylink_dbg(pl, fmt, ...) \
101 do { \
102 if ((pl)->config->type == PHYLINK_NETDEV) \
103 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \
104 else if ((pl)->config->type == PHYLINK_DEV) \
105 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \
106 } while (0)
107 #elif defined(DEBUG)
108 #define phylink_dbg(pl, fmt, ...) \
109 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__)
110 #else
111 #define phylink_dbg(pl, fmt, ...) \
112 ({ \
113 if (0) \
114 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \
115 })
116 #endif
117
118 /**
119 * phylink_set_port_modes() - set the port type modes in the ethtool mask
120 * @mask: ethtool link mode mask
121 *
122 * Sets all the port type modes in the ethtool mask. MAC drivers should
123 * use this in their 'validate' callback.
124 */
phylink_set_port_modes(unsigned long * mask)125 void phylink_set_port_modes(unsigned long *mask)
126 {
127 phylink_set(mask, TP);
128 phylink_set(mask, AUI);
129 phylink_set(mask, MII);
130 phylink_set(mask, FIBRE);
131 phylink_set(mask, BNC);
132 phylink_set(mask, Backplane);
133 }
134 EXPORT_SYMBOL_GPL(phylink_set_port_modes);
135
phylink_is_empty_linkmode(const unsigned long * linkmode)136 static int phylink_is_empty_linkmode(const unsigned long *linkmode)
137 {
138 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, };
139
140 phylink_set_port_modes(tmp);
141 phylink_set(tmp, Autoneg);
142 phylink_set(tmp, Pause);
143 phylink_set(tmp, Asym_Pause);
144
145 return linkmode_subset(linkmode, tmp);
146 }
147
phylink_an_mode_str(unsigned int mode)148 static const char *phylink_an_mode_str(unsigned int mode)
149 {
150 static const char *modestr[] = {
151 [MLO_AN_PHY] = "phy",
152 [MLO_AN_FIXED] = "fixed",
153 [MLO_AN_INBAND] = "inband",
154 };
155
156 return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown";
157 }
158
159 /**
160 * phylink_interface_max_speed() - get the maximum speed of a phy interface
161 * @interface: phy interface mode defined by &typedef phy_interface_t
162 *
163 * Determine the maximum speed of a phy interface. This is intended to help
164 * determine the correct speed to pass to the MAC when the phy is performing
165 * rate matching.
166 *
167 * Return: The maximum speed of @interface
168 */
phylink_interface_max_speed(phy_interface_t interface)169 static int phylink_interface_max_speed(phy_interface_t interface)
170 {
171 switch (interface) {
172 case PHY_INTERFACE_MODE_100BASEX:
173 case PHY_INTERFACE_MODE_REVRMII:
174 case PHY_INTERFACE_MODE_RMII:
175 case PHY_INTERFACE_MODE_SMII:
176 case PHY_INTERFACE_MODE_REVMII:
177 case PHY_INTERFACE_MODE_MII:
178 return SPEED_100;
179
180 case PHY_INTERFACE_MODE_TBI:
181 case PHY_INTERFACE_MODE_MOCA:
182 case PHY_INTERFACE_MODE_RTBI:
183 case PHY_INTERFACE_MODE_1000BASEX:
184 case PHY_INTERFACE_MODE_1000BASEKX:
185 case PHY_INTERFACE_MODE_TRGMII:
186 case PHY_INTERFACE_MODE_RGMII_TXID:
187 case PHY_INTERFACE_MODE_RGMII_RXID:
188 case PHY_INTERFACE_MODE_RGMII_ID:
189 case PHY_INTERFACE_MODE_RGMII:
190 case PHY_INTERFACE_MODE_QSGMII:
191 case PHY_INTERFACE_MODE_SGMII:
192 case PHY_INTERFACE_MODE_GMII:
193 return SPEED_1000;
194
195 case PHY_INTERFACE_MODE_2500BASEX:
196 return SPEED_2500;
197
198 case PHY_INTERFACE_MODE_5GBASER:
199 return SPEED_5000;
200
201 case PHY_INTERFACE_MODE_XGMII:
202 case PHY_INTERFACE_MODE_RXAUI:
203 case PHY_INTERFACE_MODE_XAUI:
204 case PHY_INTERFACE_MODE_10GBASER:
205 case PHY_INTERFACE_MODE_10GKR:
206 case PHY_INTERFACE_MODE_USXGMII:
207 case PHY_INTERFACE_MODE_QUSGMII:
208 return SPEED_10000;
209
210 case PHY_INTERFACE_MODE_25GBASER:
211 return SPEED_25000;
212
213 case PHY_INTERFACE_MODE_XLGMII:
214 return SPEED_40000;
215
216 case PHY_INTERFACE_MODE_INTERNAL:
217 case PHY_INTERFACE_MODE_NA:
218 case PHY_INTERFACE_MODE_MAX:
219 /* No idea! Garbage in, unknown out */
220 return SPEED_UNKNOWN;
221 }
222
223 /* If we get here, someone forgot to add an interface mode above */
224 WARN_ON_ONCE(1);
225 return SPEED_UNKNOWN;
226 }
227
228 /**
229 * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes
230 * @linkmodes: ethtool linkmode mask (must be already initialised)
231 * @caps: bitmask of MAC capabilities
232 *
233 * Set all possible pause, speed and duplex linkmodes in @linkmodes that are
234 * supported by the @caps. @linkmodes must have been initialised previously.
235 */
phylink_caps_to_linkmodes(unsigned long * linkmodes,unsigned long caps)236 void phylink_caps_to_linkmodes(unsigned long *linkmodes, unsigned long caps)
237 {
238 if (caps & MAC_SYM_PAUSE)
239 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes);
240
241 if (caps & MAC_ASYM_PAUSE)
242 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes);
243
244 if (caps & MAC_10HD) {
245 __set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes);
246 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Half_BIT, linkmodes);
247 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_P2MP_Half_BIT, linkmodes);
248 }
249
250 if (caps & MAC_10FD) {
251 __set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes);
252 __set_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, linkmodes);
253 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Full_BIT, linkmodes);
254 }
255
256 if (caps & MAC_100HD) {
257 __set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes);
258 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes);
259 }
260
261 if (caps & MAC_100FD) {
262 __set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes);
263 __set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes);
264 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes);
265 }
266
267 if (caps & MAC_1000HD)
268 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes);
269
270 if (caps & MAC_1000FD) {
271 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes);
272 __set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, linkmodes);
273 __set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes);
274 __set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes);
275 }
276
277 if (caps & MAC_2500FD) {
278 __set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes);
279 __set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes);
280 }
281
282 if (caps & MAC_5000FD)
283 __set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes);
284
285 if (caps & MAC_10000FD) {
286 __set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes);
287 __set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes);
288 __set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes);
289 __set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes);
290 __set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes);
291 __set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes);
292 __set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes);
293 __set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes);
294 __set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes);
295 }
296
297 if (caps & MAC_25000FD) {
298 __set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes);
299 __set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes);
300 __set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes);
301 }
302
303 if (caps & MAC_40000FD) {
304 __set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes);
305 __set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes);
306 __set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes);
307 __set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes);
308 }
309
310 if (caps & MAC_50000FD) {
311 __set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes);
312 __set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes);
313 __set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes);
314 __set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes);
315 __set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes);
316 __set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes);
317 __set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT,
318 linkmodes);
319 __set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes);
320 }
321
322 if (caps & MAC_56000FD) {
323 __set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes);
324 __set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes);
325 __set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes);
326 __set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes);
327 }
328
329 if (caps & MAC_100000FD) {
330 __set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes);
331 __set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes);
332 __set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes);
333 __set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
334 linkmodes);
335 __set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes);
336 __set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes);
337 __set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes);
338 __set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT,
339 linkmodes);
340 __set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes);
341 __set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes);
342 __set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes);
343 __set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT,
344 linkmodes);
345 __set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes);
346 __set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes);
347 }
348
349 if (caps & MAC_200000FD) {
350 __set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes);
351 __set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes);
352 __set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT,
353 linkmodes);
354 __set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes);
355 __set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes);
356 __set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes);
357 __set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes);
358 __set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT,
359 linkmodes);
360 __set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes);
361 __set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes);
362 }
363
364 if (caps & MAC_400000FD) {
365 __set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes);
366 __set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes);
367 __set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT,
368 linkmodes);
369 __set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes);
370 __set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes);
371 __set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes);
372 __set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes);
373 __set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT,
374 linkmodes);
375 __set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes);
376 __set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes);
377 }
378 }
379 EXPORT_SYMBOL_GPL(phylink_caps_to_linkmodes);
380
381 static struct {
382 unsigned long mask;
383 int speed;
384 unsigned int duplex;
385 } phylink_caps_params[] = {
386 { MAC_400000FD, SPEED_400000, DUPLEX_FULL },
387 { MAC_200000FD, SPEED_200000, DUPLEX_FULL },
388 { MAC_100000FD, SPEED_100000, DUPLEX_FULL },
389 { MAC_56000FD, SPEED_56000, DUPLEX_FULL },
390 { MAC_50000FD, SPEED_50000, DUPLEX_FULL },
391 { MAC_40000FD, SPEED_40000, DUPLEX_FULL },
392 { MAC_25000FD, SPEED_25000, DUPLEX_FULL },
393 { MAC_20000FD, SPEED_20000, DUPLEX_FULL },
394 { MAC_10000FD, SPEED_10000, DUPLEX_FULL },
395 { MAC_5000FD, SPEED_5000, DUPLEX_FULL },
396 { MAC_2500FD, SPEED_2500, DUPLEX_FULL },
397 { MAC_1000FD, SPEED_1000, DUPLEX_FULL },
398 { MAC_1000HD, SPEED_1000, DUPLEX_HALF },
399 { MAC_100FD, SPEED_100, DUPLEX_FULL },
400 { MAC_100HD, SPEED_100, DUPLEX_HALF },
401 { MAC_10FD, SPEED_10, DUPLEX_FULL },
402 { MAC_10HD, SPEED_10, DUPLEX_HALF },
403 };
404
405 /**
406 * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex
407 * @speed: the speed to search for
408 * @duplex: the duplex to search for
409 *
410 * Find the mac capability for a given speed and duplex.
411 *
412 * Return: A mask with the mac capability patching @speed and @duplex, or 0 if
413 * there were no matches.
414 */
phylink_cap_from_speed_duplex(int speed,unsigned int duplex)415 static unsigned long phylink_cap_from_speed_duplex(int speed,
416 unsigned int duplex)
417 {
418 int i;
419
420 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) {
421 if (speed == phylink_caps_params[i].speed &&
422 duplex == phylink_caps_params[i].duplex)
423 return phylink_caps_params[i].mask;
424 }
425
426 return 0;
427 }
428
429 /**
430 * phylink_get_capabilities() - get capabilities for a given MAC
431 * @interface: phy interface mode defined by &typedef phy_interface_t
432 * @mac_capabilities: bitmask of MAC capabilities
433 * @rate_matching: type of rate matching being performed
434 *
435 * Get the MAC capabilities that are supported by the @interface mode and
436 * @mac_capabilities.
437 */
phylink_get_capabilities(phy_interface_t interface,unsigned long mac_capabilities,int rate_matching)438 unsigned long phylink_get_capabilities(phy_interface_t interface,
439 unsigned long mac_capabilities,
440 int rate_matching)
441 {
442 int max_speed = phylink_interface_max_speed(interface);
443 unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE;
444 unsigned long matched_caps = 0;
445
446 switch (interface) {
447 case PHY_INTERFACE_MODE_USXGMII:
448 caps |= MAC_10000FD | MAC_5000FD | MAC_2500FD;
449 fallthrough;
450
451 case PHY_INTERFACE_MODE_RGMII_TXID:
452 case PHY_INTERFACE_MODE_RGMII_RXID:
453 case PHY_INTERFACE_MODE_RGMII_ID:
454 case PHY_INTERFACE_MODE_RGMII:
455 case PHY_INTERFACE_MODE_QSGMII:
456 case PHY_INTERFACE_MODE_QUSGMII:
457 case PHY_INTERFACE_MODE_SGMII:
458 case PHY_INTERFACE_MODE_GMII:
459 caps |= MAC_1000HD | MAC_1000FD;
460 fallthrough;
461
462 case PHY_INTERFACE_MODE_REVRMII:
463 case PHY_INTERFACE_MODE_RMII:
464 case PHY_INTERFACE_MODE_SMII:
465 case PHY_INTERFACE_MODE_REVMII:
466 case PHY_INTERFACE_MODE_MII:
467 caps |= MAC_10HD | MAC_10FD;
468 fallthrough;
469
470 case PHY_INTERFACE_MODE_100BASEX:
471 caps |= MAC_100HD | MAC_100FD;
472 break;
473
474 case PHY_INTERFACE_MODE_TBI:
475 case PHY_INTERFACE_MODE_MOCA:
476 case PHY_INTERFACE_MODE_RTBI:
477 case PHY_INTERFACE_MODE_1000BASEX:
478 caps |= MAC_1000HD;
479 fallthrough;
480 case PHY_INTERFACE_MODE_1000BASEKX:
481 case PHY_INTERFACE_MODE_TRGMII:
482 caps |= MAC_1000FD;
483 break;
484
485 case PHY_INTERFACE_MODE_2500BASEX:
486 caps |= MAC_2500FD;
487 break;
488
489 case PHY_INTERFACE_MODE_5GBASER:
490 caps |= MAC_5000FD;
491 break;
492
493 case PHY_INTERFACE_MODE_XGMII:
494 case PHY_INTERFACE_MODE_RXAUI:
495 case PHY_INTERFACE_MODE_XAUI:
496 case PHY_INTERFACE_MODE_10GBASER:
497 case PHY_INTERFACE_MODE_10GKR:
498 caps |= MAC_10000FD;
499 break;
500
501 case PHY_INTERFACE_MODE_25GBASER:
502 caps |= MAC_25000FD;
503 break;
504
505 case PHY_INTERFACE_MODE_XLGMII:
506 caps |= MAC_40000FD;
507 break;
508
509 case PHY_INTERFACE_MODE_INTERNAL:
510 caps |= ~0;
511 break;
512
513 case PHY_INTERFACE_MODE_NA:
514 case PHY_INTERFACE_MODE_MAX:
515 break;
516 }
517
518 switch (rate_matching) {
519 case RATE_MATCH_OPEN_LOOP:
520 /* TODO */
521 fallthrough;
522 case RATE_MATCH_NONE:
523 matched_caps = 0;
524 break;
525 case RATE_MATCH_PAUSE: {
526 /* The MAC must support asymmetric pause towards the local
527 * device for this. We could allow just symmetric pause, but
528 * then we might have to renegotiate if the link partner
529 * doesn't support pause. This is because there's no way to
530 * accept pause frames without transmitting them if we only
531 * support symmetric pause.
532 */
533 if (!(mac_capabilities & MAC_SYM_PAUSE) ||
534 !(mac_capabilities & MAC_ASYM_PAUSE))
535 break;
536
537 /* We can't adapt if the MAC doesn't support the interface's
538 * max speed at full duplex.
539 */
540 if (mac_capabilities &
541 phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) {
542 /* Although a duplex-matching phy might exist, we
543 * conservatively remove these modes because the MAC
544 * will not be aware of the half-duplex nature of the
545 * link.
546 */
547 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD));
548 matched_caps &= ~(MAC_1000HD | MAC_100HD | MAC_10HD);
549 }
550 break;
551 }
552 case RATE_MATCH_CRS:
553 /* The MAC must support half duplex at the interface's max
554 * speed.
555 */
556 if (mac_capabilities &
557 phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) {
558 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD));
559 matched_caps &= mac_capabilities;
560 }
561 break;
562 }
563
564 return (caps & mac_capabilities) | matched_caps;
565 }
566 EXPORT_SYMBOL_GPL(phylink_get_capabilities);
567
568 /**
569 * phylink_validate_mask_caps() - Restrict link modes based on caps
570 * @supported: ethtool bitmask for supported link modes.
571 * @state: pointer to a &struct phylink_link_state.
572 * @mac_capabilities: bitmask of MAC capabilities
573 *
574 * Calculate the supported link modes based on @mac_capabilities, and restrict
575 * @supported and @state based on that. Use this function if your capabiliies
576 * aren't constant, such as if they vary depending on the interface.
577 */
phylink_validate_mask_caps(unsigned long * supported,struct phylink_link_state * state,unsigned long mac_capabilities)578 void phylink_validate_mask_caps(unsigned long *supported,
579 struct phylink_link_state *state,
580 unsigned long mac_capabilities)
581 {
582 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
583 unsigned long caps;
584
585 phylink_set_port_modes(mask);
586 phylink_set(mask, Autoneg);
587 caps = phylink_get_capabilities(state->interface, mac_capabilities,
588 state->rate_matching);
589 phylink_caps_to_linkmodes(mask, caps);
590
591 linkmode_and(supported, supported, mask);
592 linkmode_and(state->advertising, state->advertising, mask);
593 }
594 EXPORT_SYMBOL_GPL(phylink_validate_mask_caps);
595
596 /**
597 * phylink_generic_validate() - generic validate() callback implementation
598 * @config: a pointer to a &struct phylink_config.
599 * @supported: ethtool bitmask for supported link modes.
600 * @state: a pointer to a &struct phylink_link_state.
601 *
602 * Generic implementation of the validate() callback that MAC drivers can
603 * use when they pass the range of supported interfaces and MAC capabilities.
604 */
phylink_generic_validate(struct phylink_config * config,unsigned long * supported,struct phylink_link_state * state)605 void phylink_generic_validate(struct phylink_config *config,
606 unsigned long *supported,
607 struct phylink_link_state *state)
608 {
609 phylink_validate_mask_caps(supported, state, config->mac_capabilities);
610 }
611 EXPORT_SYMBOL_GPL(phylink_generic_validate);
612
phylink_validate_mac_and_pcs(struct phylink * pl,unsigned long * supported,struct phylink_link_state * state)613 static int phylink_validate_mac_and_pcs(struct phylink *pl,
614 unsigned long *supported,
615 struct phylink_link_state *state)
616 {
617 struct phylink_pcs *pcs;
618 int ret;
619
620 /* Get the PCS for this interface mode */
621 if (pl->using_mac_select_pcs) {
622 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
623 if (IS_ERR(pcs))
624 return PTR_ERR(pcs);
625 } else {
626 pcs = pl->pcs;
627 }
628
629 if (pcs) {
630 /* The PCS, if present, must be setup before phylink_create()
631 * has been called. If the ops is not initialised, print an
632 * error and backtrace rather than oopsing the kernel.
633 */
634 if (!pcs->ops) {
635 phylink_err(pl, "interface %s: uninitialised PCS\n",
636 phy_modes(state->interface));
637 dump_stack();
638 return -EINVAL;
639 }
640
641 /* Validate the link parameters with the PCS */
642 if (pcs->ops->pcs_validate) {
643 ret = pcs->ops->pcs_validate(pcs, supported, state);
644 if (ret < 0 || phylink_is_empty_linkmode(supported))
645 return -EINVAL;
646
647 /* Ensure the advertising mask is a subset of the
648 * supported mask.
649 */
650 linkmode_and(state->advertising, state->advertising,
651 supported);
652 }
653 }
654
655 /* Then validate the link parameters with the MAC */
656 if (pl->mac_ops->validate)
657 pl->mac_ops->validate(pl->config, supported, state);
658 else
659 phylink_generic_validate(pl->config, supported, state);
660
661 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
662 }
663
phylink_validate_mask(struct phylink * pl,unsigned long * supported,struct phylink_link_state * state,const unsigned long * interfaces)664 static int phylink_validate_mask(struct phylink *pl, unsigned long *supported,
665 struct phylink_link_state *state,
666 const unsigned long *interfaces)
667 {
668 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, };
669 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, };
670 __ETHTOOL_DECLARE_LINK_MODE_MASK(s);
671 struct phylink_link_state t;
672 int intf;
673
674 for (intf = 0; intf < PHY_INTERFACE_MODE_MAX; intf++) {
675 if (test_bit(intf, interfaces)) {
676 linkmode_copy(s, supported);
677
678 t = *state;
679 t.interface = intf;
680 if (!phylink_validate_mac_and_pcs(pl, s, &t)) {
681 linkmode_or(all_s, all_s, s);
682 linkmode_or(all_adv, all_adv, t.advertising);
683 }
684 }
685 }
686
687 linkmode_copy(supported, all_s);
688 linkmode_copy(state->advertising, all_adv);
689
690 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
691 }
692
phylink_validate(struct phylink * pl,unsigned long * supported,struct phylink_link_state * state)693 static int phylink_validate(struct phylink *pl, unsigned long *supported,
694 struct phylink_link_state *state)
695 {
696 const unsigned long *interfaces = pl->config->supported_interfaces;
697
698 if (!phy_interface_empty(interfaces)) {
699 if (state->interface == PHY_INTERFACE_MODE_NA)
700 return phylink_validate_mask(pl, supported, state,
701 interfaces);
702
703 if (!test_bit(state->interface, interfaces))
704 return -EINVAL;
705 }
706
707 return phylink_validate_mac_and_pcs(pl, supported, state);
708 }
709
phylink_parse_fixedlink(struct phylink * pl,struct fwnode_handle * fwnode)710 static int phylink_parse_fixedlink(struct phylink *pl,
711 struct fwnode_handle *fwnode)
712 {
713 struct fwnode_handle *fixed_node;
714 bool pause, asym_pause, autoneg;
715 const struct phy_setting *s;
716 struct gpio_desc *desc;
717 u32 speed;
718 int ret;
719
720 fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link");
721 if (fixed_node) {
722 ret = fwnode_property_read_u32(fixed_node, "speed", &speed);
723
724 pl->link_config.speed = speed;
725 pl->link_config.duplex = DUPLEX_HALF;
726
727 if (fwnode_property_read_bool(fixed_node, "full-duplex"))
728 pl->link_config.duplex = DUPLEX_FULL;
729
730 /* We treat the "pause" and "asym-pause" terminology as
731 * defining the link partner's ability.
732 */
733 if (fwnode_property_read_bool(fixed_node, "pause"))
734 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
735 pl->link_config.lp_advertising);
736 if (fwnode_property_read_bool(fixed_node, "asym-pause"))
737 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
738 pl->link_config.lp_advertising);
739
740 if (ret == 0) {
741 desc = fwnode_gpiod_get_index(fixed_node, "link", 0,
742 GPIOD_IN, "?");
743
744 if (!IS_ERR(desc))
745 pl->link_gpio = desc;
746 else if (desc == ERR_PTR(-EPROBE_DEFER))
747 ret = -EPROBE_DEFER;
748 }
749 fwnode_handle_put(fixed_node);
750
751 if (ret)
752 return ret;
753 } else {
754 u32 prop[5];
755
756 ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
757 NULL, 0);
758 if (ret != ARRAY_SIZE(prop)) {
759 phylink_err(pl, "broken fixed-link?\n");
760 return -EINVAL;
761 }
762
763 ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
764 prop, ARRAY_SIZE(prop));
765 if (!ret) {
766 pl->link_config.duplex = prop[1] ?
767 DUPLEX_FULL : DUPLEX_HALF;
768 pl->link_config.speed = prop[2];
769 if (prop[3])
770 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
771 pl->link_config.lp_advertising);
772 if (prop[4])
773 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
774 pl->link_config.lp_advertising);
775 }
776 }
777
778 if (pl->link_config.speed > SPEED_1000 &&
779 pl->link_config.duplex != DUPLEX_FULL)
780 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n",
781 pl->link_config.speed);
782
783 bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
784 linkmode_copy(pl->link_config.advertising, pl->supported);
785 phylink_validate(pl, pl->supported, &pl->link_config);
786
787 pause = phylink_test(pl->supported, Pause);
788 asym_pause = phylink_test(pl->supported, Asym_Pause);
789 autoneg = phylink_test(pl->supported, Autoneg);
790 s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex,
791 pl->supported, true);
792 linkmode_zero(pl->supported);
793 phylink_set(pl->supported, MII);
794
795 if (pause)
796 phylink_set(pl->supported, Pause);
797
798 if (asym_pause)
799 phylink_set(pl->supported, Asym_Pause);
800
801 if (autoneg)
802 phylink_set(pl->supported, Autoneg);
803
804 if (s) {
805 __set_bit(s->bit, pl->supported);
806 __set_bit(s->bit, pl->link_config.lp_advertising);
807 } else {
808 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n",
809 pl->link_config.duplex == DUPLEX_FULL ? "full" : "half",
810 pl->link_config.speed);
811 }
812
813 linkmode_and(pl->link_config.advertising, pl->link_config.advertising,
814 pl->supported);
815
816 pl->link_config.link = 1;
817 pl->link_config.an_complete = 1;
818
819 return 0;
820 }
821
phylink_parse_mode(struct phylink * pl,struct fwnode_handle * fwnode)822 static int phylink_parse_mode(struct phylink *pl, struct fwnode_handle *fwnode)
823 {
824 struct fwnode_handle *dn;
825 const char *managed;
826
827 dn = fwnode_get_named_child_node(fwnode, "fixed-link");
828 if (dn || fwnode_property_present(fwnode, "fixed-link"))
829 pl->cfg_link_an_mode = MLO_AN_FIXED;
830 fwnode_handle_put(dn);
831
832 if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 &&
833 strcmp(managed, "in-band-status") == 0) ||
834 pl->config->ovr_an_inband) {
835 if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
836 phylink_err(pl,
837 "can't use both fixed-link and in-band-status\n");
838 return -EINVAL;
839 }
840
841 linkmode_zero(pl->supported);
842 phylink_set(pl->supported, MII);
843 phylink_set(pl->supported, Autoneg);
844 phylink_set(pl->supported, Asym_Pause);
845 phylink_set(pl->supported, Pause);
846 pl->link_config.an_enabled = true;
847 pl->cfg_link_an_mode = MLO_AN_INBAND;
848
849 switch (pl->link_config.interface) {
850 case PHY_INTERFACE_MODE_SGMII:
851 case PHY_INTERFACE_MODE_QSGMII:
852 case PHY_INTERFACE_MODE_QUSGMII:
853 case PHY_INTERFACE_MODE_RGMII:
854 case PHY_INTERFACE_MODE_RGMII_ID:
855 case PHY_INTERFACE_MODE_RGMII_RXID:
856 case PHY_INTERFACE_MODE_RGMII_TXID:
857 case PHY_INTERFACE_MODE_RTBI:
858 phylink_set(pl->supported, 10baseT_Half);
859 phylink_set(pl->supported, 10baseT_Full);
860 phylink_set(pl->supported, 100baseT_Half);
861 phylink_set(pl->supported, 100baseT_Full);
862 phylink_set(pl->supported, 1000baseT_Half);
863 phylink_set(pl->supported, 1000baseT_Full);
864 break;
865
866 case PHY_INTERFACE_MODE_1000BASEX:
867 phylink_set(pl->supported, 1000baseX_Full);
868 break;
869
870 case PHY_INTERFACE_MODE_2500BASEX:
871 phylink_set(pl->supported, 2500baseX_Full);
872 break;
873
874 case PHY_INTERFACE_MODE_5GBASER:
875 phylink_set(pl->supported, 5000baseT_Full);
876 break;
877
878 case PHY_INTERFACE_MODE_25GBASER:
879 phylink_set(pl->supported, 25000baseCR_Full);
880 phylink_set(pl->supported, 25000baseKR_Full);
881 phylink_set(pl->supported, 25000baseSR_Full);
882 fallthrough;
883 case PHY_INTERFACE_MODE_USXGMII:
884 case PHY_INTERFACE_MODE_10GKR:
885 case PHY_INTERFACE_MODE_10GBASER:
886 phylink_set(pl->supported, 10baseT_Half);
887 phylink_set(pl->supported, 10baseT_Full);
888 phylink_set(pl->supported, 100baseT_Half);
889 phylink_set(pl->supported, 100baseT_Full);
890 phylink_set(pl->supported, 1000baseT_Half);
891 phylink_set(pl->supported, 1000baseT_Full);
892 phylink_set(pl->supported, 1000baseX_Full);
893 phylink_set(pl->supported, 1000baseKX_Full);
894 phylink_set(pl->supported, 2500baseT_Full);
895 phylink_set(pl->supported, 2500baseX_Full);
896 phylink_set(pl->supported, 5000baseT_Full);
897 phylink_set(pl->supported, 10000baseT_Full);
898 phylink_set(pl->supported, 10000baseKR_Full);
899 phylink_set(pl->supported, 10000baseKX4_Full);
900 phylink_set(pl->supported, 10000baseCR_Full);
901 phylink_set(pl->supported, 10000baseSR_Full);
902 phylink_set(pl->supported, 10000baseLR_Full);
903 phylink_set(pl->supported, 10000baseLRM_Full);
904 phylink_set(pl->supported, 10000baseER_Full);
905 break;
906
907 case PHY_INTERFACE_MODE_XLGMII:
908 phylink_set(pl->supported, 25000baseCR_Full);
909 phylink_set(pl->supported, 25000baseKR_Full);
910 phylink_set(pl->supported, 25000baseSR_Full);
911 phylink_set(pl->supported, 40000baseKR4_Full);
912 phylink_set(pl->supported, 40000baseCR4_Full);
913 phylink_set(pl->supported, 40000baseSR4_Full);
914 phylink_set(pl->supported, 40000baseLR4_Full);
915 phylink_set(pl->supported, 50000baseCR2_Full);
916 phylink_set(pl->supported, 50000baseKR2_Full);
917 phylink_set(pl->supported, 50000baseSR2_Full);
918 phylink_set(pl->supported, 50000baseKR_Full);
919 phylink_set(pl->supported, 50000baseSR_Full);
920 phylink_set(pl->supported, 50000baseCR_Full);
921 phylink_set(pl->supported, 50000baseLR_ER_FR_Full);
922 phylink_set(pl->supported, 50000baseDR_Full);
923 phylink_set(pl->supported, 100000baseKR4_Full);
924 phylink_set(pl->supported, 100000baseSR4_Full);
925 phylink_set(pl->supported, 100000baseCR4_Full);
926 phylink_set(pl->supported, 100000baseLR4_ER4_Full);
927 phylink_set(pl->supported, 100000baseKR2_Full);
928 phylink_set(pl->supported, 100000baseSR2_Full);
929 phylink_set(pl->supported, 100000baseCR2_Full);
930 phylink_set(pl->supported, 100000baseLR2_ER2_FR2_Full);
931 phylink_set(pl->supported, 100000baseDR2_Full);
932 break;
933
934 default:
935 phylink_err(pl,
936 "incorrect link mode %s for in-band status\n",
937 phy_modes(pl->link_config.interface));
938 return -EINVAL;
939 }
940
941 linkmode_copy(pl->link_config.advertising, pl->supported);
942
943 if (phylink_validate(pl, pl->supported, &pl->link_config)) {
944 phylink_err(pl,
945 "failed to validate link configuration for in-band status\n");
946 return -EINVAL;
947 }
948
949 /* Check if MAC/PCS also supports Autoneg. */
950 pl->link_config.an_enabled = phylink_test(pl->supported, Autoneg);
951 }
952
953 return 0;
954 }
955
phylink_apply_manual_flow(struct phylink * pl,struct phylink_link_state * state)956 static void phylink_apply_manual_flow(struct phylink *pl,
957 struct phylink_link_state *state)
958 {
959 /* If autoneg is disabled, pause AN is also disabled */
960 if (!state->an_enabled)
961 state->pause &= ~MLO_PAUSE_AN;
962
963 /* Manual configuration of pause modes */
964 if (!(pl->link_config.pause & MLO_PAUSE_AN))
965 state->pause = pl->link_config.pause;
966 }
967
phylink_resolve_flow(struct phylink_link_state * state)968 static void phylink_resolve_flow(struct phylink_link_state *state)
969 {
970 bool tx_pause, rx_pause;
971
972 state->pause = MLO_PAUSE_NONE;
973 if (state->duplex == DUPLEX_FULL) {
974 linkmode_resolve_pause(state->advertising,
975 state->lp_advertising,
976 &tx_pause, &rx_pause);
977 if (tx_pause)
978 state->pause |= MLO_PAUSE_TX;
979 if (rx_pause)
980 state->pause |= MLO_PAUSE_RX;
981 }
982 }
983
phylink_pcs_poll_stop(struct phylink * pl)984 static void phylink_pcs_poll_stop(struct phylink *pl)
985 {
986 if (pl->cfg_link_an_mode == MLO_AN_INBAND)
987 del_timer(&pl->link_poll);
988 }
989
phylink_pcs_poll_start(struct phylink * pl)990 static void phylink_pcs_poll_start(struct phylink *pl)
991 {
992 if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND)
993 mod_timer(&pl->link_poll, jiffies + HZ);
994 }
995
phylink_mac_config(struct phylink * pl,const struct phylink_link_state * state)996 static void phylink_mac_config(struct phylink *pl,
997 const struct phylink_link_state *state)
998 {
999 phylink_dbg(pl,
1000 "%s: mode=%s/%s/%s/%s/%s adv=%*pb pause=%02x link=%u an=%u\n",
1001 __func__, phylink_an_mode_str(pl->cur_link_an_mode),
1002 phy_modes(state->interface),
1003 phy_speed_to_str(state->speed),
1004 phy_duplex_to_str(state->duplex),
1005 phy_rate_matching_to_str(state->rate_matching),
1006 __ETHTOOL_LINK_MODE_MASK_NBITS, state->advertising,
1007 state->pause, state->link, state->an_enabled);
1008
1009 pl->mac_ops->mac_config(pl->config, pl->cur_link_an_mode, state);
1010 }
1011
phylink_mac_pcs_an_restart(struct phylink * pl)1012 static void phylink_mac_pcs_an_restart(struct phylink *pl)
1013 {
1014 if (pl->link_config.an_enabled &&
1015 phy_interface_mode_is_8023z(pl->link_config.interface) &&
1016 phylink_autoneg_inband(pl->cur_link_an_mode)) {
1017 if (pl->pcs)
1018 pl->pcs->ops->pcs_an_restart(pl->pcs);
1019 else if (pl->config->legacy_pre_march2020)
1020 pl->mac_ops->mac_an_restart(pl->config);
1021 }
1022 }
1023
phylink_major_config(struct phylink * pl,bool restart,const struct phylink_link_state * state)1024 static void phylink_major_config(struct phylink *pl, bool restart,
1025 const struct phylink_link_state *state)
1026 {
1027 struct phylink_pcs *pcs = NULL;
1028 bool pcs_changed = false;
1029 int err;
1030
1031 phylink_dbg(pl, "major config %s\n", phy_modes(state->interface));
1032
1033 if (pl->using_mac_select_pcs) {
1034 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
1035 if (IS_ERR(pcs)) {
1036 phylink_err(pl,
1037 "mac_select_pcs unexpectedly failed: %pe\n",
1038 pcs);
1039 return;
1040 }
1041
1042 pcs_changed = pcs && pl->pcs != pcs;
1043 }
1044
1045 phylink_pcs_poll_stop(pl);
1046
1047 if (pl->mac_ops->mac_prepare) {
1048 err = pl->mac_ops->mac_prepare(pl->config, pl->cur_link_an_mode,
1049 state->interface);
1050 if (err < 0) {
1051 phylink_err(pl, "mac_prepare failed: %pe\n",
1052 ERR_PTR(err));
1053 return;
1054 }
1055 }
1056
1057 /* If we have a new PCS, switch to the new PCS after preparing the MAC
1058 * for the change.
1059 */
1060 if (pcs_changed)
1061 pl->pcs = pcs;
1062
1063 phylink_mac_config(pl, state);
1064
1065 if (pl->pcs) {
1066 err = pl->pcs->ops->pcs_config(pl->pcs, pl->cur_link_an_mode,
1067 state->interface,
1068 state->advertising,
1069 !!(pl->link_config.pause &
1070 MLO_PAUSE_AN));
1071 if (err < 0)
1072 phylink_err(pl, "pcs_config failed: %pe\n",
1073 ERR_PTR(err));
1074 if (err > 0)
1075 restart = true;
1076 }
1077 if (restart)
1078 phylink_mac_pcs_an_restart(pl);
1079
1080 if (pl->mac_ops->mac_finish) {
1081 err = pl->mac_ops->mac_finish(pl->config, pl->cur_link_an_mode,
1082 state->interface);
1083 if (err < 0)
1084 phylink_err(pl, "mac_finish failed: %pe\n",
1085 ERR_PTR(err));
1086 }
1087
1088 phylink_pcs_poll_start(pl);
1089 }
1090
1091 /*
1092 * Reconfigure for a change of inband advertisement.
1093 * If we have a separate PCS, we only need to call its pcs_config() method,
1094 * and then restart AN if it indicates something changed. Otherwise, we do
1095 * the full MAC reconfiguration.
1096 */
phylink_change_inband_advert(struct phylink * pl)1097 static int phylink_change_inband_advert(struct phylink *pl)
1098 {
1099 int ret;
1100
1101 if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state))
1102 return 0;
1103
1104 if (!pl->pcs && pl->config->legacy_pre_march2020) {
1105 /* Legacy method */
1106 phylink_mac_config(pl, &pl->link_config);
1107 phylink_mac_pcs_an_restart(pl);
1108 return 0;
1109 }
1110
1111 phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__,
1112 phylink_an_mode_str(pl->cur_link_an_mode),
1113 phy_modes(pl->link_config.interface),
1114 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising,
1115 pl->link_config.pause);
1116
1117 /* Modern PCS-based method; update the advert at the PCS, and
1118 * restart negotiation if the pcs_config() helper indicates that
1119 * the programmed advertisement has changed.
1120 */
1121 ret = pl->pcs->ops->pcs_config(pl->pcs, pl->cur_link_an_mode,
1122 pl->link_config.interface,
1123 pl->link_config.advertising,
1124 !!(pl->link_config.pause &
1125 MLO_PAUSE_AN));
1126 if (ret < 0)
1127 return ret;
1128
1129 if (ret > 0)
1130 phylink_mac_pcs_an_restart(pl);
1131
1132 return 0;
1133 }
1134
phylink_mac_pcs_get_state(struct phylink * pl,struct phylink_link_state * state)1135 static void phylink_mac_pcs_get_state(struct phylink *pl,
1136 struct phylink_link_state *state)
1137 {
1138 linkmode_copy(state->advertising, pl->link_config.advertising);
1139 linkmode_zero(state->lp_advertising);
1140 state->interface = pl->link_config.interface;
1141 state->an_enabled = pl->link_config.an_enabled;
1142 state->rate_matching = pl->link_config.rate_matching;
1143 if (state->an_enabled) {
1144 state->speed = SPEED_UNKNOWN;
1145 state->duplex = DUPLEX_UNKNOWN;
1146 state->pause = MLO_PAUSE_NONE;
1147 } else {
1148 state->speed = pl->link_config.speed;
1149 state->duplex = pl->link_config.duplex;
1150 state->pause = pl->link_config.pause;
1151 }
1152 state->an_complete = 0;
1153 state->link = 1;
1154
1155 if (pl->pcs)
1156 pl->pcs->ops->pcs_get_state(pl->pcs, state);
1157 else if (pl->mac_ops->mac_pcs_get_state &&
1158 pl->config->legacy_pre_march2020)
1159 pl->mac_ops->mac_pcs_get_state(pl->config, state);
1160 else
1161 state->link = 0;
1162 }
1163
1164 /* The fixed state is... fixed except for the link state,
1165 * which may be determined by a GPIO or a callback.
1166 */
phylink_get_fixed_state(struct phylink * pl,struct phylink_link_state * state)1167 static void phylink_get_fixed_state(struct phylink *pl,
1168 struct phylink_link_state *state)
1169 {
1170 *state = pl->link_config;
1171 if (pl->config->get_fixed_state)
1172 pl->config->get_fixed_state(pl->config, state);
1173 else if (pl->link_gpio)
1174 state->link = !!gpiod_get_value_cansleep(pl->link_gpio);
1175
1176 phylink_resolve_flow(state);
1177 }
1178
phylink_mac_initial_config(struct phylink * pl,bool force_restart)1179 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart)
1180 {
1181 struct phylink_link_state link_state;
1182
1183 switch (pl->cur_link_an_mode) {
1184 case MLO_AN_PHY:
1185 link_state = pl->phy_state;
1186 break;
1187
1188 case MLO_AN_FIXED:
1189 phylink_get_fixed_state(pl, &link_state);
1190 break;
1191
1192 case MLO_AN_INBAND:
1193 link_state = pl->link_config;
1194 if (link_state.interface == PHY_INTERFACE_MODE_SGMII)
1195 link_state.pause = MLO_PAUSE_NONE;
1196 break;
1197
1198 default: /* can't happen */
1199 return;
1200 }
1201
1202 link_state.link = false;
1203
1204 phylink_apply_manual_flow(pl, &link_state);
1205 phylink_major_config(pl, force_restart, &link_state);
1206 }
1207
phylink_pause_to_str(int pause)1208 static const char *phylink_pause_to_str(int pause)
1209 {
1210 switch (pause & MLO_PAUSE_TXRX_MASK) {
1211 case MLO_PAUSE_TX | MLO_PAUSE_RX:
1212 return "rx/tx";
1213 case MLO_PAUSE_TX:
1214 return "tx";
1215 case MLO_PAUSE_RX:
1216 return "rx";
1217 default:
1218 return "off";
1219 }
1220 }
1221
phylink_link_up(struct phylink * pl,struct phylink_link_state link_state)1222 static void phylink_link_up(struct phylink *pl,
1223 struct phylink_link_state link_state)
1224 {
1225 struct net_device *ndev = pl->netdev;
1226 int speed, duplex;
1227 bool rx_pause;
1228
1229 speed = link_state.speed;
1230 duplex = link_state.duplex;
1231 rx_pause = !!(link_state.pause & MLO_PAUSE_RX);
1232
1233 switch (link_state.rate_matching) {
1234 case RATE_MATCH_PAUSE:
1235 /* The PHY is doing rate matchion from the media rate (in
1236 * the link_state) to the interface speed, and will send
1237 * pause frames to the MAC to limit its transmission speed.
1238 */
1239 speed = phylink_interface_max_speed(link_state.interface);
1240 duplex = DUPLEX_FULL;
1241 rx_pause = true;
1242 break;
1243
1244 case RATE_MATCH_CRS:
1245 /* The PHY is doing rate matchion from the media rate (in
1246 * the link_state) to the interface speed, and will cause
1247 * collisions to the MAC to limit its transmission speed.
1248 */
1249 speed = phylink_interface_max_speed(link_state.interface);
1250 duplex = DUPLEX_HALF;
1251 break;
1252 }
1253
1254 pl->cur_interface = link_state.interface;
1255
1256 if (pl->pcs && pl->pcs->ops->pcs_link_up)
1257 pl->pcs->ops->pcs_link_up(pl->pcs, pl->cur_link_an_mode,
1258 pl->cur_interface, speed, duplex);
1259
1260 pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->cur_link_an_mode,
1261 pl->cur_interface, speed, duplex,
1262 !!(link_state.pause & MLO_PAUSE_TX), rx_pause);
1263
1264 if (ndev)
1265 netif_carrier_on(ndev);
1266
1267 phylink_info(pl,
1268 "Link is Up - %s/%s - flow control %s\n",
1269 phy_speed_to_str(link_state.speed),
1270 phy_duplex_to_str(link_state.duplex),
1271 phylink_pause_to_str(link_state.pause));
1272 }
1273
phylink_link_down(struct phylink * pl)1274 static void phylink_link_down(struct phylink *pl)
1275 {
1276 struct net_device *ndev = pl->netdev;
1277
1278 if (ndev)
1279 netif_carrier_off(ndev);
1280 pl->mac_ops->mac_link_down(pl->config, pl->cur_link_an_mode,
1281 pl->cur_interface);
1282 phylink_info(pl, "Link is Down\n");
1283 }
1284
phylink_resolve(struct work_struct * w)1285 static void phylink_resolve(struct work_struct *w)
1286 {
1287 struct phylink *pl = container_of(w, struct phylink, resolve);
1288 struct phylink_link_state link_state;
1289 struct net_device *ndev = pl->netdev;
1290 bool mac_config = false;
1291 bool retrigger = false;
1292 bool cur_link_state;
1293
1294 mutex_lock(&pl->state_mutex);
1295 if (pl->netdev)
1296 cur_link_state = netif_carrier_ok(ndev);
1297 else
1298 cur_link_state = pl->old_link_state;
1299
1300 if (pl->phylink_disable_state) {
1301 pl->mac_link_dropped = false;
1302 link_state.link = false;
1303 } else if (pl->mac_link_dropped) {
1304 link_state.link = false;
1305 retrigger = true;
1306 } else {
1307 switch (pl->cur_link_an_mode) {
1308 case MLO_AN_PHY:
1309 link_state = pl->phy_state;
1310 phylink_apply_manual_flow(pl, &link_state);
1311 mac_config = link_state.link;
1312 break;
1313
1314 case MLO_AN_FIXED:
1315 phylink_get_fixed_state(pl, &link_state);
1316 mac_config = link_state.link;
1317 break;
1318
1319 case MLO_AN_INBAND:
1320 phylink_mac_pcs_get_state(pl, &link_state);
1321
1322 /* The PCS may have a latching link-fail indicator.
1323 * If the link was up, bring the link down and
1324 * re-trigger the resolve. Otherwise, re-read the
1325 * PCS state to get the current status of the link.
1326 */
1327 if (!link_state.link) {
1328 if (cur_link_state)
1329 retrigger = true;
1330 else
1331 phylink_mac_pcs_get_state(pl,
1332 &link_state);
1333 }
1334
1335 /* If we have a phy, the "up" state is the union of
1336 * both the PHY and the MAC
1337 */
1338 if (pl->phydev)
1339 link_state.link &= pl->phy_state.link;
1340
1341 /* Only update if the PHY link is up */
1342 if (pl->phydev && pl->phy_state.link) {
1343 /* If the interface has changed, force a
1344 * link down event if the link isn't already
1345 * down, and re-resolve.
1346 */
1347 if (link_state.interface !=
1348 pl->phy_state.interface) {
1349 retrigger = true;
1350 link_state.link = false;
1351 }
1352 link_state.interface = pl->phy_state.interface;
1353
1354 /* If we are doing rate matching, then the
1355 * link speed/duplex comes from the PHY
1356 */
1357 if (pl->phy_state.rate_matching) {
1358 link_state.rate_matching =
1359 pl->phy_state.rate_matching;
1360 link_state.speed = pl->phy_state.speed;
1361 link_state.duplex =
1362 pl->phy_state.duplex;
1363 }
1364
1365 /* If we have a PHY, we need to update with
1366 * the PHY flow control bits.
1367 */
1368 link_state.pause = pl->phy_state.pause;
1369 mac_config = true;
1370 }
1371 phylink_apply_manual_flow(pl, &link_state);
1372 break;
1373 }
1374 }
1375
1376 if (mac_config) {
1377 if (link_state.interface != pl->link_config.interface) {
1378 /* The interface has changed, force the link down and
1379 * then reconfigure.
1380 */
1381 if (cur_link_state) {
1382 phylink_link_down(pl);
1383 cur_link_state = false;
1384 }
1385 phylink_major_config(pl, false, &link_state);
1386 pl->link_config.interface = link_state.interface;
1387 } else if (!pl->pcs && pl->config->legacy_pre_march2020) {
1388 /* The interface remains unchanged, only the speed,
1389 * duplex or pause settings have changed. Call the
1390 * old mac_config() method to configure the MAC/PCS
1391 * only if we do not have a legacy MAC driver.
1392 */
1393 phylink_mac_config(pl, &link_state);
1394 }
1395 }
1396
1397 if (link_state.link != cur_link_state) {
1398 pl->old_link_state = link_state.link;
1399 if (!link_state.link)
1400 phylink_link_down(pl);
1401 else
1402 phylink_link_up(pl, link_state);
1403 }
1404 if (!link_state.link && retrigger) {
1405 pl->mac_link_dropped = false;
1406 queue_work(system_power_efficient_wq, &pl->resolve);
1407 }
1408 mutex_unlock(&pl->state_mutex);
1409 }
1410
phylink_run_resolve(struct phylink * pl)1411 static void phylink_run_resolve(struct phylink *pl)
1412 {
1413 if (!pl->phylink_disable_state)
1414 queue_work(system_power_efficient_wq, &pl->resolve);
1415 }
1416
phylink_run_resolve_and_disable(struct phylink * pl,int bit)1417 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit)
1418 {
1419 unsigned long state = pl->phylink_disable_state;
1420
1421 set_bit(bit, &pl->phylink_disable_state);
1422 if (state == 0) {
1423 queue_work(system_power_efficient_wq, &pl->resolve);
1424 flush_work(&pl->resolve);
1425 }
1426 }
1427
phylink_enable_and_run_resolve(struct phylink * pl,int bit)1428 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit)
1429 {
1430 clear_bit(bit, &pl->phylink_disable_state);
1431 phylink_run_resolve(pl);
1432 }
1433
phylink_fixed_poll(struct timer_list * t)1434 static void phylink_fixed_poll(struct timer_list *t)
1435 {
1436 struct phylink *pl = container_of(t, struct phylink, link_poll);
1437
1438 mod_timer(t, jiffies + HZ);
1439
1440 phylink_run_resolve(pl);
1441 }
1442
1443 static const struct sfp_upstream_ops sfp_phylink_ops;
1444
phylink_register_sfp(struct phylink * pl,struct fwnode_handle * fwnode)1445 static int phylink_register_sfp(struct phylink *pl,
1446 struct fwnode_handle *fwnode)
1447 {
1448 struct sfp_bus *bus;
1449 int ret;
1450
1451 if (!fwnode)
1452 return 0;
1453
1454 bus = sfp_bus_find_fwnode(fwnode);
1455 if (IS_ERR(bus)) {
1456 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus);
1457 return PTR_ERR(bus);
1458 }
1459
1460 pl->sfp_bus = bus;
1461
1462 ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops);
1463 sfp_bus_put(bus);
1464
1465 return ret;
1466 }
1467
1468 /**
1469 * phylink_create() - create a phylink instance
1470 * @config: a pointer to the target &struct phylink_config
1471 * @fwnode: a pointer to a &struct fwnode_handle describing the network
1472 * interface
1473 * @iface: the desired link mode defined by &typedef phy_interface_t
1474 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC.
1475 *
1476 * Create a new phylink instance, and parse the link parameters found in @np.
1477 * This will parse in-band modes, fixed-link or SFP configuration.
1478 *
1479 * Note: the rtnl lock must not be held when calling this function.
1480 *
1481 * Returns a pointer to a &struct phylink, or an error-pointer value. Users
1482 * must use IS_ERR() to check for errors from this function.
1483 */
phylink_create(struct phylink_config * config,struct fwnode_handle * fwnode,phy_interface_t iface,const struct phylink_mac_ops * mac_ops)1484 struct phylink *phylink_create(struct phylink_config *config,
1485 struct fwnode_handle *fwnode,
1486 phy_interface_t iface,
1487 const struct phylink_mac_ops *mac_ops)
1488 {
1489 bool using_mac_select_pcs = false;
1490 struct phylink *pl;
1491 int ret;
1492
1493 if (mac_ops->mac_select_pcs &&
1494 mac_ops->mac_select_pcs(config, PHY_INTERFACE_MODE_NA) !=
1495 ERR_PTR(-EOPNOTSUPP))
1496 using_mac_select_pcs = true;
1497
1498 /* Validate the supplied configuration */
1499 if (using_mac_select_pcs &&
1500 phy_interface_empty(config->supported_interfaces)) {
1501 dev_err(config->dev,
1502 "phylink: error: empty supported_interfaces but mac_select_pcs() method present\n");
1503 return ERR_PTR(-EINVAL);
1504 }
1505
1506 pl = kzalloc(sizeof(*pl), GFP_KERNEL);
1507 if (!pl)
1508 return ERR_PTR(-ENOMEM);
1509
1510 mutex_init(&pl->state_mutex);
1511 INIT_WORK(&pl->resolve, phylink_resolve);
1512
1513 pl->config = config;
1514 if (config->type == PHYLINK_NETDEV) {
1515 pl->netdev = to_net_dev(config->dev);
1516 } else if (config->type == PHYLINK_DEV) {
1517 pl->dev = config->dev;
1518 } else {
1519 kfree(pl);
1520 return ERR_PTR(-EINVAL);
1521 }
1522
1523 pl->using_mac_select_pcs = using_mac_select_pcs;
1524 pl->phy_state.interface = iface;
1525 pl->link_interface = iface;
1526 if (iface == PHY_INTERFACE_MODE_MOCA)
1527 pl->link_port = PORT_BNC;
1528 else
1529 pl->link_port = PORT_MII;
1530 pl->link_config.interface = iface;
1531 pl->link_config.pause = MLO_PAUSE_AN;
1532 pl->link_config.speed = SPEED_UNKNOWN;
1533 pl->link_config.duplex = DUPLEX_UNKNOWN;
1534 pl->link_config.an_enabled = true;
1535 pl->mac_ops = mac_ops;
1536 __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state);
1537 timer_setup(&pl->link_poll, phylink_fixed_poll, 0);
1538
1539 bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
1540 linkmode_copy(pl->link_config.advertising, pl->supported);
1541 phylink_validate(pl, pl->supported, &pl->link_config);
1542
1543 ret = phylink_parse_mode(pl, fwnode);
1544 if (ret < 0) {
1545 kfree(pl);
1546 return ERR_PTR(ret);
1547 }
1548
1549 if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
1550 ret = phylink_parse_fixedlink(pl, fwnode);
1551 if (ret < 0) {
1552 kfree(pl);
1553 return ERR_PTR(ret);
1554 }
1555 }
1556
1557 pl->cur_link_an_mode = pl->cfg_link_an_mode;
1558
1559 ret = phylink_register_sfp(pl, fwnode);
1560 if (ret < 0) {
1561 kfree(pl);
1562 return ERR_PTR(ret);
1563 }
1564
1565 return pl;
1566 }
1567 EXPORT_SYMBOL_GPL(phylink_create);
1568
1569 /**
1570 * phylink_destroy() - cleanup and destroy the phylink instance
1571 * @pl: a pointer to a &struct phylink returned from phylink_create()
1572 *
1573 * Destroy a phylink instance. Any PHY that has been attached must have been
1574 * cleaned up via phylink_disconnect_phy() prior to calling this function.
1575 *
1576 * Note: the rtnl lock must not be held when calling this function.
1577 */
phylink_destroy(struct phylink * pl)1578 void phylink_destroy(struct phylink *pl)
1579 {
1580 sfp_bus_del_upstream(pl->sfp_bus);
1581 if (pl->link_gpio)
1582 gpiod_put(pl->link_gpio);
1583
1584 cancel_work_sync(&pl->resolve);
1585 kfree(pl);
1586 }
1587 EXPORT_SYMBOL_GPL(phylink_destroy);
1588
phylink_phy_change(struct phy_device * phydev,bool up)1589 static void phylink_phy_change(struct phy_device *phydev, bool up)
1590 {
1591 struct phylink *pl = phydev->phylink;
1592 bool tx_pause, rx_pause;
1593
1594 phy_get_pause(phydev, &tx_pause, &rx_pause);
1595
1596 mutex_lock(&pl->state_mutex);
1597 pl->phy_state.speed = phydev->speed;
1598 pl->phy_state.duplex = phydev->duplex;
1599 pl->phy_state.rate_matching = phydev->rate_matching;
1600 pl->phy_state.pause = MLO_PAUSE_NONE;
1601 if (tx_pause)
1602 pl->phy_state.pause |= MLO_PAUSE_TX;
1603 if (rx_pause)
1604 pl->phy_state.pause |= MLO_PAUSE_RX;
1605 pl->phy_state.interface = phydev->interface;
1606 pl->phy_state.link = up;
1607 mutex_unlock(&pl->state_mutex);
1608
1609 phylink_run_resolve(pl);
1610
1611 phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s\n", up ? "up" : "down",
1612 phy_modes(phydev->interface),
1613 phy_speed_to_str(phydev->speed),
1614 phy_duplex_to_str(phydev->duplex),
1615 phy_rate_matching_to_str(phydev->rate_matching),
1616 phylink_pause_to_str(pl->phy_state.pause));
1617 }
1618
phylink_bringup_phy(struct phylink * pl,struct phy_device * phy,phy_interface_t interface)1619 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy,
1620 phy_interface_t interface)
1621 {
1622 struct phylink_link_state config;
1623 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
1624 char *irq_str;
1625 int ret;
1626
1627 /*
1628 * This is the new way of dealing with flow control for PHYs,
1629 * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
1630 * phy drivers should not set SUPPORTED_[Asym_]Pause") except
1631 * using our validate call to the MAC, we rely upon the MAC
1632 * clearing the bits from both supported and advertising fields.
1633 */
1634 phy_support_asym_pause(phy);
1635
1636 memset(&config, 0, sizeof(config));
1637 linkmode_copy(supported, phy->supported);
1638 linkmode_copy(config.advertising, phy->advertising);
1639
1640 /* Check whether we would use rate matching for the proposed interface
1641 * mode.
1642 */
1643 config.rate_matching = phy_get_rate_matching(phy, interface);
1644
1645 /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R,
1646 * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching.
1647 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching
1648 * their Serdes is either unnecessary or not reasonable.
1649 *
1650 * For these which switch interface modes, we really need to know which
1651 * interface modes the PHY supports to properly work out which ethtool
1652 * linkmodes can be supported. For now, as a work-around, we validate
1653 * against all interface modes, which may lead to more ethtool link
1654 * modes being advertised than are actually supported.
1655 */
1656 if (phy->is_c45 && config.rate_matching == RATE_MATCH_NONE &&
1657 interface != PHY_INTERFACE_MODE_RXAUI &&
1658 interface != PHY_INTERFACE_MODE_XAUI &&
1659 interface != PHY_INTERFACE_MODE_USXGMII)
1660 config.interface = PHY_INTERFACE_MODE_NA;
1661 else
1662 config.interface = interface;
1663
1664 ret = phylink_validate(pl, supported, &config);
1665 if (ret) {
1666 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n",
1667 phy_modes(config.interface),
1668 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported,
1669 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising,
1670 ERR_PTR(ret));
1671 return ret;
1672 }
1673
1674 phy->phylink = pl;
1675 phy->phy_link_change = phylink_phy_change;
1676
1677 irq_str = phy_attached_info_irq(phy);
1678 phylink_info(pl,
1679 "PHY [%s] driver [%s] (irq=%s)\n",
1680 dev_name(&phy->mdio.dev), phy->drv->name, irq_str);
1681 kfree(irq_str);
1682
1683 mutex_lock(&phy->lock);
1684 mutex_lock(&pl->state_mutex);
1685 pl->phydev = phy;
1686 pl->phy_state.interface = interface;
1687 pl->phy_state.pause = MLO_PAUSE_NONE;
1688 pl->phy_state.speed = SPEED_UNKNOWN;
1689 pl->phy_state.duplex = DUPLEX_UNKNOWN;
1690 pl->phy_state.rate_matching = RATE_MATCH_NONE;
1691 linkmode_copy(pl->supported, supported);
1692 linkmode_copy(pl->link_config.advertising, config.advertising);
1693
1694 /* Restrict the phy advertisement according to the MAC support. */
1695 linkmode_copy(phy->advertising, config.advertising);
1696 mutex_unlock(&pl->state_mutex);
1697 mutex_unlock(&phy->lock);
1698
1699 phylink_dbg(pl,
1700 "phy: %s setting supported %*pb advertising %*pb\n",
1701 phy_modes(interface),
1702 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported,
1703 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising);
1704
1705 if (phy_interrupt_is_valid(phy))
1706 phy_request_interrupt(phy);
1707
1708 if (pl->config->mac_managed_pm)
1709 phy->mac_managed_pm = true;
1710
1711 return 0;
1712 }
1713
phylink_attach_phy(struct phylink * pl,struct phy_device * phy,phy_interface_t interface)1714 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy,
1715 phy_interface_t interface)
1716 {
1717 if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED ||
1718 (pl->cfg_link_an_mode == MLO_AN_INBAND &&
1719 phy_interface_mode_is_8023z(interface) && !pl->sfp_bus)))
1720 return -EINVAL;
1721
1722 if (pl->phydev)
1723 return -EBUSY;
1724
1725 return phy_attach_direct(pl->netdev, phy, 0, interface);
1726 }
1727
1728 /**
1729 * phylink_connect_phy() - connect a PHY to the phylink instance
1730 * @pl: a pointer to a &struct phylink returned from phylink_create()
1731 * @phy: a pointer to a &struct phy_device.
1732 *
1733 * Connect @phy to the phylink instance specified by @pl by calling
1734 * phy_attach_direct(). Configure the @phy according to the MAC driver's
1735 * capabilities, start the PHYLIB state machine and enable any interrupts
1736 * that the PHY supports.
1737 *
1738 * This updates the phylink's ethtool supported and advertising link mode
1739 * masks.
1740 *
1741 * Returns 0 on success or a negative errno.
1742 */
phylink_connect_phy(struct phylink * pl,struct phy_device * phy)1743 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy)
1744 {
1745 int ret;
1746
1747 /* Use PHY device/driver interface */
1748 if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
1749 pl->link_interface = phy->interface;
1750 pl->link_config.interface = pl->link_interface;
1751 }
1752
1753 ret = phylink_attach_phy(pl, phy, pl->link_interface);
1754 if (ret < 0)
1755 return ret;
1756
1757 ret = phylink_bringup_phy(pl, phy, pl->link_config.interface);
1758 if (ret)
1759 phy_detach(phy);
1760
1761 return ret;
1762 }
1763 EXPORT_SYMBOL_GPL(phylink_connect_phy);
1764
1765 /**
1766 * phylink_of_phy_connect() - connect the PHY specified in the DT mode.
1767 * @pl: a pointer to a &struct phylink returned from phylink_create()
1768 * @dn: a pointer to a &struct device_node.
1769 * @flags: PHY-specific flags to communicate to the PHY device driver
1770 *
1771 * Connect the phy specified in the device node @dn to the phylink instance
1772 * specified by @pl. Actions specified in phylink_connect_phy() will be
1773 * performed.
1774 *
1775 * Returns 0 on success or a negative errno.
1776 */
phylink_of_phy_connect(struct phylink * pl,struct device_node * dn,u32 flags)1777 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn,
1778 u32 flags)
1779 {
1780 return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags);
1781 }
1782 EXPORT_SYMBOL_GPL(phylink_of_phy_connect);
1783
1784 /**
1785 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode.
1786 * @pl: a pointer to a &struct phylink returned from phylink_create()
1787 * @fwnode: a pointer to a &struct fwnode_handle.
1788 * @flags: PHY-specific flags to communicate to the PHY device driver
1789 *
1790 * Connect the phy specified @fwnode to the phylink instance specified
1791 * by @pl.
1792 *
1793 * Returns 0 on success or a negative errno.
1794 */
phylink_fwnode_phy_connect(struct phylink * pl,struct fwnode_handle * fwnode,u32 flags)1795 int phylink_fwnode_phy_connect(struct phylink *pl,
1796 struct fwnode_handle *fwnode,
1797 u32 flags)
1798 {
1799 struct fwnode_handle *phy_fwnode;
1800 struct phy_device *phy_dev;
1801 int ret;
1802
1803 /* Fixed links and 802.3z are handled without needing a PHY */
1804 if (pl->cfg_link_an_mode == MLO_AN_FIXED ||
1805 (pl->cfg_link_an_mode == MLO_AN_INBAND &&
1806 phy_interface_mode_is_8023z(pl->link_interface)))
1807 return 0;
1808
1809 phy_fwnode = fwnode_get_phy_node(fwnode);
1810 if (IS_ERR(phy_fwnode)) {
1811 if (pl->cfg_link_an_mode == MLO_AN_PHY)
1812 return -ENODEV;
1813 return 0;
1814 }
1815
1816 phy_dev = fwnode_phy_find_device(phy_fwnode);
1817 /* We're done with the phy_node handle */
1818 fwnode_handle_put(phy_fwnode);
1819 if (!phy_dev)
1820 return -ENODEV;
1821
1822 /* Use PHY device/driver interface */
1823 if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
1824 pl->link_interface = phy_dev->interface;
1825 pl->link_config.interface = pl->link_interface;
1826 }
1827
1828 ret = phy_attach_direct(pl->netdev, phy_dev, flags,
1829 pl->link_interface);
1830 phy_device_free(phy_dev);
1831 if (ret)
1832 return ret;
1833
1834 ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface);
1835 if (ret)
1836 phy_detach(phy_dev);
1837
1838 return ret;
1839 }
1840 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect);
1841
1842 /**
1843 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink
1844 * instance.
1845 * @pl: a pointer to a &struct phylink returned from phylink_create()
1846 *
1847 * Disconnect any current PHY from the phylink instance described by @pl.
1848 */
phylink_disconnect_phy(struct phylink * pl)1849 void phylink_disconnect_phy(struct phylink *pl)
1850 {
1851 struct phy_device *phy;
1852
1853 ASSERT_RTNL();
1854
1855 phy = pl->phydev;
1856 if (phy) {
1857 mutex_lock(&phy->lock);
1858 mutex_lock(&pl->state_mutex);
1859 pl->phydev = NULL;
1860 mutex_unlock(&pl->state_mutex);
1861 mutex_unlock(&phy->lock);
1862 flush_work(&pl->resolve);
1863
1864 phy_disconnect(phy);
1865 }
1866 }
1867 EXPORT_SYMBOL_GPL(phylink_disconnect_phy);
1868
1869 /**
1870 * phylink_mac_change() - notify phylink of a change in MAC state
1871 * @pl: a pointer to a &struct phylink returned from phylink_create()
1872 * @up: indicates whether the link is currently up.
1873 *
1874 * The MAC driver should call this driver when the state of its link
1875 * changes (eg, link failure, new negotiation results, etc.)
1876 */
phylink_mac_change(struct phylink * pl,bool up)1877 void phylink_mac_change(struct phylink *pl, bool up)
1878 {
1879 if (!up)
1880 pl->mac_link_dropped = true;
1881 phylink_run_resolve(pl);
1882 phylink_dbg(pl, "mac link %s\n", up ? "up" : "down");
1883 }
1884 EXPORT_SYMBOL_GPL(phylink_mac_change);
1885
phylink_link_handler(int irq,void * data)1886 static irqreturn_t phylink_link_handler(int irq, void *data)
1887 {
1888 struct phylink *pl = data;
1889
1890 phylink_run_resolve(pl);
1891
1892 return IRQ_HANDLED;
1893 }
1894
1895 /**
1896 * phylink_start() - start a phylink instance
1897 * @pl: a pointer to a &struct phylink returned from phylink_create()
1898 *
1899 * Start the phylink instance specified by @pl, configuring the MAC for the
1900 * desired link mode(s) and negotiation style. This should be called from the
1901 * network device driver's &struct net_device_ops ndo_open() method.
1902 */
phylink_start(struct phylink * pl)1903 void phylink_start(struct phylink *pl)
1904 {
1905 bool poll = false;
1906
1907 ASSERT_RTNL();
1908
1909 phylink_info(pl, "configuring for %s/%s link mode\n",
1910 phylink_an_mode_str(pl->cur_link_an_mode),
1911 phy_modes(pl->link_config.interface));
1912
1913 /* Always set the carrier off */
1914 if (pl->netdev)
1915 netif_carrier_off(pl->netdev);
1916
1917 /* Apply the link configuration to the MAC when starting. This allows
1918 * a fixed-link to start with the correct parameters, and also
1919 * ensures that we set the appropriate advertisement for Serdes links.
1920 *
1921 * Restart autonegotiation if using 802.3z to ensure that the link
1922 * parameters are properly negotiated. This is necessary for DSA
1923 * switches using 802.3z negotiation to ensure they see our modes.
1924 */
1925 phylink_mac_initial_config(pl, true);
1926
1927 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED);
1928
1929 if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) {
1930 int irq = gpiod_to_irq(pl->link_gpio);
1931
1932 if (irq > 0) {
1933 if (!request_irq(irq, phylink_link_handler,
1934 IRQF_TRIGGER_RISING |
1935 IRQF_TRIGGER_FALLING,
1936 "netdev link", pl))
1937 pl->link_irq = irq;
1938 else
1939 irq = 0;
1940 }
1941 if (irq <= 0)
1942 poll = true;
1943 }
1944
1945 switch (pl->cfg_link_an_mode) {
1946 case MLO_AN_FIXED:
1947 poll |= pl->config->poll_fixed_state;
1948 break;
1949 case MLO_AN_INBAND:
1950 if (pl->pcs)
1951 poll |= pl->pcs->poll;
1952 break;
1953 }
1954 if (poll)
1955 mod_timer(&pl->link_poll, jiffies + HZ);
1956 if (pl->phydev)
1957 phy_start(pl->phydev);
1958 if (pl->sfp_bus)
1959 sfp_upstream_start(pl->sfp_bus);
1960 }
1961 EXPORT_SYMBOL_GPL(phylink_start);
1962
1963 /**
1964 * phylink_stop() - stop a phylink instance
1965 * @pl: a pointer to a &struct phylink returned from phylink_create()
1966 *
1967 * Stop the phylink instance specified by @pl. This should be called from the
1968 * network device driver's &struct net_device_ops ndo_stop() method. The
1969 * network device's carrier state should not be changed prior to calling this
1970 * function.
1971 *
1972 * This will synchronously bring down the link if the link is not already
1973 * down (in other words, it will trigger a mac_link_down() method call.)
1974 */
phylink_stop(struct phylink * pl)1975 void phylink_stop(struct phylink *pl)
1976 {
1977 ASSERT_RTNL();
1978
1979 if (pl->sfp_bus)
1980 sfp_upstream_stop(pl->sfp_bus);
1981 if (pl->phydev)
1982 phy_stop(pl->phydev);
1983 del_timer_sync(&pl->link_poll);
1984 if (pl->link_irq) {
1985 free_irq(pl->link_irq, pl);
1986 pl->link_irq = 0;
1987 }
1988
1989 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED);
1990 }
1991 EXPORT_SYMBOL_GPL(phylink_stop);
1992
1993 /**
1994 * phylink_suspend() - handle a network device suspend event
1995 * @pl: a pointer to a &struct phylink returned from phylink_create()
1996 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan
1997 *
1998 * Handle a network device suspend event. There are several cases:
1999 *
2000 * - If Wake-on-Lan is not active, we can bring down the link between
2001 * the MAC and PHY by calling phylink_stop().
2002 * - If Wake-on-Lan is active, and being handled only by the PHY, we
2003 * can also bring down the link between the MAC and PHY.
2004 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC
2005 * still needs to receive packets, so we can not bring the link down.
2006 */
phylink_suspend(struct phylink * pl,bool mac_wol)2007 void phylink_suspend(struct phylink *pl, bool mac_wol)
2008 {
2009 ASSERT_RTNL();
2010
2011 if (mac_wol && (!pl->netdev || pl->netdev->wol_enabled)) {
2012 /* Wake-on-Lan enabled, MAC handling */
2013 mutex_lock(&pl->state_mutex);
2014
2015 /* Stop the resolver bringing the link up */
2016 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state);
2017
2018 /* Disable the carrier, to prevent transmit timeouts,
2019 * but one would hope all packets have been sent. This
2020 * also means phylink_resolve() will do nothing.
2021 */
2022 if (pl->netdev)
2023 netif_carrier_off(pl->netdev);
2024 else
2025 pl->old_link_state = false;
2026
2027 /* We do not call mac_link_down() here as we want the
2028 * link to remain up to receive the WoL packets.
2029 */
2030 mutex_unlock(&pl->state_mutex);
2031 } else {
2032 phylink_stop(pl);
2033 }
2034 }
2035 EXPORT_SYMBOL_GPL(phylink_suspend);
2036
2037 /**
2038 * phylink_resume() - handle a network device resume event
2039 * @pl: a pointer to a &struct phylink returned from phylink_create()
2040 *
2041 * Undo the effects of phylink_suspend(), returning the link to an
2042 * operational state.
2043 */
phylink_resume(struct phylink * pl)2044 void phylink_resume(struct phylink *pl)
2045 {
2046 ASSERT_RTNL();
2047
2048 if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) {
2049 /* Wake-on-Lan enabled, MAC handling */
2050
2051 /* Call mac_link_down() so we keep the overall state balanced.
2052 * Do this under the state_mutex lock for consistency. This
2053 * will cause a "Link Down" message to be printed during
2054 * resume, which is harmless - the true link state will be
2055 * printed when we run a resolve.
2056 */
2057 mutex_lock(&pl->state_mutex);
2058 phylink_link_down(pl);
2059 mutex_unlock(&pl->state_mutex);
2060
2061 /* Re-apply the link parameters so that all the settings get
2062 * restored to the MAC.
2063 */
2064 phylink_mac_initial_config(pl, true);
2065
2066 /* Re-enable and re-resolve the link parameters */
2067 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL);
2068 } else {
2069 phylink_start(pl);
2070 }
2071 }
2072 EXPORT_SYMBOL_GPL(phylink_resume);
2073
2074 /**
2075 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY
2076 * @pl: a pointer to a &struct phylink returned from phylink_create()
2077 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters
2078 *
2079 * Read the wake on lan parameters from the PHY attached to the phylink
2080 * instance specified by @pl. If no PHY is currently attached, report no
2081 * support for wake on lan.
2082 */
phylink_ethtool_get_wol(struct phylink * pl,struct ethtool_wolinfo * wol)2083 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
2084 {
2085 ASSERT_RTNL();
2086
2087 wol->supported = 0;
2088 wol->wolopts = 0;
2089
2090 if (pl->phydev)
2091 phy_ethtool_get_wol(pl->phydev, wol);
2092 }
2093 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol);
2094
2095 /**
2096 * phylink_ethtool_set_wol() - set wake on lan parameters
2097 * @pl: a pointer to a &struct phylink returned from phylink_create()
2098 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters
2099 *
2100 * Set the wake on lan parameters for the PHY attached to the phylink
2101 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP
2102 * error.
2103 *
2104 * Returns zero on success or negative errno code.
2105 */
phylink_ethtool_set_wol(struct phylink * pl,struct ethtool_wolinfo * wol)2106 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
2107 {
2108 int ret = -EOPNOTSUPP;
2109
2110 ASSERT_RTNL();
2111
2112 if (pl->phydev)
2113 ret = phy_ethtool_set_wol(pl->phydev, wol);
2114
2115 return ret;
2116 }
2117 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol);
2118
phylink_merge_link_mode(unsigned long * dst,const unsigned long * b)2119 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b)
2120 {
2121 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask);
2122
2123 linkmode_zero(mask);
2124 phylink_set_port_modes(mask);
2125
2126 linkmode_and(dst, dst, mask);
2127 linkmode_or(dst, dst, b);
2128 }
2129
phylink_get_ksettings(const struct phylink_link_state * state,struct ethtool_link_ksettings * kset)2130 static void phylink_get_ksettings(const struct phylink_link_state *state,
2131 struct ethtool_link_ksettings *kset)
2132 {
2133 phylink_merge_link_mode(kset->link_modes.advertising, state->advertising);
2134 linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising);
2135 if (kset->base.rate_matching == RATE_MATCH_NONE) {
2136 kset->base.speed = state->speed;
2137 kset->base.duplex = state->duplex;
2138 }
2139 kset->base.autoneg = state->an_enabled ? AUTONEG_ENABLE :
2140 AUTONEG_DISABLE;
2141 }
2142
2143 /**
2144 * phylink_ethtool_ksettings_get() - get the current link settings
2145 * @pl: a pointer to a &struct phylink returned from phylink_create()
2146 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings
2147 *
2148 * Read the current link settings for the phylink instance specified by @pl.
2149 * This will be the link settings read from the MAC, PHY or fixed link
2150 * settings depending on the current negotiation mode.
2151 */
phylink_ethtool_ksettings_get(struct phylink * pl,struct ethtool_link_ksettings * kset)2152 int phylink_ethtool_ksettings_get(struct phylink *pl,
2153 struct ethtool_link_ksettings *kset)
2154 {
2155 struct phylink_link_state link_state;
2156
2157 ASSERT_RTNL();
2158
2159 if (pl->phydev)
2160 phy_ethtool_ksettings_get(pl->phydev, kset);
2161 else
2162 kset->base.port = pl->link_port;
2163
2164 linkmode_copy(kset->link_modes.supported, pl->supported);
2165
2166 switch (pl->cur_link_an_mode) {
2167 case MLO_AN_FIXED:
2168 /* We are using fixed settings. Report these as the
2169 * current link settings - and note that these also
2170 * represent the supported speeds/duplex/pause modes.
2171 */
2172 phylink_get_fixed_state(pl, &link_state);
2173 phylink_get_ksettings(&link_state, kset);
2174 break;
2175
2176 case MLO_AN_INBAND:
2177 /* If there is a phy attached, then use the reported
2178 * settings from the phy with no modification.
2179 */
2180 if (pl->phydev)
2181 break;
2182
2183 phylink_mac_pcs_get_state(pl, &link_state);
2184
2185 /* The MAC is reporting the link results from its own PCS
2186 * layer via in-band status. Report these as the current
2187 * link settings.
2188 */
2189 phylink_get_ksettings(&link_state, kset);
2190 break;
2191 }
2192
2193 return 0;
2194 }
2195 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get);
2196
2197 /**
2198 * phylink_ethtool_ksettings_set() - set the link settings
2199 * @pl: a pointer to a &struct phylink returned from phylink_create()
2200 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes
2201 */
phylink_ethtool_ksettings_set(struct phylink * pl,const struct ethtool_link_ksettings * kset)2202 int phylink_ethtool_ksettings_set(struct phylink *pl,
2203 const struct ethtool_link_ksettings *kset)
2204 {
2205 __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
2206 struct phylink_link_state config;
2207 const struct phy_setting *s;
2208
2209 ASSERT_RTNL();
2210
2211 if (pl->phydev) {
2212 /* We can rely on phylib for this update; we also do not need
2213 * to update the pl->link_config settings:
2214 * - the configuration returned via ksettings_get() will come
2215 * from phylib whenever a PHY is present.
2216 * - link_config.interface will be updated by the PHY calling
2217 * back via phylink_phy_change() and a subsequent resolve.
2218 * - initial link configuration for PHY mode comes from the
2219 * last phy state updated via phylink_phy_change().
2220 * - other configuration changes (e.g. pause modes) are
2221 * performed directly via phylib.
2222 * - if in in-band mode with a PHY, the link configuration
2223 * is passed on the link from the PHY, and all of
2224 * link_config.{speed,duplex,an_enabled,pause} are not used.
2225 * - the only possible use would be link_config.advertising
2226 * pause modes when in 1000base-X mode with a PHY, but in
2227 * the presence of a PHY, this should not be changed as that
2228 * should be determined from the media side advertisement.
2229 */
2230 return phy_ethtool_ksettings_set(pl->phydev, kset);
2231 }
2232
2233 config = pl->link_config;
2234
2235 /* Mask out unsupported advertisements */
2236 linkmode_and(config.advertising, kset->link_modes.advertising,
2237 pl->supported);
2238
2239 /* FIXME: should we reject autoneg if phy/mac does not support it? */
2240 switch (kset->base.autoneg) {
2241 case AUTONEG_DISABLE:
2242 /* Autonegotiation disabled, select a suitable speed and
2243 * duplex.
2244 */
2245 s = phy_lookup_setting(kset->base.speed, kset->base.duplex,
2246 pl->supported, false);
2247 if (!s)
2248 return -EINVAL;
2249
2250 /* If we have a fixed link, refuse to change link parameters.
2251 * If the link parameters match, accept them but do nothing.
2252 */
2253 if (pl->cur_link_an_mode == MLO_AN_FIXED) {
2254 if (s->speed != pl->link_config.speed ||
2255 s->duplex != pl->link_config.duplex)
2256 return -EINVAL;
2257 return 0;
2258 }
2259
2260 config.speed = s->speed;
2261 config.duplex = s->duplex;
2262 break;
2263
2264 case AUTONEG_ENABLE:
2265 /* If we have a fixed link, allow autonegotiation (since that
2266 * is our default case) but do not allow the advertisement to
2267 * be changed. If the advertisement matches, simply return.
2268 */
2269 if (pl->cur_link_an_mode == MLO_AN_FIXED) {
2270 if (!linkmode_equal(config.advertising,
2271 pl->link_config.advertising))
2272 return -EINVAL;
2273 return 0;
2274 }
2275
2276 config.speed = SPEED_UNKNOWN;
2277 config.duplex = DUPLEX_UNKNOWN;
2278 break;
2279
2280 default:
2281 return -EINVAL;
2282 }
2283
2284 /* We have ruled out the case with a PHY attached, and the
2285 * fixed-link cases. All that is left are in-band links.
2286 */
2287 config.an_enabled = kset->base.autoneg == AUTONEG_ENABLE;
2288 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising,
2289 config.an_enabled);
2290
2291 /* If this link is with an SFP, ensure that changes to advertised modes
2292 * also cause the associated interface to be selected such that the
2293 * link can be configured correctly.
2294 */
2295 if (pl->sfp_bus) {
2296 config.interface = sfp_select_interface(pl->sfp_bus,
2297 config.advertising);
2298 if (config.interface == PHY_INTERFACE_MODE_NA) {
2299 phylink_err(pl,
2300 "selection of interface failed, advertisement %*pb\n",
2301 __ETHTOOL_LINK_MODE_MASK_NBITS,
2302 config.advertising);
2303 return -EINVAL;
2304 }
2305
2306 /* Revalidate with the selected interface */
2307 linkmode_copy(support, pl->supported);
2308 if (phylink_validate(pl, support, &config)) {
2309 phylink_err(pl, "validation of %s/%s with support %*pb failed\n",
2310 phylink_an_mode_str(pl->cur_link_an_mode),
2311 phy_modes(config.interface),
2312 __ETHTOOL_LINK_MODE_MASK_NBITS, support);
2313 return -EINVAL;
2314 }
2315 } else {
2316 /* Validate without changing the current supported mask. */
2317 linkmode_copy(support, pl->supported);
2318 if (phylink_validate(pl, support, &config))
2319 return -EINVAL;
2320 }
2321
2322 /* If autonegotiation is enabled, we must have an advertisement */
2323 if (config.an_enabled && phylink_is_empty_linkmode(config.advertising))
2324 return -EINVAL;
2325
2326 mutex_lock(&pl->state_mutex);
2327 pl->link_config.speed = config.speed;
2328 pl->link_config.duplex = config.duplex;
2329 pl->link_config.an_enabled = config.an_enabled;
2330
2331 if (pl->link_config.interface != config.interface) {
2332 /* The interface changed, e.g. 1000base-X <-> 2500base-X */
2333 /* We need to force the link down, then change the interface */
2334 if (pl->old_link_state) {
2335 phylink_link_down(pl);
2336 pl->old_link_state = false;
2337 }
2338 if (!test_bit(PHYLINK_DISABLE_STOPPED,
2339 &pl->phylink_disable_state))
2340 phylink_major_config(pl, false, &config);
2341 pl->link_config.interface = config.interface;
2342 linkmode_copy(pl->link_config.advertising, config.advertising);
2343 } else if (!linkmode_equal(pl->link_config.advertising,
2344 config.advertising)) {
2345 linkmode_copy(pl->link_config.advertising, config.advertising);
2346 phylink_change_inband_advert(pl);
2347 }
2348 mutex_unlock(&pl->state_mutex);
2349
2350 return 0;
2351 }
2352 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set);
2353
2354 /**
2355 * phylink_ethtool_nway_reset() - restart negotiation
2356 * @pl: a pointer to a &struct phylink returned from phylink_create()
2357 *
2358 * Restart negotiation for the phylink instance specified by @pl. This will
2359 * cause any attached phy to restart negotiation with the link partner, and
2360 * if the MAC is in a BaseX mode, the MAC will also be requested to restart
2361 * negotiation.
2362 *
2363 * Returns zero on success, or negative error code.
2364 */
phylink_ethtool_nway_reset(struct phylink * pl)2365 int phylink_ethtool_nway_reset(struct phylink *pl)
2366 {
2367 int ret = 0;
2368
2369 ASSERT_RTNL();
2370
2371 if (pl->phydev)
2372 ret = phy_restart_aneg(pl->phydev);
2373 phylink_mac_pcs_an_restart(pl);
2374
2375 return ret;
2376 }
2377 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset);
2378
2379 /**
2380 * phylink_ethtool_get_pauseparam() - get the current pause parameters
2381 * @pl: a pointer to a &struct phylink returned from phylink_create()
2382 * @pause: a pointer to a &struct ethtool_pauseparam
2383 */
phylink_ethtool_get_pauseparam(struct phylink * pl,struct ethtool_pauseparam * pause)2384 void phylink_ethtool_get_pauseparam(struct phylink *pl,
2385 struct ethtool_pauseparam *pause)
2386 {
2387 ASSERT_RTNL();
2388
2389 pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN);
2390 pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX);
2391 pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX);
2392 }
2393 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam);
2394
2395 /**
2396 * phylink_ethtool_set_pauseparam() - set the current pause parameters
2397 * @pl: a pointer to a &struct phylink returned from phylink_create()
2398 * @pause: a pointer to a &struct ethtool_pauseparam
2399 */
phylink_ethtool_set_pauseparam(struct phylink * pl,struct ethtool_pauseparam * pause)2400 int phylink_ethtool_set_pauseparam(struct phylink *pl,
2401 struct ethtool_pauseparam *pause)
2402 {
2403 struct phylink_link_state *config = &pl->link_config;
2404 bool manual_changed;
2405 int pause_state;
2406
2407 ASSERT_RTNL();
2408
2409 if (pl->cur_link_an_mode == MLO_AN_FIXED)
2410 return -EOPNOTSUPP;
2411
2412 if (!phylink_test(pl->supported, Pause) &&
2413 !phylink_test(pl->supported, Asym_Pause))
2414 return -EOPNOTSUPP;
2415
2416 if (!phylink_test(pl->supported, Asym_Pause) &&
2417 pause->rx_pause != pause->tx_pause)
2418 return -EINVAL;
2419
2420 pause_state = 0;
2421 if (pause->autoneg)
2422 pause_state |= MLO_PAUSE_AN;
2423 if (pause->rx_pause)
2424 pause_state |= MLO_PAUSE_RX;
2425 if (pause->tx_pause)
2426 pause_state |= MLO_PAUSE_TX;
2427
2428 mutex_lock(&pl->state_mutex);
2429 /*
2430 * See the comments for linkmode_set_pause(), wrt the deficiencies
2431 * with the current implementation. A solution to this issue would
2432 * be:
2433 * ethtool Local device
2434 * rx tx Pause AsymDir
2435 * 0 0 0 0
2436 * 1 0 1 1
2437 * 0 1 0 1
2438 * 1 1 1 1
2439 * and then use the ethtool rx/tx enablement status to mask the
2440 * rx/tx pause resolution.
2441 */
2442 linkmode_set_pause(config->advertising, pause->tx_pause,
2443 pause->rx_pause);
2444
2445 manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN ||
2446 (!(pause_state & MLO_PAUSE_AN) &&
2447 (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK);
2448
2449 config->pause = pause_state;
2450
2451 /* Update our in-band advertisement, triggering a renegotiation if
2452 * the advertisement changed.
2453 */
2454 if (!pl->phydev)
2455 phylink_change_inband_advert(pl);
2456
2457 mutex_unlock(&pl->state_mutex);
2458
2459 /* If we have a PHY, a change of the pause frame advertisement will
2460 * cause phylib to renegotiate (if AN is enabled) which will in turn
2461 * call our phylink_phy_change() and trigger a resolve. Note that
2462 * we can't hold our state mutex while calling phy_set_asym_pause().
2463 */
2464 if (pl->phydev)
2465 phy_set_asym_pause(pl->phydev, pause->rx_pause,
2466 pause->tx_pause);
2467
2468 /* If the manual pause settings changed, make sure we trigger a
2469 * resolve to update their state; we can not guarantee that the
2470 * link will cycle.
2471 */
2472 if (manual_changed) {
2473 pl->mac_link_dropped = true;
2474 phylink_run_resolve(pl);
2475 }
2476
2477 return 0;
2478 }
2479 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam);
2480
2481 /**
2482 * phylink_get_eee_err() - read the energy efficient ethernet error
2483 * counter
2484 * @pl: a pointer to a &struct phylink returned from phylink_create().
2485 *
2486 * Read the Energy Efficient Ethernet error counter from the PHY associated
2487 * with the phylink instance specified by @pl.
2488 *
2489 * Returns positive error counter value, or negative error code.
2490 */
phylink_get_eee_err(struct phylink * pl)2491 int phylink_get_eee_err(struct phylink *pl)
2492 {
2493 int ret = 0;
2494
2495 ASSERT_RTNL();
2496
2497 if (pl->phydev)
2498 ret = phy_get_eee_err(pl->phydev);
2499
2500 return ret;
2501 }
2502 EXPORT_SYMBOL_GPL(phylink_get_eee_err);
2503
2504 /**
2505 * phylink_init_eee() - init and check the EEE features
2506 * @pl: a pointer to a &struct phylink returned from phylink_create()
2507 * @clk_stop_enable: allow PHY to stop receive clock
2508 *
2509 * Must be called either with RTNL held or within mac_link_up()
2510 */
phylink_init_eee(struct phylink * pl,bool clk_stop_enable)2511 int phylink_init_eee(struct phylink *pl, bool clk_stop_enable)
2512 {
2513 int ret = -EOPNOTSUPP;
2514
2515 if (pl->phydev)
2516 ret = phy_init_eee(pl->phydev, clk_stop_enable);
2517
2518 return ret;
2519 }
2520 EXPORT_SYMBOL_GPL(phylink_init_eee);
2521
2522 /**
2523 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters
2524 * @pl: a pointer to a &struct phylink returned from phylink_create()
2525 * @eee: a pointer to a &struct ethtool_eee for the read parameters
2526 */
phylink_ethtool_get_eee(struct phylink * pl,struct ethtool_eee * eee)2527 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_eee *eee)
2528 {
2529 int ret = -EOPNOTSUPP;
2530
2531 ASSERT_RTNL();
2532
2533 if (pl->phydev)
2534 ret = phy_ethtool_get_eee(pl->phydev, eee);
2535
2536 return ret;
2537 }
2538 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee);
2539
2540 /**
2541 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters
2542 * @pl: a pointer to a &struct phylink returned from phylink_create()
2543 * @eee: a pointer to a &struct ethtool_eee for the desired parameters
2544 */
phylink_ethtool_set_eee(struct phylink * pl,struct ethtool_eee * eee)2545 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_eee *eee)
2546 {
2547 int ret = -EOPNOTSUPP;
2548
2549 ASSERT_RTNL();
2550
2551 if (pl->phydev)
2552 ret = phy_ethtool_set_eee(pl->phydev, eee);
2553
2554 return ret;
2555 }
2556 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee);
2557
2558 /* This emulates MII registers for a fixed-mode phy operating as per the
2559 * passed in state. "aneg" defines if we report negotiation is possible.
2560 *
2561 * FIXME: should deal with negotiation state too.
2562 */
phylink_mii_emul_read(unsigned int reg,struct phylink_link_state * state)2563 static int phylink_mii_emul_read(unsigned int reg,
2564 struct phylink_link_state *state)
2565 {
2566 struct fixed_phy_status fs;
2567 unsigned long *lpa = state->lp_advertising;
2568 int val;
2569
2570 fs.link = state->link;
2571 fs.speed = state->speed;
2572 fs.duplex = state->duplex;
2573 fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa);
2574 fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa);
2575
2576 val = swphy_read_reg(reg, &fs);
2577 if (reg == MII_BMSR) {
2578 if (!state->an_complete)
2579 val &= ~BMSR_ANEGCOMPLETE;
2580 }
2581 return val;
2582 }
2583
phylink_phy_read(struct phylink * pl,unsigned int phy_id,unsigned int reg)2584 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id,
2585 unsigned int reg)
2586 {
2587 struct phy_device *phydev = pl->phydev;
2588 int prtad, devad;
2589
2590 if (mdio_phy_id_is_c45(phy_id)) {
2591 prtad = mdio_phy_id_prtad(phy_id);
2592 devad = mdio_phy_id_devad(phy_id);
2593 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad,
2594 reg);
2595 }
2596
2597 if (phydev->is_c45) {
2598 switch (reg) {
2599 case MII_BMCR:
2600 case MII_BMSR:
2601 case MII_PHYSID1:
2602 case MII_PHYSID2:
2603 devad = __ffs(phydev->c45_ids.mmds_present);
2604 break;
2605 case MII_ADVERTISE:
2606 case MII_LPA:
2607 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
2608 return -EINVAL;
2609 devad = MDIO_MMD_AN;
2610 if (reg == MII_ADVERTISE)
2611 reg = MDIO_AN_ADVERTISE;
2612 else
2613 reg = MDIO_AN_LPA;
2614 break;
2615 default:
2616 return -EINVAL;
2617 }
2618 prtad = phy_id;
2619 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad,
2620 reg);
2621 }
2622
2623 return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg);
2624 }
2625
phylink_phy_write(struct phylink * pl,unsigned int phy_id,unsigned int reg,unsigned int val)2626 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id,
2627 unsigned int reg, unsigned int val)
2628 {
2629 struct phy_device *phydev = pl->phydev;
2630 int prtad, devad;
2631
2632 if (mdio_phy_id_is_c45(phy_id)) {
2633 prtad = mdio_phy_id_prtad(phy_id);
2634 devad = mdio_phy_id_devad(phy_id);
2635 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad,
2636 reg, val);
2637 }
2638
2639 if (phydev->is_c45) {
2640 switch (reg) {
2641 case MII_BMCR:
2642 case MII_BMSR:
2643 case MII_PHYSID1:
2644 case MII_PHYSID2:
2645 devad = __ffs(phydev->c45_ids.mmds_present);
2646 break;
2647 case MII_ADVERTISE:
2648 case MII_LPA:
2649 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
2650 return -EINVAL;
2651 devad = MDIO_MMD_AN;
2652 if (reg == MII_ADVERTISE)
2653 reg = MDIO_AN_ADVERTISE;
2654 else
2655 reg = MDIO_AN_LPA;
2656 break;
2657 default:
2658 return -EINVAL;
2659 }
2660 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad,
2661 reg, val);
2662 }
2663
2664 return mdiobus_write(phydev->mdio.bus, phy_id, reg, val);
2665 }
2666
phylink_mii_read(struct phylink * pl,unsigned int phy_id,unsigned int reg)2667 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id,
2668 unsigned int reg)
2669 {
2670 struct phylink_link_state state;
2671 int val = 0xffff;
2672
2673 switch (pl->cur_link_an_mode) {
2674 case MLO_AN_FIXED:
2675 if (phy_id == 0) {
2676 phylink_get_fixed_state(pl, &state);
2677 val = phylink_mii_emul_read(reg, &state);
2678 }
2679 break;
2680
2681 case MLO_AN_PHY:
2682 return -EOPNOTSUPP;
2683
2684 case MLO_AN_INBAND:
2685 if (phy_id == 0) {
2686 phylink_mac_pcs_get_state(pl, &state);
2687 val = phylink_mii_emul_read(reg, &state);
2688 }
2689 break;
2690 }
2691
2692 return val & 0xffff;
2693 }
2694
phylink_mii_write(struct phylink * pl,unsigned int phy_id,unsigned int reg,unsigned int val)2695 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id,
2696 unsigned int reg, unsigned int val)
2697 {
2698 switch (pl->cur_link_an_mode) {
2699 case MLO_AN_FIXED:
2700 break;
2701
2702 case MLO_AN_PHY:
2703 return -EOPNOTSUPP;
2704
2705 case MLO_AN_INBAND:
2706 break;
2707 }
2708
2709 return 0;
2710 }
2711
2712 /**
2713 * phylink_mii_ioctl() - generic mii ioctl interface
2714 * @pl: a pointer to a &struct phylink returned from phylink_create()
2715 * @ifr: a pointer to a &struct ifreq for socket ioctls
2716 * @cmd: ioctl cmd to execute
2717 *
2718 * Perform the specified MII ioctl on the PHY attached to the phylink instance
2719 * specified by @pl. If no PHY is attached, emulate the presence of the PHY.
2720 *
2721 * Returns: zero on success or negative error code.
2722 *
2723 * %SIOCGMIIPHY:
2724 * read register from the current PHY.
2725 * %SIOCGMIIREG:
2726 * read register from the specified PHY.
2727 * %SIOCSMIIREG:
2728 * set a register on the specified PHY.
2729 */
phylink_mii_ioctl(struct phylink * pl,struct ifreq * ifr,int cmd)2730 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd)
2731 {
2732 struct mii_ioctl_data *mii = if_mii(ifr);
2733 int ret;
2734
2735 ASSERT_RTNL();
2736
2737 if (pl->phydev) {
2738 /* PHYs only exist for MLO_AN_PHY and SGMII */
2739 switch (cmd) {
2740 case SIOCGMIIPHY:
2741 mii->phy_id = pl->phydev->mdio.addr;
2742 fallthrough;
2743
2744 case SIOCGMIIREG:
2745 ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num);
2746 if (ret >= 0) {
2747 mii->val_out = ret;
2748 ret = 0;
2749 }
2750 break;
2751
2752 case SIOCSMIIREG:
2753 ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num,
2754 mii->val_in);
2755 break;
2756
2757 default:
2758 ret = phy_mii_ioctl(pl->phydev, ifr, cmd);
2759 break;
2760 }
2761 } else {
2762 switch (cmd) {
2763 case SIOCGMIIPHY:
2764 mii->phy_id = 0;
2765 fallthrough;
2766
2767 case SIOCGMIIREG:
2768 ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num);
2769 if (ret >= 0) {
2770 mii->val_out = ret;
2771 ret = 0;
2772 }
2773 break;
2774
2775 case SIOCSMIIREG:
2776 ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num,
2777 mii->val_in);
2778 break;
2779
2780 default:
2781 ret = -EOPNOTSUPP;
2782 break;
2783 }
2784 }
2785
2786 return ret;
2787 }
2788 EXPORT_SYMBOL_GPL(phylink_mii_ioctl);
2789
2790 /**
2791 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both
2792 * link partners
2793 * @pl: a pointer to a &struct phylink returned from phylink_create()
2794 * @sync: perform action synchronously
2795 *
2796 * If we have a PHY that is not part of a SFP module, then set the speed
2797 * as described in the phy_speed_down() function. Please see this function
2798 * for a description of the @sync parameter.
2799 *
2800 * Returns zero if there is no PHY, otherwise as per phy_speed_down().
2801 */
phylink_speed_down(struct phylink * pl,bool sync)2802 int phylink_speed_down(struct phylink *pl, bool sync)
2803 {
2804 int ret = 0;
2805
2806 ASSERT_RTNL();
2807
2808 if (!pl->sfp_bus && pl->phydev)
2809 ret = phy_speed_down(pl->phydev, sync);
2810
2811 return ret;
2812 }
2813 EXPORT_SYMBOL_GPL(phylink_speed_down);
2814
2815 /**
2816 * phylink_speed_up() - restore the advertised speeds prior to the call to
2817 * phylink_speed_down()
2818 * @pl: a pointer to a &struct phylink returned from phylink_create()
2819 *
2820 * If we have a PHY that is not part of a SFP module, then restore the
2821 * PHY speeds as per phy_speed_up().
2822 *
2823 * Returns zero if there is no PHY, otherwise as per phy_speed_up().
2824 */
phylink_speed_up(struct phylink * pl)2825 int phylink_speed_up(struct phylink *pl)
2826 {
2827 int ret = 0;
2828
2829 ASSERT_RTNL();
2830
2831 if (!pl->sfp_bus && pl->phydev)
2832 ret = phy_speed_up(pl->phydev);
2833
2834 return ret;
2835 }
2836 EXPORT_SYMBOL_GPL(phylink_speed_up);
2837
phylink_sfp_attach(void * upstream,struct sfp_bus * bus)2838 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus)
2839 {
2840 struct phylink *pl = upstream;
2841
2842 pl->netdev->sfp_bus = bus;
2843 }
2844
phylink_sfp_detach(void * upstream,struct sfp_bus * bus)2845 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus)
2846 {
2847 struct phylink *pl = upstream;
2848
2849 pl->netdev->sfp_bus = NULL;
2850 }
2851
2852 static const phy_interface_t phylink_sfp_interface_preference[] = {
2853 PHY_INTERFACE_MODE_25GBASER,
2854 PHY_INTERFACE_MODE_USXGMII,
2855 PHY_INTERFACE_MODE_10GBASER,
2856 PHY_INTERFACE_MODE_5GBASER,
2857 PHY_INTERFACE_MODE_2500BASEX,
2858 PHY_INTERFACE_MODE_SGMII,
2859 PHY_INTERFACE_MODE_1000BASEX,
2860 PHY_INTERFACE_MODE_100BASEX,
2861 };
2862
2863 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces);
2864
phylink_choose_sfp_interface(struct phylink * pl,const unsigned long * intf)2865 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl,
2866 const unsigned long *intf)
2867 {
2868 phy_interface_t interface;
2869 size_t i;
2870
2871 interface = PHY_INTERFACE_MODE_NA;
2872 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++)
2873 if (test_bit(phylink_sfp_interface_preference[i], intf)) {
2874 interface = phylink_sfp_interface_preference[i];
2875 break;
2876 }
2877
2878 return interface;
2879 }
2880
phylink_sfp_set_config(struct phylink * pl,u8 mode,unsigned long * supported,struct phylink_link_state * state)2881 static void phylink_sfp_set_config(struct phylink *pl, u8 mode,
2882 unsigned long *supported,
2883 struct phylink_link_state *state)
2884 {
2885 bool changed = false;
2886
2887 phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n",
2888 phylink_an_mode_str(mode), phy_modes(state->interface),
2889 __ETHTOOL_LINK_MODE_MASK_NBITS, supported);
2890
2891 if (!linkmode_equal(pl->supported, supported)) {
2892 linkmode_copy(pl->supported, supported);
2893 changed = true;
2894 }
2895
2896 if (!linkmode_equal(pl->link_config.advertising, state->advertising)) {
2897 linkmode_copy(pl->link_config.advertising, state->advertising);
2898 changed = true;
2899 }
2900
2901 if (pl->cur_link_an_mode != mode ||
2902 pl->link_config.interface != state->interface) {
2903 pl->cur_link_an_mode = mode;
2904 pl->link_config.interface = state->interface;
2905
2906 changed = true;
2907
2908 phylink_info(pl, "switched to %s/%s link mode\n",
2909 phylink_an_mode_str(mode),
2910 phy_modes(state->interface));
2911 }
2912
2913 if (changed && !test_bit(PHYLINK_DISABLE_STOPPED,
2914 &pl->phylink_disable_state))
2915 phylink_mac_initial_config(pl, false);
2916 }
2917
phylink_sfp_config_phy(struct phylink * pl,u8 mode,struct phy_device * phy)2918 static int phylink_sfp_config_phy(struct phylink *pl, u8 mode,
2919 struct phy_device *phy)
2920 {
2921 __ETHTOOL_DECLARE_LINK_MODE_MASK(support1);
2922 __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
2923 struct phylink_link_state config;
2924 phy_interface_t iface;
2925 int ret;
2926
2927 linkmode_copy(support, phy->supported);
2928
2929 memset(&config, 0, sizeof(config));
2930 linkmode_copy(config.advertising, phy->advertising);
2931 config.interface = PHY_INTERFACE_MODE_NA;
2932 config.speed = SPEED_UNKNOWN;
2933 config.duplex = DUPLEX_UNKNOWN;
2934 config.pause = MLO_PAUSE_AN;
2935 config.an_enabled = pl->link_config.an_enabled;
2936
2937 /* Ignore errors if we're expecting a PHY to attach later */
2938 ret = phylink_validate(pl, support, &config);
2939 if (ret) {
2940 phylink_err(pl, "validation with support %*pb failed: %pe\n",
2941 __ETHTOOL_LINK_MODE_MASK_NBITS, support,
2942 ERR_PTR(ret));
2943 return ret;
2944 }
2945
2946 iface = sfp_select_interface(pl->sfp_bus, config.advertising);
2947 if (iface == PHY_INTERFACE_MODE_NA) {
2948 phylink_err(pl,
2949 "selection of interface failed, advertisement %*pb\n",
2950 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising);
2951 return -EINVAL;
2952 }
2953
2954 config.interface = iface;
2955 linkmode_copy(support1, support);
2956 ret = phylink_validate(pl, support1, &config);
2957 if (ret) {
2958 phylink_err(pl,
2959 "validation of %s/%s with support %*pb failed: %pe\n",
2960 phylink_an_mode_str(mode),
2961 phy_modes(config.interface),
2962 __ETHTOOL_LINK_MODE_MASK_NBITS, support,
2963 ERR_PTR(ret));
2964 return ret;
2965 }
2966
2967 pl->link_port = pl->sfp_port;
2968
2969 phylink_sfp_set_config(pl, mode, support, &config);
2970
2971 return 0;
2972 }
2973
phylink_sfp_config_optical(struct phylink * pl)2974 static int phylink_sfp_config_optical(struct phylink *pl)
2975 {
2976 __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
2977 DECLARE_PHY_INTERFACE_MASK(interfaces);
2978 struct phylink_link_state config;
2979 phy_interface_t interface;
2980 int ret;
2981
2982 phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n",
2983 (int)PHY_INTERFACE_MODE_MAX,
2984 pl->config->supported_interfaces,
2985 (int)PHY_INTERFACE_MODE_MAX,
2986 pl->sfp_interfaces);
2987
2988 /* Find the union of the supported interfaces by the PCS/MAC and
2989 * the SFP module.
2990 */
2991 phy_interface_and(interfaces, pl->config->supported_interfaces,
2992 pl->sfp_interfaces);
2993 if (phy_interface_empty(interfaces)) {
2994 phylink_err(pl, "unsupported SFP module: no common interface modes\n");
2995 return -EINVAL;
2996 }
2997
2998 memset(&config, 0, sizeof(config));
2999 linkmode_copy(support, pl->sfp_support);
3000 linkmode_copy(config.advertising, pl->sfp_support);
3001 config.speed = SPEED_UNKNOWN;
3002 config.duplex = DUPLEX_UNKNOWN;
3003 config.pause = MLO_PAUSE_AN;
3004 config.an_enabled = true;
3005
3006 /* For all the interfaces that are supported, reduce the sfp_support
3007 * mask to only those link modes that can be supported.
3008 */
3009 ret = phylink_validate_mask(pl, pl->sfp_support, &config, interfaces);
3010 if (ret) {
3011 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n",
3012 __ETHTOOL_LINK_MODE_MASK_NBITS, support);
3013 return ret;
3014 }
3015
3016 interface = phylink_choose_sfp_interface(pl, interfaces);
3017 if (interface == PHY_INTERFACE_MODE_NA) {
3018 phylink_err(pl, "failed to select SFP interface\n");
3019 return -EINVAL;
3020 }
3021
3022 phylink_dbg(pl, "optical SFP: chosen %s interface\n",
3023 phy_modes(interface));
3024
3025 config.interface = interface;
3026
3027 /* Ignore errors if we're expecting a PHY to attach later */
3028 ret = phylink_validate(pl, support, &config);
3029 if (ret) {
3030 phylink_err(pl, "validation with support %*pb failed: %pe\n",
3031 __ETHTOOL_LINK_MODE_MASK_NBITS, support,
3032 ERR_PTR(ret));
3033 return ret;
3034 }
3035
3036 pl->link_port = pl->sfp_port;
3037
3038 phylink_sfp_set_config(pl, MLO_AN_INBAND, pl->sfp_support, &config);
3039
3040 return 0;
3041 }
3042
phylink_sfp_module_insert(void * upstream,const struct sfp_eeprom_id * id)3043 static int phylink_sfp_module_insert(void *upstream,
3044 const struct sfp_eeprom_id *id)
3045 {
3046 struct phylink *pl = upstream;
3047
3048 ASSERT_RTNL();
3049
3050 linkmode_zero(pl->sfp_support);
3051 phy_interface_zero(pl->sfp_interfaces);
3052 sfp_parse_support(pl->sfp_bus, id, pl->sfp_support, pl->sfp_interfaces);
3053 pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, pl->sfp_support);
3054
3055 /* If this module may have a PHY connecting later, defer until later */
3056 pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id);
3057 if (pl->sfp_may_have_phy)
3058 return 0;
3059
3060 return phylink_sfp_config_optical(pl);
3061 }
3062
phylink_sfp_module_start(void * upstream)3063 static int phylink_sfp_module_start(void *upstream)
3064 {
3065 struct phylink *pl = upstream;
3066
3067 /* If this SFP module has a PHY, start the PHY now. */
3068 if (pl->phydev) {
3069 phy_start(pl->phydev);
3070 return 0;
3071 }
3072
3073 /* If the module may have a PHY but we didn't detect one we
3074 * need to configure the MAC here.
3075 */
3076 if (!pl->sfp_may_have_phy)
3077 return 0;
3078
3079 return phylink_sfp_config_optical(pl);
3080 }
3081
phylink_sfp_module_stop(void * upstream)3082 static void phylink_sfp_module_stop(void *upstream)
3083 {
3084 struct phylink *pl = upstream;
3085
3086 /* If this SFP module has a PHY, stop it. */
3087 if (pl->phydev)
3088 phy_stop(pl->phydev);
3089 }
3090
phylink_sfp_link_down(void * upstream)3091 static void phylink_sfp_link_down(void *upstream)
3092 {
3093 struct phylink *pl = upstream;
3094
3095 ASSERT_RTNL();
3096
3097 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK);
3098 }
3099
phylink_sfp_link_up(void * upstream)3100 static void phylink_sfp_link_up(void *upstream)
3101 {
3102 struct phylink *pl = upstream;
3103
3104 ASSERT_RTNL();
3105
3106 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK);
3107 }
3108
3109 /* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII
3110 * or 802.3z control word, so inband will not work.
3111 */
phylink_phy_no_inband(struct phy_device * phy)3112 static bool phylink_phy_no_inband(struct phy_device *phy)
3113 {
3114 return phy->is_c45 &&
3115 (phy->c45_ids.device_ids[1] & 0xfffffff0) == 0xae025150;
3116 }
3117
phylink_sfp_connect_phy(void * upstream,struct phy_device * phy)3118 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy)
3119 {
3120 struct phylink *pl = upstream;
3121 phy_interface_t interface;
3122 u8 mode;
3123 int ret;
3124
3125 /*
3126 * This is the new way of dealing with flow control for PHYs,
3127 * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
3128 * phy drivers should not set SUPPORTED_[Asym_]Pause") except
3129 * using our validate call to the MAC, we rely upon the MAC
3130 * clearing the bits from both supported and advertising fields.
3131 */
3132 phy_support_asym_pause(phy);
3133
3134 if (phylink_phy_no_inband(phy))
3135 mode = MLO_AN_PHY;
3136 else
3137 mode = MLO_AN_INBAND;
3138
3139 /* Set the PHY's host supported interfaces */
3140 phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces,
3141 pl->config->supported_interfaces);
3142
3143 /* Do the initial configuration */
3144 ret = phylink_sfp_config_phy(pl, mode, phy);
3145 if (ret < 0)
3146 return ret;
3147
3148 interface = pl->link_config.interface;
3149 ret = phylink_attach_phy(pl, phy, interface);
3150 if (ret < 0)
3151 return ret;
3152
3153 ret = phylink_bringup_phy(pl, phy, interface);
3154 if (ret)
3155 phy_detach(phy);
3156
3157 return ret;
3158 }
3159
phylink_sfp_disconnect_phy(void * upstream)3160 static void phylink_sfp_disconnect_phy(void *upstream)
3161 {
3162 phylink_disconnect_phy(upstream);
3163 }
3164
3165 static const struct sfp_upstream_ops sfp_phylink_ops = {
3166 .attach = phylink_sfp_attach,
3167 .detach = phylink_sfp_detach,
3168 .module_insert = phylink_sfp_module_insert,
3169 .module_start = phylink_sfp_module_start,
3170 .module_stop = phylink_sfp_module_stop,
3171 .link_up = phylink_sfp_link_up,
3172 .link_down = phylink_sfp_link_down,
3173 .connect_phy = phylink_sfp_connect_phy,
3174 .disconnect_phy = phylink_sfp_disconnect_phy,
3175 };
3176
3177 /* Helpers for MAC drivers */
3178
phylink_decode_c37_word(struct phylink_link_state * state,uint16_t config_reg,int speed)3179 static void phylink_decode_c37_word(struct phylink_link_state *state,
3180 uint16_t config_reg, int speed)
3181 {
3182 bool tx_pause, rx_pause;
3183 int fd_bit;
3184
3185 if (speed == SPEED_2500)
3186 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT;
3187 else
3188 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT;
3189
3190 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit);
3191
3192 if (linkmode_test_bit(fd_bit, state->advertising) &&
3193 linkmode_test_bit(fd_bit, state->lp_advertising)) {
3194 state->speed = speed;
3195 state->duplex = DUPLEX_FULL;
3196 } else {
3197 /* negotiation failure */
3198 state->link = false;
3199 }
3200
3201 linkmode_resolve_pause(state->advertising, state->lp_advertising,
3202 &tx_pause, &rx_pause);
3203
3204 if (tx_pause)
3205 state->pause |= MLO_PAUSE_TX;
3206 if (rx_pause)
3207 state->pause |= MLO_PAUSE_RX;
3208 }
3209
phylink_decode_sgmii_word(struct phylink_link_state * state,uint16_t config_reg)3210 static void phylink_decode_sgmii_word(struct phylink_link_state *state,
3211 uint16_t config_reg)
3212 {
3213 if (!(config_reg & LPA_SGMII_LINK)) {
3214 state->link = false;
3215 return;
3216 }
3217
3218 switch (config_reg & LPA_SGMII_SPD_MASK) {
3219 case LPA_SGMII_10:
3220 state->speed = SPEED_10;
3221 break;
3222 case LPA_SGMII_100:
3223 state->speed = SPEED_100;
3224 break;
3225 case LPA_SGMII_1000:
3226 state->speed = SPEED_1000;
3227 break;
3228 default:
3229 state->link = false;
3230 return;
3231 }
3232 if (config_reg & LPA_SGMII_FULL_DUPLEX)
3233 state->duplex = DUPLEX_FULL;
3234 else
3235 state->duplex = DUPLEX_HALF;
3236 }
3237
3238 /**
3239 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS
3240 * @state: a pointer to a struct phylink_link_state.
3241 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word
3242 *
3243 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation
3244 * code word. Decode the USXGMII code word and populate the corresponding fields
3245 * (speed, duplex) into the phylink_link_state structure.
3246 */
phylink_decode_usxgmii_word(struct phylink_link_state * state,uint16_t lpa)3247 void phylink_decode_usxgmii_word(struct phylink_link_state *state,
3248 uint16_t lpa)
3249 {
3250 switch (lpa & MDIO_USXGMII_SPD_MASK) {
3251 case MDIO_USXGMII_10:
3252 state->speed = SPEED_10;
3253 break;
3254 case MDIO_USXGMII_100:
3255 state->speed = SPEED_100;
3256 break;
3257 case MDIO_USXGMII_1000:
3258 state->speed = SPEED_1000;
3259 break;
3260 case MDIO_USXGMII_2500:
3261 state->speed = SPEED_2500;
3262 break;
3263 case MDIO_USXGMII_5000:
3264 state->speed = SPEED_5000;
3265 break;
3266 case MDIO_USXGMII_10G:
3267 state->speed = SPEED_10000;
3268 break;
3269 default:
3270 state->link = false;
3271 return;
3272 }
3273
3274 if (lpa & MDIO_USXGMII_FULL_DUPLEX)
3275 state->duplex = DUPLEX_FULL;
3276 else
3277 state->duplex = DUPLEX_HALF;
3278 }
3279 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word);
3280
3281 /**
3282 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers
3283 * @state: a pointer to a &struct phylink_link_state.
3284 * @bmsr: The value of the %MII_BMSR register
3285 * @lpa: The value of the %MII_LPA register
3286 *
3287 * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3288 * clause 37 negotiation and/or SGMII control.
3289 *
3290 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into
3291 * the phylink @state structure. This is suitable to be used for implementing
3292 * the mac_pcs_get_state() member of the struct phylink_mac_ops structure if
3293 * accessing @bmsr and @lpa cannot be done with MDIO directly.
3294 */
phylink_mii_c22_pcs_decode_state(struct phylink_link_state * state,u16 bmsr,u16 lpa)3295 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state,
3296 u16 bmsr, u16 lpa)
3297 {
3298 state->link = !!(bmsr & BMSR_LSTATUS);
3299 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE);
3300 /* If there is no link or autonegotiation is disabled, the LP advertisement
3301 * data is not meaningful, so don't go any further.
3302 */
3303 if (!state->link || !state->an_enabled)
3304 return;
3305
3306 switch (state->interface) {
3307 case PHY_INTERFACE_MODE_1000BASEX:
3308 phylink_decode_c37_word(state, lpa, SPEED_1000);
3309 break;
3310
3311 case PHY_INTERFACE_MODE_2500BASEX:
3312 phylink_decode_c37_word(state, lpa, SPEED_2500);
3313 break;
3314
3315 case PHY_INTERFACE_MODE_SGMII:
3316 case PHY_INTERFACE_MODE_QSGMII:
3317 case PHY_INTERFACE_MODE_QUSGMII:
3318 phylink_decode_sgmii_word(state, lpa);
3319 break;
3320
3321 default:
3322 state->link = false;
3323 break;
3324 }
3325 }
3326 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state);
3327
3328 /**
3329 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state
3330 * @pcs: a pointer to a &struct mdio_device.
3331 * @state: a pointer to a &struct phylink_link_state.
3332 *
3333 * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3334 * clause 37 negotiation and/or SGMII control.
3335 *
3336 * Read the MAC PCS state from the MII device configured in @config and
3337 * parse the Clause 37 or Cisco SGMII link partner negotiation word into
3338 * the phylink @state structure. This is suitable to be directly plugged
3339 * into the mac_pcs_get_state() member of the struct phylink_mac_ops
3340 * structure.
3341 */
phylink_mii_c22_pcs_get_state(struct mdio_device * pcs,struct phylink_link_state * state)3342 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs,
3343 struct phylink_link_state *state)
3344 {
3345 int bmsr, lpa;
3346
3347 bmsr = mdiodev_read(pcs, MII_BMSR);
3348 lpa = mdiodev_read(pcs, MII_LPA);
3349 if (bmsr < 0 || lpa < 0) {
3350 state->link = false;
3351 return;
3352 }
3353
3354 phylink_mii_c22_pcs_decode_state(state, bmsr, lpa);
3355 }
3356 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state);
3357
3358 /**
3359 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS
3360 * advertisement
3361 * @interface: the PHY interface mode being configured
3362 * @advertising: the ethtool advertisement mask
3363 *
3364 * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3365 * clause 37 negotiation and/or SGMII control.
3366 *
3367 * Encode the clause 37 PCS advertisement as specified by @interface and
3368 * @advertising.
3369 *
3370 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed.
3371 */
phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface,const unsigned long * advertising)3372 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface,
3373 const unsigned long *advertising)
3374 {
3375 u16 adv;
3376
3377 switch (interface) {
3378 case PHY_INTERFACE_MODE_1000BASEX:
3379 case PHY_INTERFACE_MODE_2500BASEX:
3380 adv = ADVERTISE_1000XFULL;
3381 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT,
3382 advertising))
3383 adv |= ADVERTISE_1000XPAUSE;
3384 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
3385 advertising))
3386 adv |= ADVERTISE_1000XPSE_ASYM;
3387 return adv;
3388 case PHY_INTERFACE_MODE_SGMII:
3389 case PHY_INTERFACE_MODE_QSGMII:
3390 return 0x0001;
3391 default:
3392 /* Nothing to do for other modes */
3393 return -EINVAL;
3394 }
3395 }
3396 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement);
3397
3398 /**
3399 * phylink_mii_c22_pcs_config() - configure clause 22 PCS
3400 * @pcs: a pointer to a &struct mdio_device.
3401 * @mode: link autonegotiation mode
3402 * @interface: the PHY interface mode being configured
3403 * @advertising: the ethtool advertisement mask
3404 *
3405 * Configure a Clause 22 PCS PHY with the appropriate negotiation
3406 * parameters for the @mode, @interface and @advertising parameters.
3407 * Returns negative error number on failure, zero if the advertisement
3408 * has not changed, or positive if there is a change.
3409 */
phylink_mii_c22_pcs_config(struct mdio_device * pcs,unsigned int mode,phy_interface_t interface,const unsigned long * advertising)3410 int phylink_mii_c22_pcs_config(struct mdio_device *pcs, unsigned int mode,
3411 phy_interface_t interface,
3412 const unsigned long *advertising)
3413 {
3414 bool changed = 0;
3415 u16 bmcr;
3416 int ret, adv;
3417
3418 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising);
3419 if (adv >= 0) {
3420 ret = mdiobus_modify_changed(pcs->bus, pcs->addr,
3421 MII_ADVERTISE, 0xffff, adv);
3422 if (ret < 0)
3423 return ret;
3424 changed = ret;
3425 }
3426
3427 /* Ensure ISOLATE bit is disabled */
3428 if (mode == MLO_AN_INBAND &&
3429 (interface == PHY_INTERFACE_MODE_SGMII ||
3430 interface == PHY_INTERFACE_MODE_QSGMII ||
3431 linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, advertising)))
3432 bmcr = BMCR_ANENABLE;
3433 else
3434 bmcr = 0;
3435
3436 ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr);
3437 if (ret < 0)
3438 return ret;
3439
3440 return changed;
3441 }
3442 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config);
3443
3444 /**
3445 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation
3446 * @pcs: a pointer to a &struct mdio_device.
3447 *
3448 * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3449 * clause 37 negotiation.
3450 *
3451 * Restart the clause 37 negotiation with the link partner. This is
3452 * suitable to be directly plugged into the mac_pcs_get_state() member
3453 * of the struct phylink_mac_ops structure.
3454 */
phylink_mii_c22_pcs_an_restart(struct mdio_device * pcs)3455 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs)
3456 {
3457 int val = mdiodev_read(pcs, MII_BMCR);
3458
3459 if (val >= 0) {
3460 val |= BMCR_ANRESTART;
3461
3462 mdiodev_write(pcs, MII_BMCR, val);
3463 }
3464 }
3465 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart);
3466
phylink_mii_c45_pcs_get_state(struct mdio_device * pcs,struct phylink_link_state * state)3467 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs,
3468 struct phylink_link_state *state)
3469 {
3470 struct mii_bus *bus = pcs->bus;
3471 int addr = pcs->addr;
3472 int stat;
3473
3474 stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1);
3475 if (stat < 0) {
3476 state->link = false;
3477 return;
3478 }
3479
3480 state->link = !!(stat & MDIO_STAT1_LSTATUS);
3481 if (!state->link)
3482 return;
3483
3484 switch (state->interface) {
3485 case PHY_INTERFACE_MODE_10GBASER:
3486 state->speed = SPEED_10000;
3487 state->duplex = DUPLEX_FULL;
3488 break;
3489
3490 default:
3491 break;
3492 }
3493 }
3494 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state);
3495
phylink_init(void)3496 static int __init phylink_init(void)
3497 {
3498 for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i)
3499 __set_bit(phylink_sfp_interface_preference[i],
3500 phylink_sfp_interfaces);
3501
3502 return 0;
3503 }
3504
3505 module_init(phylink_init);
3506
3507 MODULE_LICENSE("GPL v2");
3508