1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * arch/arm/mach-spear3xx/spear3xx.c
4 *
5 * SPEAr3XX machines common source file
6 *
7 * Copyright (C) 2009-2012 ST Microelectronics
8 * Viresh Kumar <vireshk@kernel.org>
9 */
10
11 #define pr_fmt(fmt) "SPEAr3xx: " fmt
12
13 #include <linux/amba/pl022.h>
14 #include <linux/amba/pl080.h>
15 #include <linux/clk.h>
16 #include <linux/clk/spear.h>
17 #include <linux/io.h>
18 #include <asm/mach/map.h>
19 #include "pl080.h"
20 #include "generic.h"
21 #include "spear.h"
22 #include "misc_regs.h"
23
24 /* ssp device registration */
25 struct pl022_ssp_controller pl022_plat_data = {
26 .bus_id = 0,
27 .enable_dma = 1,
28 .dma_filter = pl08x_filter_id,
29 .dma_tx_param = "ssp0_tx",
30 .dma_rx_param = "ssp0_rx",
31 };
32
33 /* dmac device registration */
34 struct pl08x_platform_data pl080_plat_data = {
35 .memcpy_burst_size = PL08X_BURST_SZ_16,
36 .memcpy_bus_width = PL08X_BUS_WIDTH_32_BITS,
37 .memcpy_prot_buff = true,
38 .memcpy_prot_cache = true,
39 .lli_buses = PL08X_AHB1,
40 .mem_buses = PL08X_AHB1,
41 .get_xfer_signal = pl080_get_signal,
42 .put_xfer_signal = pl080_put_signal,
43 };
44
45 /*
46 * Following will create 16MB static virtual/physical mappings
47 * PHYSICAL VIRTUAL
48 * 0xD0000000 0xFD000000
49 * 0xFC000000 0xFC000000
50 */
51 struct map_desc spear3xx_io_desc[] __initdata = {
52 {
53 .virtual = (unsigned long)VA_SPEAR_ICM1_2_BASE,
54 .pfn = __phys_to_pfn(SPEAR_ICM1_2_BASE),
55 .length = SZ_16M,
56 .type = MT_DEVICE
57 }, {
58 .virtual = (unsigned long)VA_SPEAR_ICM3_SMI_CTRL_BASE,
59 .pfn = __phys_to_pfn(SPEAR_ICM3_SMI_CTRL_BASE),
60 .length = SZ_16M,
61 .type = MT_DEVICE
62 },
63 };
64
65 /* This will create static memory mapping for selected devices */
spear3xx_map_io(void)66 void __init spear3xx_map_io(void)
67 {
68 iotable_init(spear3xx_io_desc, ARRAY_SIZE(spear3xx_io_desc));
69 }
70
spear3xx_timer_init(void)71 void __init spear3xx_timer_init(void)
72 {
73 char pclk_name[] = "pll3_clk";
74 struct clk *gpt_clk, *pclk;
75
76 spear3xx_clk_init(MISC_BASE, VA_SPEAR320_SOC_CONFIG_BASE);
77
78 /* get the system timer clock */
79 gpt_clk = clk_get_sys("gpt0", NULL);
80 if (IS_ERR(gpt_clk)) {
81 pr_err("%s:couldn't get clk for gpt\n", __func__);
82 BUG();
83 }
84
85 /* get the suitable parent clock for timer*/
86 pclk = clk_get(NULL, pclk_name);
87 if (IS_ERR(pclk)) {
88 pr_err("%s:couldn't get %s as parent for gpt\n",
89 __func__, pclk_name);
90 BUG();
91 }
92
93 clk_set_parent(gpt_clk, pclk);
94 clk_put(gpt_clk);
95 clk_put(pclk);
96
97 spear_setup_of_timer();
98 }
99