1 /*
2 * Copyright (c) 2020, The Linux Foundation. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include <stdbool.h>
8 #include <stdint.h>
9
10 #include <common/debug.h>
11
12 #include <qtiseclib_defs.h>
13 #include <qtiseclib_interface.h>
14
15 /*
16 * This file contains dummy implementation of QTISECLIB Published API's.
17 * which will be used to compile PLATFORM successfully when
18 * qtiseclib is not available
19 */
20
21 /*
22 * CPUSS common reset handler for all CPU wake up (both cold & warm boot).
23 * Executes on all core. This API assume serialization across CPU
24 * already taken care before invoking.
25 *
26 * Clobbers: x0 - x17, x30
27 */
qtiseclib_cpuss_reset_asm(uint32_t bl31_cold_boot_state)28 void qtiseclib_cpuss_reset_asm(uint32_t bl31_cold_boot_state)
29 {
30 }
31
32 /*
33 * Execute CPU (Kryo4 gold) specific reset handler / system initialization.
34 * This takes care of executing required CPU errata's.
35 *
36 * Clobbers: x0 - x16
37 */
qtiseclib_kryo4_gold_reset_asm(void)38 void qtiseclib_kryo4_gold_reset_asm(void)
39 {
40 }
41
42 /*
43 * Execute CPU (Kryo4 silver) specific reset handler / system initialization.
44 * This takes care of executing required CPU errata's.
45 *
46 * Clobbers: x0 - x16
47 */
qtiseclib_kryo4_silver_reset_asm(void)48 void qtiseclib_kryo4_silver_reset_asm(void)
49 {
50 }
51
52 /*
53 * Execute CPU (Kryo4 gold) specific reset handler / system initialization.
54 * This takes care of executing required CPU errata's.
55 *
56 * Clobbers: x0 - x16
57 */
qtiseclib_kryo6_gold_reset_asm(void)58 void qtiseclib_kryo6_gold_reset_asm(void)
59 {
60 }
61
62
qtiseclib_kryo6_silver_reset_asm(void)63 void qtiseclib_kryo6_silver_reset_asm(void)
64 {
65 }
66
67 /*
68 * C Api's
69 */
qtiseclib_bl31_platform_setup(void)70 void qtiseclib_bl31_platform_setup(void)
71 {
72 ERROR("Please use QTISECLIB_PATH while building TF-A\n");
73 ERROR("Please refer docs/plat/qti.rst for more details.\n");
74 panic();
75 }
76
qtiseclib_invoke_isr(uint32_t irq,void * handle)77 void qtiseclib_invoke_isr(uint32_t irq, void *handle)
78 {
79 }
80
qtiseclib_panic(void)81 void qtiseclib_panic(void)
82 {
83 }
84
85 int
qtiseclib_mem_assign(const memprot_info_t * mem_info,uint32_t mem_info_list_cnt,const uint32_t * source_vm_list,uint32_t src_vm_list_cnt,const memprot_dst_vm_perm_info_t * dest_vm_list,uint32_t dst_vm_list_cnt)86 qtiseclib_mem_assign(const memprot_info_t *mem_info,
87 uint32_t mem_info_list_cnt,
88 const uint32_t *source_vm_list,
89 uint32_t src_vm_list_cnt,
90 const memprot_dst_vm_perm_info_t *dest_vm_list,
91 uint32_t dst_vm_list_cnt)
92 {
93 return 0;
94 }
95
qtiseclib_psci_init(uintptr_t warmboot_entry)96 int qtiseclib_psci_init(uintptr_t warmboot_entry)
97 {
98 return 0;
99 }
100
qtiseclib_psci_node_power_on(u_register_t mpidr)101 int qtiseclib_psci_node_power_on(u_register_t mpidr)
102 {
103 return 0;
104 }
105
qtiseclib_psci_node_on_finish(const uint8_t * states)106 void qtiseclib_psci_node_on_finish(const uint8_t *states)
107 {
108 }
109
qtiseclib_psci_cpu_standby(uint8_t pwr_state)110 void qtiseclib_psci_cpu_standby(uint8_t pwr_state)
111 {
112 }
113
qtiseclib_psci_node_power_off(const uint8_t * states)114 void qtiseclib_psci_node_power_off(const uint8_t *states)
115 {
116 }
117
qtiseclib_psci_node_suspend(const uint8_t * states)118 void qtiseclib_psci_node_suspend(const uint8_t *states)
119 {
120 }
121
qtiseclib_psci_node_suspend_finish(const uint8_t * states)122 void qtiseclib_psci_node_suspend_finish(const uint8_t *states)
123 {
124 }
125
qtiseclib_disable_cluster_coherency(uint8_t state)126 void qtiseclib_disable_cluster_coherency(uint8_t state)
127 {
128 }
129
130