1 /*
2 * Copyright © 2007 David Airlie
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * David Airlie
25 */
26
27 #include <linux/module.h>
28 #include <linux/pci.h>
29 #include <linux/pm_runtime.h>
30 #include <linux/slab.h>
31 #include <linux/vga_switcheroo.h>
32
33 #include <drm/drm_crtc.h>
34 #include <drm/drm_crtc_helper.h>
35 #include <drm/drm_fb_helper.h>
36 #include <drm/drm_fourcc.h>
37 #include <drm/drm_framebuffer.h>
38 #include <drm/radeon_drm.h>
39
40 #include "radeon.h"
41
42 /* object hierarchy -
43 * this contains a helper + a radeon fb
44 * the helper contains a pointer to radeon framebuffer baseclass.
45 */
46 struct radeon_fbdev {
47 struct drm_fb_helper helper; /* must be first */
48 struct drm_framebuffer fb;
49 struct radeon_device *rdev;
50 };
51
52 static int
radeonfb_open(struct fb_info * info,int user)53 radeonfb_open(struct fb_info *info, int user)
54 {
55 struct radeon_fbdev *rfbdev = info->par;
56 struct radeon_device *rdev = rfbdev->rdev;
57 int ret = pm_runtime_get_sync(rdev->ddev->dev);
58
59 if (ret < 0 && ret != -EACCES) {
60 pm_runtime_mark_last_busy(rdev->ddev->dev);
61 pm_runtime_put_autosuspend(rdev->ddev->dev);
62 return ret;
63 }
64 return 0;
65 }
66
67 static int
radeonfb_release(struct fb_info * info,int user)68 radeonfb_release(struct fb_info *info, int user)
69 {
70 struct radeon_fbdev *rfbdev = info->par;
71 struct radeon_device *rdev = rfbdev->rdev;
72
73 pm_runtime_mark_last_busy(rdev->ddev->dev);
74 pm_runtime_put_autosuspend(rdev->ddev->dev);
75 return 0;
76 }
77
78 static const struct fb_ops radeonfb_ops = {
79 .owner = THIS_MODULE,
80 DRM_FB_HELPER_DEFAULT_OPS,
81 .fb_open = radeonfb_open,
82 .fb_release = radeonfb_release,
83 .fb_read = drm_fb_helper_cfb_read,
84 .fb_write = drm_fb_helper_cfb_write,
85 .fb_fillrect = drm_fb_helper_cfb_fillrect,
86 .fb_copyarea = drm_fb_helper_cfb_copyarea,
87 .fb_imageblit = drm_fb_helper_cfb_imageblit,
88 };
89
90
radeon_align_pitch(struct radeon_device * rdev,int width,int cpp,bool tiled)91 int radeon_align_pitch(struct radeon_device *rdev, int width, int cpp, bool tiled)
92 {
93 int aligned = width;
94 int align_large = (ASIC_IS_AVIVO(rdev)) || tiled;
95 int pitch_mask = 0;
96
97 switch (cpp) {
98 case 1:
99 pitch_mask = align_large ? 255 : 127;
100 break;
101 case 2:
102 pitch_mask = align_large ? 127 : 31;
103 break;
104 case 3:
105 case 4:
106 pitch_mask = align_large ? 63 : 15;
107 break;
108 }
109
110 aligned += pitch_mask;
111 aligned &= ~pitch_mask;
112 return aligned * cpp;
113 }
114
radeonfb_destroy_pinned_object(struct drm_gem_object * gobj)115 static void radeonfb_destroy_pinned_object(struct drm_gem_object *gobj)
116 {
117 struct radeon_bo *rbo = gem_to_radeon_bo(gobj);
118 int ret;
119
120 ret = radeon_bo_reserve(rbo, false);
121 if (likely(ret == 0)) {
122 radeon_bo_kunmap(rbo);
123 radeon_bo_unpin(rbo);
124 radeon_bo_unreserve(rbo);
125 }
126 drm_gem_object_put(gobj);
127 }
128
radeonfb_create_pinned_object(struct radeon_fbdev * rfbdev,struct drm_mode_fb_cmd2 * mode_cmd,struct drm_gem_object ** gobj_p)129 static int radeonfb_create_pinned_object(struct radeon_fbdev *rfbdev,
130 struct drm_mode_fb_cmd2 *mode_cmd,
131 struct drm_gem_object **gobj_p)
132 {
133 const struct drm_format_info *info;
134 struct radeon_device *rdev = rfbdev->rdev;
135 struct drm_gem_object *gobj = NULL;
136 struct radeon_bo *rbo = NULL;
137 bool fb_tiled = false; /* useful for testing */
138 u32 tiling_flags = 0;
139 int ret;
140 int aligned_size, size;
141 int height = mode_cmd->height;
142 u32 cpp;
143
144 info = drm_get_format_info(rdev->ddev, mode_cmd);
145 cpp = info->cpp[0];
146
147 /* need to align pitch with crtc limits */
148 mode_cmd->pitches[0] = radeon_align_pitch(rdev, mode_cmd->width, cpp,
149 fb_tiled);
150
151 if (rdev->family >= CHIP_R600)
152 height = ALIGN(mode_cmd->height, 8);
153 size = mode_cmd->pitches[0] * height;
154 aligned_size = ALIGN(size, PAGE_SIZE);
155 ret = radeon_gem_object_create(rdev, aligned_size, 0,
156 RADEON_GEM_DOMAIN_VRAM,
157 0, true, &gobj);
158 if (ret) {
159 pr_err("failed to allocate framebuffer (%d)\n", aligned_size);
160 return -ENOMEM;
161 }
162 rbo = gem_to_radeon_bo(gobj);
163
164 if (fb_tiled)
165 tiling_flags = RADEON_TILING_MACRO;
166
167 #ifdef __BIG_ENDIAN
168 switch (cpp) {
169 case 4:
170 tiling_flags |= RADEON_TILING_SWAP_32BIT;
171 break;
172 case 2:
173 tiling_flags |= RADEON_TILING_SWAP_16BIT;
174 break;
175 default:
176 break;
177 }
178 #endif
179
180 if (tiling_flags) {
181 ret = radeon_bo_set_tiling_flags(rbo,
182 tiling_flags | RADEON_TILING_SURFACE,
183 mode_cmd->pitches[0]);
184 if (ret)
185 dev_err(rdev->dev, "FB failed to set tiling flags\n");
186 }
187
188
189 ret = radeon_bo_reserve(rbo, false);
190 if (unlikely(ret != 0))
191 goto out_unref;
192 /* Only 27 bit offset for legacy CRTC */
193 ret = radeon_bo_pin_restricted(rbo, RADEON_GEM_DOMAIN_VRAM,
194 ASIC_IS_AVIVO(rdev) ? 0 : 1 << 27,
195 NULL);
196 if (ret) {
197 radeon_bo_unreserve(rbo);
198 goto out_unref;
199 }
200 if (fb_tiled)
201 radeon_bo_check_tiling(rbo, 0, 0);
202 ret = radeon_bo_kmap(rbo, NULL);
203 radeon_bo_unreserve(rbo);
204 if (ret)
205 goto out_unref;
206
207 *gobj_p = gobj;
208 return 0;
209 out_unref:
210 radeonfb_destroy_pinned_object(gobj);
211 *gobj_p = NULL;
212 return ret;
213 }
214
radeonfb_create(struct drm_fb_helper * helper,struct drm_fb_helper_surface_size * sizes)215 static int radeonfb_create(struct drm_fb_helper *helper,
216 struct drm_fb_helper_surface_size *sizes)
217 {
218 struct radeon_fbdev *rfbdev =
219 container_of(helper, struct radeon_fbdev, helper);
220 struct radeon_device *rdev = rfbdev->rdev;
221 struct fb_info *info;
222 struct drm_framebuffer *fb = NULL;
223 struct drm_mode_fb_cmd2 mode_cmd;
224 struct drm_gem_object *gobj = NULL;
225 struct radeon_bo *rbo = NULL;
226 int ret;
227 unsigned long tmp;
228
229 mode_cmd.width = sizes->surface_width;
230 mode_cmd.height = sizes->surface_height;
231
232 /* avivo can't scanout real 24bpp */
233 if ((sizes->surface_bpp == 24) && ASIC_IS_AVIVO(rdev))
234 sizes->surface_bpp = 32;
235
236 mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp,
237 sizes->surface_depth);
238
239 ret = radeonfb_create_pinned_object(rfbdev, &mode_cmd, &gobj);
240 if (ret) {
241 DRM_ERROR("failed to create fbcon object %d\n", ret);
242 return ret;
243 }
244
245 rbo = gem_to_radeon_bo(gobj);
246
247 /* okay we have an object now allocate the framebuffer */
248 info = drm_fb_helper_alloc_info(helper);
249 if (IS_ERR(info)) {
250 ret = PTR_ERR(info);
251 goto out;
252 }
253
254 /* radeon resume is fragile and needs a vt switch to help it along */
255 info->skip_vt_switch = false;
256
257 ret = radeon_framebuffer_init(rdev->ddev, &rfbdev->fb, &mode_cmd, gobj);
258 if (ret) {
259 DRM_ERROR("failed to initialize framebuffer %d\n", ret);
260 goto out;
261 }
262
263 fb = &rfbdev->fb;
264
265 /* setup helper */
266 rfbdev->helper.fb = fb;
267
268 memset_io(rbo->kptr, 0x0, radeon_bo_size(rbo));
269
270 info->fbops = &radeonfb_ops;
271
272 tmp = radeon_bo_gpu_offset(rbo) - rdev->mc.vram_start;
273 info->fix.smem_start = rdev->mc.aper_base + tmp;
274 info->fix.smem_len = radeon_bo_size(rbo);
275 info->screen_base = rbo->kptr;
276 info->screen_size = radeon_bo_size(rbo);
277
278 drm_fb_helper_fill_info(info, &rfbdev->helper, sizes);
279
280 /* Use default scratch pixmap (info->pixmap.flags = FB_PIXMAP_SYSTEM) */
281
282 if (info->screen_base == NULL) {
283 ret = -ENOSPC;
284 goto out;
285 }
286
287 DRM_INFO("fb mappable at 0x%lX\n", info->fix.smem_start);
288 DRM_INFO("vram apper at 0x%lX\n", (unsigned long)rdev->mc.aper_base);
289 DRM_INFO("size %lu\n", (unsigned long)radeon_bo_size(rbo));
290 DRM_INFO("fb depth is %d\n", fb->format->depth);
291 DRM_INFO(" pitch is %d\n", fb->pitches[0]);
292
293 vga_switcheroo_client_fb_set(rdev->pdev, info);
294 return 0;
295
296 out:
297 if (fb && ret) {
298 drm_gem_object_put(gobj);
299 drm_framebuffer_unregister_private(fb);
300 drm_framebuffer_cleanup(fb);
301 kfree(fb);
302 }
303 return ret;
304 }
305
radeon_fbdev_destroy(struct drm_device * dev,struct radeon_fbdev * rfbdev)306 static int radeon_fbdev_destroy(struct drm_device *dev, struct radeon_fbdev *rfbdev)
307 {
308 struct drm_framebuffer *fb = &rfbdev->fb;
309
310 drm_fb_helper_unregister_info(&rfbdev->helper);
311
312 if (fb->obj[0]) {
313 radeonfb_destroy_pinned_object(fb->obj[0]);
314 fb->obj[0] = NULL;
315 drm_framebuffer_unregister_private(fb);
316 drm_framebuffer_cleanup(fb);
317 }
318 drm_fb_helper_fini(&rfbdev->helper);
319
320 return 0;
321 }
322
323 static const struct drm_fb_helper_funcs radeon_fb_helper_funcs = {
324 .fb_probe = radeonfb_create,
325 };
326
radeon_fbdev_init(struct radeon_device * rdev)327 int radeon_fbdev_init(struct radeon_device *rdev)
328 {
329 struct radeon_fbdev *rfbdev;
330 int bpp_sel = 32;
331 int ret;
332
333 /* don't enable fbdev if no connectors */
334 if (list_empty(&rdev->ddev->mode_config.connector_list))
335 return 0;
336
337 /* select 8 bpp console on 8MB cards, or 16 bpp on RN50 or 32MB */
338 if (rdev->mc.real_vram_size <= (8*1024*1024))
339 bpp_sel = 8;
340 else if (ASIC_IS_RN50(rdev) ||
341 rdev->mc.real_vram_size <= (32*1024*1024))
342 bpp_sel = 16;
343
344 rfbdev = kzalloc(sizeof(struct radeon_fbdev), GFP_KERNEL);
345 if (!rfbdev)
346 return -ENOMEM;
347
348 rfbdev->rdev = rdev;
349 rdev->mode_info.rfbdev = rfbdev;
350
351 drm_fb_helper_prepare(rdev->ddev, &rfbdev->helper, bpp_sel,
352 &radeon_fb_helper_funcs);
353
354 ret = drm_fb_helper_init(rdev->ddev, &rfbdev->helper);
355 if (ret)
356 goto free;
357
358 /* disable all the possible outputs/crtcs before entering KMS mode */
359 drm_helper_disable_unused_functions(rdev->ddev);
360
361 ret = drm_fb_helper_initial_config(&rfbdev->helper);
362 if (ret)
363 goto fini;
364
365 return 0;
366
367 fini:
368 drm_fb_helper_fini(&rfbdev->helper);
369 free:
370 drm_fb_helper_unprepare(&rfbdev->helper);
371 kfree(rfbdev);
372 return ret;
373 }
374
radeon_fbdev_fini(struct radeon_device * rdev)375 void radeon_fbdev_fini(struct radeon_device *rdev)
376 {
377 if (!rdev->mode_info.rfbdev)
378 return;
379
380 radeon_fbdev_destroy(rdev->ddev, rdev->mode_info.rfbdev);
381 drm_fb_helper_unprepare(&rdev->mode_info.rfbdev->helper);
382 kfree(rdev->mode_info.rfbdev);
383 rdev->mode_info.rfbdev = NULL;
384 }
385
radeon_fbdev_set_suspend(struct radeon_device * rdev,int state)386 void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state)
387 {
388 if (rdev->mode_info.rfbdev)
389 drm_fb_helper_set_suspend(&rdev->mode_info.rfbdev->helper, state);
390 }
391
radeon_fbdev_robj_is_fb(struct radeon_device * rdev,struct radeon_bo * robj)392 bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj)
393 {
394 if (!rdev->mode_info.rfbdev)
395 return false;
396
397 if (robj == gem_to_radeon_bo(rdev->mode_info.rfbdev->fb.obj[0]))
398 return true;
399 return false;
400 }
401