1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3 * R-Car Display Unit DRM driver
4 *
5 * Copyright (C) 2013-2015 Renesas Electronics Corporation
6 *
7 * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
8 */
9
10 #ifndef __RCAR_DU_DRV_H__
11 #define __RCAR_DU_DRV_H__
12
13 #include <linux/kernel.h>
14 #include <linux/wait.h>
15
16 #include <drm/drm_device.h>
17
18 #include "rcar_cmm.h"
19 #include "rcar_du_crtc.h"
20 #include "rcar_du_group.h"
21 #include "rcar_du_vsp.h"
22
23 struct clk;
24 struct device;
25 struct drm_bridge;
26 struct drm_property;
27 struct rcar_du_device;
28
29 #define RCAR_DU_FEATURE_CRTC_IRQ BIT(0) /* Per-CRTC IRQ */
30 #define RCAR_DU_FEATURE_CRTC_CLOCK BIT(1) /* Per-CRTC clock */
31 #define RCAR_DU_FEATURE_VSP1_SOURCE BIT(2) /* Has inputs from VSP1 */
32 #define RCAR_DU_FEATURE_INTERLACED BIT(3) /* HW supports interlaced */
33 #define RCAR_DU_FEATURE_TVM_SYNC BIT(4) /* Has TV switch/sync modes */
34 #define RCAR_DU_FEATURE_NO_BLENDING BIT(5) /* PnMR.SPIM does not have ALP nor EOR bits */
35
36 #define RCAR_DU_QUIRK_ALIGN_128B BIT(0) /* Align pitches to 128 bytes */
37 #define RCAR_DU_QUIRK_H3_ES1_PCLK_STABILITY BIT(1) /* H3 ES1 has pclk stability issue */
38 #define RCAR_DU_QUIRK_H3_ES1_PLL BIT(2) /* H3 ES1 PLL setup differs from non-ES1 */
39
40 enum rcar_du_output {
41 RCAR_DU_OUTPUT_DPAD0,
42 RCAR_DU_OUTPUT_DPAD1,
43 RCAR_DU_OUTPUT_DSI0,
44 RCAR_DU_OUTPUT_DSI1,
45 RCAR_DU_OUTPUT_HDMI0,
46 RCAR_DU_OUTPUT_HDMI1,
47 RCAR_DU_OUTPUT_LVDS0,
48 RCAR_DU_OUTPUT_LVDS1,
49 RCAR_DU_OUTPUT_TCON,
50 RCAR_DU_OUTPUT_MAX,
51 };
52
53 /*
54 * struct rcar_du_output_routing - Output routing specification
55 * @possible_crtcs: bitmask of possible CRTCs for the output
56 * @port: device tree port number corresponding to this output route
57 *
58 * The DU has 5 possible outputs (DPAD0/1, LVDS0/1, TCON). Output routing data
59 * specify the valid SoC outputs, which CRTCs can drive the output, and the type
60 * of in-SoC encoder for the output.
61 */
62 struct rcar_du_output_routing {
63 unsigned int possible_crtcs;
64 unsigned int port;
65 };
66
67 /*
68 * struct rcar_du_device_info - DU model-specific information
69 * @gen: device generation (2 or 3)
70 * @features: device features (RCAR_DU_FEATURE_*)
71 * @quirks: device quirks (RCAR_DU_QUIRK_*)
72 * @channels_mask: bit mask of available DU channels
73 * @routes: array of CRTC to output routes, indexed by output (RCAR_DU_OUTPUT_*)
74 * @num_lvds: number of internal LVDS encoders
75 * @num_rpf: number of RPFs in VSP
76 * @dpll_mask: bit mask of DU channels equipped with a DPLL
77 * @dsi_clk_mask: bitmask of channels that can use the DSI clock as dot clock
78 * @lvds_clk_mask: bitmask of channels that can use the LVDS clock as dot clock
79 */
80 struct rcar_du_device_info {
81 unsigned int gen;
82 unsigned int features;
83 unsigned int quirks;
84 unsigned int channels_mask;
85 struct rcar_du_output_routing routes[RCAR_DU_OUTPUT_MAX];
86 unsigned int num_lvds;
87 unsigned int num_rpf;
88 unsigned int dpll_mask;
89 unsigned int dsi_clk_mask;
90 unsigned int lvds_clk_mask;
91 };
92
93 #define RCAR_DU_MAX_CRTCS 4
94 #define RCAR_DU_MAX_GROUPS DIV_ROUND_UP(RCAR_DU_MAX_CRTCS, 2)
95 #define RCAR_DU_MAX_VSPS 4
96 #define RCAR_DU_MAX_LVDS 2
97 #define RCAR_DU_MAX_DSI 2
98
99 struct rcar_du_device {
100 struct device *dev;
101 const struct rcar_du_device_info *info;
102
103 void __iomem *mmio;
104
105 struct drm_device ddev;
106
107 struct rcar_du_crtc crtcs[RCAR_DU_MAX_CRTCS];
108 unsigned int num_crtcs;
109
110 struct rcar_du_group groups[RCAR_DU_MAX_GROUPS];
111 struct platform_device *cmms[RCAR_DU_MAX_CRTCS];
112 struct rcar_du_vsp vsps[RCAR_DU_MAX_VSPS];
113 struct drm_bridge *lvds[RCAR_DU_MAX_LVDS];
114 struct drm_bridge *dsi[RCAR_DU_MAX_DSI];
115
116 struct {
117 struct drm_property *colorkey;
118 } props;
119
120 unsigned int dpad0_source;
121 unsigned int dpad1_source;
122 unsigned int vspd1_sink;
123 };
124
to_rcar_du_device(struct drm_device * dev)125 static inline struct rcar_du_device *to_rcar_du_device(struct drm_device *dev)
126 {
127 return container_of(dev, struct rcar_du_device, ddev);
128 }
129
rcar_du_has(struct rcar_du_device * rcdu,unsigned int feature)130 static inline bool rcar_du_has(struct rcar_du_device *rcdu,
131 unsigned int feature)
132 {
133 return rcdu->info->features & feature;
134 }
135
rcar_du_needs(struct rcar_du_device * rcdu,unsigned int quirk)136 static inline bool rcar_du_needs(struct rcar_du_device *rcdu,
137 unsigned int quirk)
138 {
139 return rcdu->info->quirks & quirk;
140 }
141
rcar_du_read(struct rcar_du_device * rcdu,u32 reg)142 static inline u32 rcar_du_read(struct rcar_du_device *rcdu, u32 reg)
143 {
144 return ioread32(rcdu->mmio + reg);
145 }
146
rcar_du_write(struct rcar_du_device * rcdu,u32 reg,u32 data)147 static inline void rcar_du_write(struct rcar_du_device *rcdu, u32 reg, u32 data)
148 {
149 iowrite32(data, rcdu->mmio + reg);
150 }
151
152 const char *rcar_du_output_name(enum rcar_du_output output);
153
154 #endif /* __RCAR_DU_DRV_H__ */
155