Home
last modified time | relevance | path

Searched defs:reg (Results 1 – 25 of 58) sorted by relevance

123

/lk-master/platform/mediatek/common/gic/
A Dmt_gic_v3.c26 static void mt_gic_icc_primask_write(uint32_t reg) { in mt_gic_icc_primask_write()
31 uint32_t reg; in mt_gic_icc_primask_read() local
38 static void mt_gic_icc_igrpen1_write(uint32_t reg) { in mt_gic_icc_igrpen1_write()
43 uint32_t reg; in mt_gic_icc_igrpen1_read() local
51 uint32_t reg; in mt_gic_icc_iar1_read() local
59 uint32_t reg; in mt_gic_icc_msre_write() local
76 static void mt_gic_icc_sre_write(uint32_t reg) { in mt_gic_icc_sre_write()
82 uint32_t reg; in mt_gic_icc_sre_read() local
89 static void mt_gic_icc_eoir1_write(uint32_t reg) { in mt_gic_icc_eoir1_write()
94 uint32_t reg; in mt_mpidr_read() local
[all …]
/lk-master/dev/bus/pci/
A Decam.cpp87 inline size_t location_to_offset(const pci_location_t *state, uint32_t reg) { in location_to_offset()
97 inline int read_config(const pci_location_t *state, uint32_t reg, T *value, const uint8_t *ecam_ptr… in read_config()
106 inline int write_config(const pci_location_t *state, uint32_t reg, T value, uint8_t *ecam_ptr) { in write_config()
114 int pci_ecam::read_config_byte(const pci_location_t *state, uint32_t reg, uint8_t *value) { in read_config_byte()
119 int pci_ecam::read_config_half(const pci_location_t *state, uint32_t reg, uint16_t *value) { in read_config_half()
124 int pci_ecam::read_config_word(const pci_location_t *state, uint32_t reg, uint32_t *value) { in read_config_word()
129 int pci_ecam::write_config_byte(const pci_location_t *state, uint32_t reg, uint8_t value) { in write_config_byte()
134 int pci_ecam::write_config_half(const pci_location_t *state, uint32_t reg, uint16_t value) { in write_config_half()
139 int pci_ecam::write_config_word(const pci_location_t *state, uint32_t reg, uint32_t value) { in write_config_word()
A Dpci_backend.h38 virtual int read_config_byte(const pci_location_t *state, uint32_t reg, uint8_t *value) { in read_config_byte()
41 virtual int read_config_half(const pci_location_t *state, uint32_t reg, uint16_t *value) { in read_config_half()
44 virtual int read_config_word(const pci_location_t *state, uint32_t reg, uint32_t *value) { in read_config_word()
48 virtual int write_config_byte(const pci_location_t *state, uint32_t reg, uint8_t value) { in write_config_byte()
51 virtual int write_config_half(const pci_location_t *state, uint32_t reg, uint16_t value) { in write_config_half()
54 virtual int write_config_word(const pci_location_t *state, uint32_t reg, uint32_t value) { in write_config_word()
A Dpci.cpp63 status_t pci_read_config_byte(const pci_location_t *state, uint32_t reg, uint8_t *value) { in pci_read_config_byte()
72 status_t pci_read_config_half(const pci_location_t *state, uint32_t reg, uint16_t *value) { in pci_read_config_half()
82 status_t pci_read_config_word(const pci_location_t *state, uint32_t reg, uint32_t *value) { in pci_read_config_word()
92 status_t pci_write_config_byte(const pci_location_t *state, uint32_t reg, uint8_t value) { in pci_write_config_byte()
102 status_t pci_write_config_half(const pci_location_t *state, uint32_t reg, uint16_t value) { in pci_write_config_half()
112 status_t pci_write_config_word(const pci_location_t *state, uint32_t reg, uint32_t value) { in pci_write_config_word()
A Dbios32.cpp229 int pci_bios32::read_config_byte(const pci_location_t *state, uint32_t reg, uint8_t *value) { in read_config_byte()
251 int pci_bios32::read_config_half(const pci_location_t *state, uint32_t reg, uint16_t *value) { in read_config_half()
273 int pci_bios32::read_config_word(const pci_location_t *state, uint32_t reg, uint32_t *value) { in read_config_word()
295 int pci_bios32::write_config_byte(const pci_location_t *state, uint32_t reg, uint8_t value) { in write_config_byte()
317 int pci_bios32::write_config_half(const pci_location_t *state, uint32_t reg, uint16_t value) { in write_config_half()
339 int pci_bios32::write_config_word(const pci_location_t *state, uint32_t reg, uint32_t value) { in write_config_word()
A Dtype1.cpp83 int pci_type1::read_config_byte(const pci_location_t *state, uint32_t reg, uint8_t *value) { in read_config_byte()
89 int pci_type1::read_config_half(const pci_location_t *state, uint32_t reg, uint16_t *value) { in read_config_half()
95 int pci_type1::read_config_word(const pci_location_t *state, uint32_t reg, uint32_t *value) { in read_config_word()
/lk-master/external/platform/nrfx/hal/
A Dnrf_gpio.h583 NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); in nrf_gpio_cfg() local
631 NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); in nrf_gpio_cfg_watcher() local
640 NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); in nrf_gpio_input_disconnect() local
664 NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); in nrf_gpio_cfg_sense_set() local
693 NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); in nrf_gpio_pin_set() local
701 NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); in nrf_gpio_pin_clear() local
732 NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); in nrf_gpio_pin_read() local
740 NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); in nrf_gpio_pin_out_read() local
748 NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); in nrf_gpio_pin_sense_get() local
757 NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); in nrf_gpio_pin_dir_get() local
[all …]
/lk-master/external/platform/lpc15xx/lpcopen/lpc_chip_15xx/src/
A Dacmp_15xx.c68 uint32_t reg = (pACMP->ACMP[index].CMP & ~ACMP_INTFLAG_BIT) & ~ACMP_INTEDGE_MASK; in Chip_ACMP_SetIntEdgeSelection() local
77 uint32_t reg = (pACMP->ACMP[index].CMP & ~ACMP_INTFLAG_BIT) & ~ACMP_COMPVPSEL_MASK; in Chip_ACMP_SetPosVoltRef() local
87 uint32_t reg = (pACMP->ACMP[index].CMP & ~ACMP_INTFLAG_BIT) & ~ACMP_COMPVMSEL_MASK; in Chip_ACMP_SetNegVoltRef() local
97 uint32_t reg = (pACMP->ACMP[index].CMP & ~ACMP_INTFLAG_BIT) & ~ACMP_HYSTERESIS_MASK; in Chip_ACMP_SetHysteresis() local
107 uint32_t reg = (pACMP->ACMP[index].CMP & ~ACMP_INTFLAG_BIT) & ~(ACMP_HYSTERESIS_MASK | in Chip_ACMP_SetupACMPRefs() local
118 uint32_t reg = (pACMP->ACMP[index].CMP & ~ACMP_INTFLAG_BIT) & ~(ACMP_INTPOL_BIT | in Chip_ACMP_SetupACMPInt() local
139 …uint32_t reg = (pACMP->ACMP[index].CMP & ~ACMP_INTFLAG_BIT) & ~(ACMP_LADSEL_MASK | ACMP_LADREF_BIT… in Chip_ACMP_SetupVoltLadder() local
A Dritimer_15xx.c68 uint32_t reg; in Chip_RIT_SetCTRL() local
77 uint32_t reg; in Chip_RIT_ClearCTRL() local
/lk-master/dev/timer/arm_generic/
A Darm_generic_timer.c45 #define READ_TIMER_REG32(reg) ARM64_READ_SYSREG(reg) argument
46 #define READ_TIMER_REG64(reg) ARM64_READ_SYSREG(reg) argument
47 #define WRITE_TIMER_REG32(reg, val) ARM64_WRITE_SYSREG(reg, val) argument
48 #define WRITE_TIMER_REG64(reg, val) ARM64_WRITE_SYSREG(reg, val) argument
70 #define READ_TIMER_REG32(reg) \ argument
77 #define READ_TIMER_REG64(reg) \ argument
84 #define WRITE_TIMER_REG32(reg, val) \ argument
90 #define WRITE_TIMER_REG64(reg, val) \ argument
105 #define SELECTED_TIMER_REG(reg) XCOMBINE3(TIMER_REG_, TIMER_ARM_GENERIC_SELECTED, reg) argument
/lk-master/platform/mediatek/mt6735/include/platform/
A Dmt_typedefs.h94 #define READ_REGISTER_UINT32(reg) \ argument
97 #define WRITE_REGISTER_UINT32(reg, val) \ argument
100 #define READ_REGISTER_UINT16(reg) \ argument
103 #define WRITE_REGISTER_UINT16(reg, val) \ argument
106 #define READ_REGISTER_UINT8(reg) \ argument
109 #define WRITE_REGISTER_UINT8(reg, val) \ argument
/lk-master/platform/mediatek/mt6797/include/platform/
A Dmt_typedefs.h95 #define READ_REGISTER_UINT32(reg) \ argument
98 #define WRITE_REGISTER_UINT32(reg, val) \ argument
101 #define READ_REGISTER_UINT16(reg) \ argument
104 #define WRITE_REGISTER_UINT16(reg, val) \ argument
107 #define READ_REGISTER_UINT8(reg) \ argument
110 #define WRITE_REGISTER_UINT8(reg, val) \ argument
/lk-master/platform/bcm28xx/
A Dintc.c94 uintptr_t reg = INTC_LOCAL_TIMER_INT_CONTROL0 + cpu * 4; in mask_interrupt() local
99 uintptr_t reg; in mask_interrupt() local
126 uintptr_t reg = INTC_LOCAL_TIMER_INT_CONTROL0 + cpu * 4; in unmask_interrupt() local
131 uintptr_t reg; in unmask_interrupt() local
/lk-master/dev/gpio_i2c/
A Dgpio_i2c.c130 const uint8_t *reg, in gpio_i2c_tx_common()
160 const uint8_t *reg, in gpio_i2c_rx_common()
239 status_t gpio_i2c_write_reg_bytes(int bus, uint8_t address, uint8_t reg, const uint8_t *buf, size_t… in gpio_i2c_write_reg_bytes()
247 status_t gpio_i2c_read_reg_bytes(int bus, uint8_t address, uint8_t reg, uint8_t *buf, size_t cnt) { in gpio_i2c_read_reg_bytes()
/lk-master/arch/arm/include/arch/
A Dasm.h13 #define LOADCONST(reg, c) \ argument
17 #define LOADCONST(reg, c) ldr reg, =##c argument
A Darm.h104 #define GEN_CP_REG_FUNCS(cp, reg, op1, c1, c2, op2) \ argument
126 #define GEN_CP15_REG_FUNCS(reg, op1, c1, c2, op2) \ argument
129 #define GEN_CP14_REG_FUNCS(reg, op1, c1, c2, op2) \ argument
/lk-master/dev/include/dev/
A Di2c.h35 static inline status_t i2c_write_reg(int bus, uint8_t address, uint8_t reg, uint8_t val) { in i2c_write_reg()
39 static inline status_t i2c_read_reg(int bus, uint8_t address, uint8_t reg, uint8_t *val) { in i2c_read_reg()
/lk-master/dev/net/smc91c96/
A Dsmc91c96.c22 #define SMC_REG16(reg) ((volatile uint16_t *)(smc91c96_base + (reg))) argument
23 #define SMC_REG8(reg) ((volatile uint8_t *)(smc91c96_base + (reg))) argument
/lk-master/platform/stm32f0xx/
A Drcc.c39 __IO uint32_t *reg = stm32_rcc_get_clock_en_reg(clock); in stm32_rcc_set_enable() local
61 __IO uint32_t *reg = stm32_rcc_get_clock_rst_reg(clock); in stm32_rcc_set_reset() local
A Dspi.c18 #define SPI_SR_FRLVL_VAL(reg) ((reg) >> 9 & 0x3) argument
19 #define SPI_SR_FTLVL_VAL(reg) ((reg) >> 11 & 0x3) argument
/lk-master/dev/interrupt/arm_gic/
A Darm_gic.c107 #define GICREG(gic, reg) (*REG32(GICBASE(gic) + (reg))) argument
159 int reg = vector / 32; in gic_set_enable() local
270 u_int reg = i / 32; in arm_gic_init() local
279 int reg = irq / 32; in arm_gic_set_secure_locked() local
296 u_int reg = irq / 4; in arm_gic_set_target_locked() local
314 u_int reg = irq / 4; in arm_gic_get_priority() local
320 u_int reg = irq / 4; in arm_gic_set_priority_locked() local
/lk-master/dev/class/
A Di2c_api.c34 status_t class_i2c_write_reg(struct device *dev, uint8_t addr, uint8_t reg, uint8_t value) { in class_i2c_write_reg()
45 status_t class_i2c_read_reg(struct device *dev, uint8_t addr, uint8_t reg, void *value) { in class_i2c_read_reg()
/lk-master/arch/arm64/include/arch/
A Darm64.h22 #define ARM64_READ_SYSREG(reg) \ argument
29 #define ARM64_WRITE_SYSREG(reg, val) \ argument
/lk-master/platform/qemu-virt-m68k/
A Dgoldfish_rtc.c45 static void write_reg(int reg, uint32_t val) { in write_reg()
49 static uint32_t read_reg(int reg) { in read_reg()
A Dgoldfish_tty.c50 static void write_reg(int reg, uint32_t val) { in write_reg()
54 static uint32_t read_reg(int reg) { in read_reg()

Completed in 36 milliseconds

123