1 /*
2 * Renesas SCP/MCP Software
3 * Copyright (c) 2020-2021, Renesas Electronics Corporation. All rights
4 * reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8
9 #include <mmio.h>
10 #include <rcar_common.h>
11 #include <rcar_mmap.h>
12
13 #include <fwk_attributes.h>
14
cpg_write(uintptr_t regadr,uint32_t regval)15 void FWK_SECTION(".system_ram") cpg_write(uintptr_t regadr, uint32_t regval)
16 {
17 uint32_t value = (regval);
18 mmio_write_32((uintptr_t)RCAR_CPGWPR, ~value);
19 mmio_write_32(regadr, value);
20 }
21
22 void FWK_SECTION(".system_ram")
mstpcr_write(uint32_t mstpcr,uint32_t mstpsr,uint32_t target_bit)23 mstpcr_write(uint32_t mstpcr, uint32_t mstpsr, uint32_t target_bit)
24 {
25 uint32_t reg;
26 reg = mmio_read_32(mstpcr);
27 reg &= ~target_bit;
28 cpg_write(mstpcr, reg);
29 while ((mmio_read_32(mstpsr) & target_bit) != 0U)
30 continue;
31 }
32
cpu_relax(void)33 static inline void cpu_relax(void)
34 {
35 __asm__ volatile("yield" ::: "memory");
36 }
37
get_cntfrq(void)38 static uint64_t FWK_SECTION(".system_ram") get_cntfrq(void)
39 {
40 uint64_t val;
41 __asm__ volatile("mrs %0, cntfrq_el0" : "=r"(val));
42 return val;
43 }
44
get_cntvct(void)45 static uint64_t FWK_SECTION(".system_ram") get_cntvct(void)
46 {
47 uint64_t val;
48 __asm__ volatile("mrs %0, cntvct_el0" : "=r"(val));
49 return val;
50 }
51
delay(uint64_t cycles)52 static void FWK_SECTION(".system_ram") delay(uint64_t cycles)
53 {
54 uint64_t start = get_cntvct();
55
56 while ((get_cntvct() - start) < cycles)
57 cpu_relax();
58 }
59
udelay(unsigned long usec)60 void FWK_SECTION(".system_ram") udelay(unsigned long usec)
61 {
62 delay((uint64_t)usec * get_cntfrq() / 1000000);
63 }
64
mdelay(unsigned long msecs)65 void FWK_SECTION(".system_ram") mdelay(unsigned long msecs)
66 {
67 while (msecs--)
68 udelay(1000);
69 }
70