1 /*
2  * Arm SCP/MCP Software
3  * Copyright (c) 2018-2021, Arm Limited and Contributors. All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 
8 #include "low_level_access.h"
9 #include "synquacer_mmap.h"
10 
11 #include <stdint.h>
12 
13 #define REG_ADDR_OFFSET_BOOT_REMAP UINT32_C(0x000)
14 #define REG_ADDR_OFFSET_BOOT_FE UINT32_C(0x004)
15 #define REG_ADDR_OFFSET_BOOT_HSSPI UINT32_C(0x008)
16 #define REG_ADDR_OFFSET_BOOT_EMMC UINT32_C(0x010)
17 #define REG_ADDR_OFFSET_BOOT_MODE UINT32_C(0x014)
18 #define REG_ADDR_OFFSET_DSW3_STATUS UINT32_C(0x018)
19 
set_memory_remap(uint32_t value)20 void set_memory_remap(uint32_t value)
21 {
22     writel(
23         CONFIG_SOC_REG_ADDR_BOOT_CTL_TOP + REG_ADDR_OFFSET_BOOT_REMAP, value);
24 }
25 
get_dsw3_status(uint8_t bit_mask)26 uint8_t get_dsw3_status(uint8_t bit_mask)
27 {
28     uint8_t value =
29         readb(CONFIG_SOC_REG_ADDR_BOOT_CTL_TOP + REG_ADDR_OFFSET_DSW3_STATUS);
30 
31     return (value & bit_mask);
32 }
33