1 /*
2  * Arm SCP/MCP Software
3  * Copyright (c) 2018-2021, Arm Limited and Contributors. All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 
8 #include "low_level_access.h"
9 #include "synquacer_common.h"
10 
11 #include <internal/transaction_sw.h>
12 
13 #include <mod_synquacer_system.h>
14 
15 #include <fwk_log.h>
16 
17 #include <inttypes.h>
18 #include <stdint.h>
19 
20 #define STATUS_ADDR 4
21 
set_transactionsw_off(uint32_t transactionsw_reg_addr,uint32_t disable_bit)22 void set_transactionsw_off(
23     uint32_t transactionsw_reg_addr,
24     uint32_t disable_bit)
25 {
26     unsigned int intsts;
27     uint32_t value;
28 
29     FWK_LOG_INFO("  traSW disable_bit =  %08" PRIx32, disable_bit);
30 
31     DI(intsts);
32 
33     /* read transactionsw */
34     value = readl(transactionsw_reg_addr);
35 
36     /* Clear transationsw disable bit */
37     value &= (~disable_bit);
38 
39     /* transation sw enable */
40     writel(transactionsw_reg_addr, value);
41 
42     EI(intsts);
43 
44     /* setting wait */
45     while ((readl(transactionsw_reg_addr + STATUS_ADDR) & disable_bit) != 0)
46         continue;
47 }
48 
set_transactionsw_on(uint32_t transactionsw_reg_addr,uint32_t enable_bit)49 void set_transactionsw_on(uint32_t transactionsw_reg_addr, uint32_t enable_bit)
50 {
51     unsigned int intsts;
52     uint32_t value;
53 
54     FWK_LOG_INFO("  traSW enable_bit =  %08" PRIx32, enable_bit);
55 
56     DI(intsts);
57 
58     /* read transactionsw */
59     value = readl(transactionsw_reg_addr);
60 
61     /* Clear transactionsw disable bit */
62     value |= (enable_bit);
63 
64     /* transaction sw enable */
65     writel(transactionsw_reg_addr, value);
66 
67     EI(intsts);
68 
69     /* setting wait */
70     while ((readl(transactionsw_reg_addr + STATUS_ADDR) & enable_bit) !=
71            enable_bit) {
72         continue;
73     }
74 }
75