1 // SPDX-License-Identifier: BSD-2-Clause
2 /*
3  * Copyright 2017 NXP
4  *
5  * Peng Fan <peng.fan@nxp.com>
6  */
7 
8 #include <arm32.h>
9 #include <console.h>
10 #include <drivers/imx_uart.h>
11 #include <io.h>
12 #include <kernel/cache_helpers.h>
13 #include <kernel/boot.h>
14 #include <kernel/misc.h>
15 #include <kernel/panic.h>
16 #include <kernel/thread.h>
17 #include <kernel/tlb_helpers.h>
18 #include <kernel/tz_ssvce_pl310.h>
19 #include <mm/core_memprot.h>
20 #include <mm/core_mmu.h>
21 #include <platform_config.h>
22 #include <sm/optee_smc.h>
23 #include <sm/pm.h>
24 #include <sm/psci.h>
25 #include <sm/sm.h>
26 #include <stdint.h>
27 
28 #if CFG_TEE_CORE_NB_CORE > 4
29 #error "Max support 4 cores in one cluster now"
30 #endif
31 
sm_pm_cpu_suspend_save(struct sm_pm_ctx * ctx,uint32_t sp)32 void sm_pm_cpu_suspend_save(struct sm_pm_ctx *ctx, uint32_t sp)
33 {
34 	struct thread_core_local *p = thread_get_core_local();
35 
36 	p->sm_pm_ctx_phys = virt_to_phys((void *)ctx);
37 
38 	/* The content will be passed to sm_pm_cpu_do_resume as register sp */
39 	ctx->sp = sp;
40 	ctx->cpu_resume_addr =
41 		virt_to_phys((void *)(vaddr_t)sm_pm_cpu_do_resume);
42 
43 	sm_pm_cpu_do_suspend(ctx->suspend_regs);
44 
45 	dcache_op_level1(DCACHE_OP_CLEAN_INV);
46 
47 #ifdef CFG_PL310
48 	arm_cl2_cleanbyway(core_mmu_get_va(PL310_BASE, MEM_AREA_IO_SEC, 1));
49 #endif
50 }
51