1 /*
2 * Copyright (c) 2020, Intel Corporation. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include <lib/mmio.h>
8 #include <platform_def.h>
9
10 #include "socfpga_emac.h"
11 #include "socfpga_reset_manager.h"
12 #include "socfpga_system_manager.h"
13
socfpga_emac_init(void)14 void socfpga_emac_init(void)
15 {
16 mmio_setbits_32(SOCFPGA_RSTMGR(PER0MODRST),
17 RSTMGR_PER0MODRST_EMAC0 |
18 RSTMGR_PER0MODRST_EMAC1 |
19 RSTMGR_PER0MODRST_EMAC2);
20
21 mmio_clrsetbits_32(SOCFPGA_SYSMGR(EMAC_0),
22 PHY_INTF_SEL_MSK, EMAC0_PHY_MODE);
23 mmio_clrsetbits_32(SOCFPGA_SYSMGR(EMAC_1),
24 PHY_INTF_SEL_MSK, EMAC1_PHY_MODE);
25 mmio_clrsetbits_32(SOCFPGA_SYSMGR(EMAC_2),
26 PHY_INTF_SEL_MSK, EMAC2_PHY_MODE);
27
28 mmio_clrbits_32(SOCFPGA_SYSMGR(FPGAINTF_EN_3),
29 FPGAINTF_EN_3_EMAC_MSK(0) |
30 FPGAINTF_EN_3_EMAC_MSK(1) |
31 FPGAINTF_EN_3_EMAC_MSK(2));
32
33 mmio_clrbits_32(SOCFPGA_RSTMGR(PER0MODRST),
34 RSTMGR_PER0MODRST_EMAC0 |
35 RSTMGR_PER0MODRST_EMAC1 |
36 RSTMGR_PER0MODRST_EMAC2);
37 }
38
39