1 // SPDX-License-Identifier: BSD-2-Clause
2 /*
3 * Copyright (c) 2020-2021, Linaro Limited.
4 * Copyright (c) 2019-2021, Arm Limited. All rights reserved.
5 */
6
7 #include <assert.h>
8 #include <ffa.h>
9 #include <initcall.h>
10 #include <io.h>
11 #include <kernel/interrupt.h>
12 #include <kernel/panic.h>
13 #include <kernel/secure_partition.h>
14 #include <kernel/spinlock.h>
15 #include <kernel/spmc_sp_handler.h>
16 #include <kernel/tee_misc.h>
17 #include <kernel/thread.h>
18 #include <kernel/thread_private.h>
19 #include <kernel/thread_spmc.h>
20 #include <mm/core_mmu.h>
21 #include <mm/mobj.h>
22 #include <optee_ffa.h>
23 #include <optee_msg.h>
24 #include <optee_rpc_cmd.h>
25 #include <string.h>
26 #include <sys/queue.h>
27 #include <tee/entry_std.h>
28 #include <tee/uuid.h>
29 #include <util.h>
30
31 #if defined(CFG_CORE_SEL1_SPMC)
32 struct mem_share_state {
33 struct mobj_ffa *mf;
34 unsigned int page_count;
35 unsigned int region_count;
36 unsigned int current_page_idx;
37 };
38
39 struct mem_frag_state {
40 struct mem_share_state share;
41 tee_mm_entry_t *mm;
42 unsigned int frag_offset;
43 SLIST_ENTRY(mem_frag_state) link;
44 };
45 #endif
46
47 /* Initialized in spmc_init() below */
48 static uint16_t my_endpoint_id;
49
50 /*
51 * If struct ffa_rxtx::size is 0 RX/TX buffers are not mapped or initialized.
52 *
53 * struct ffa_rxtx::spin_lock protects the variables below from concurrent
54 * access this includes the use of content of struct ffa_rxtx::rx and
55 * @frag_state_head.
56 *
57 * struct ffa_rxtx::tx_buf_is_mine is true when we may write to struct
58 * ffa_rxtx::tx and false when it is owned by normal world.
59 *
60 * Note that we can't prevent normal world from updating the content of
61 * these buffers so we must always be careful when reading. while we hold
62 * the lock.
63 */
64
65 #ifdef CFG_CORE_SEL1_SPMC
66 static struct ffa_rxtx nw_rxtx;
67
is_nw_buf(struct ffa_rxtx * rxtx)68 static bool is_nw_buf(struct ffa_rxtx *rxtx)
69 {
70 return rxtx == &nw_rxtx;
71 }
72
73 static SLIST_HEAD(mem_frag_state_head, mem_frag_state) frag_state_head =
74 SLIST_HEAD_INITIALIZER(&frag_state_head);
75 #else
76 static uint8_t __rx_buf[SMALL_PAGE_SIZE] __aligned(SMALL_PAGE_SIZE);
77 static uint8_t __tx_buf[SMALL_PAGE_SIZE] __aligned(SMALL_PAGE_SIZE);
78 static struct ffa_rxtx nw_rxtx = { .rx = __rx_buf, .tx = __tx_buf };
79 #endif
80
swap_src_dst(uint32_t src_dst)81 static uint32_t swap_src_dst(uint32_t src_dst)
82 {
83 return (src_dst >> 16) | (src_dst << 16);
84 }
85
spmc_set_args(struct thread_smc_args * args,uint32_t fid,uint32_t src_dst,uint32_t w2,uint32_t w3,uint32_t w4,uint32_t w5)86 void spmc_set_args(struct thread_smc_args *args, uint32_t fid, uint32_t src_dst,
87 uint32_t w2, uint32_t w3, uint32_t w4, uint32_t w5)
88 {
89 *args = (struct thread_smc_args){ .a0 = fid,
90 .a1 = src_dst,
91 .a2 = w2,
92 .a3 = w3,
93 .a4 = w4,
94 .a5 = w5, };
95 }
96
97 #if defined(CFG_CORE_SEL1_SPMC)
spmc_handle_version(struct thread_smc_args * args)98 void spmc_handle_version(struct thread_smc_args *args)
99 {
100 /*
101 * We currently only support one version, 1.0 so let's keep it
102 * simple.
103 */
104 spmc_set_args(args,
105 MAKE_FFA_VERSION(FFA_VERSION_MAJOR, FFA_VERSION_MINOR),
106 FFA_PARAM_MBZ, FFA_PARAM_MBZ, FFA_PARAM_MBZ,
107 FFA_PARAM_MBZ, FFA_PARAM_MBZ);
108 }
109
handle_features(struct thread_smc_args * args)110 static void handle_features(struct thread_smc_args *args)
111 {
112 uint32_t ret_fid = 0;
113 uint32_t ret_w2 = FFA_PARAM_MBZ;
114
115 switch (args->a1) {
116 #ifdef ARM64
117 case FFA_RXTX_MAP_64:
118 #endif
119 case FFA_RXTX_MAP_32:
120 ret_fid = FFA_SUCCESS_32;
121 ret_w2 = 0; /* 4kB Minimum buffer size and alignment boundary */
122 break;
123 #ifdef ARM64
124 case FFA_MEM_SHARE_64:
125 #endif
126 case FFA_MEM_SHARE_32:
127 ret_fid = FFA_SUCCESS_32;
128 /*
129 * Partition manager supports transmission of a memory
130 * transaction descriptor in a buffer dynamically allocated
131 * by the endpoint.
132 */
133 ret_w2 = BIT(0);
134 break;
135
136 case FFA_ERROR:
137 case FFA_VERSION:
138 case FFA_SUCCESS_32:
139 #ifdef ARM64
140 case FFA_SUCCESS_64:
141 #endif
142 case FFA_MEM_FRAG_TX:
143 case FFA_MEM_RECLAIM:
144 case FFA_MSG_SEND_DIRECT_REQ_32:
145 case FFA_INTERRUPT:
146 case FFA_PARTITION_INFO_GET:
147 case FFA_RX_RELEASE:
148 ret_fid = FFA_SUCCESS_32;
149 break;
150 default:
151 ret_fid = FFA_ERROR;
152 ret_w2 = FFA_NOT_SUPPORTED;
153 break;
154 }
155
156 spmc_set_args(args, ret_fid, FFA_PARAM_MBZ, ret_w2, FFA_PARAM_MBZ,
157 FFA_PARAM_MBZ, FFA_PARAM_MBZ);
158 }
159
map_buf(paddr_t pa,unsigned int sz,void ** va_ret)160 static int map_buf(paddr_t pa, unsigned int sz, void **va_ret)
161 {
162 tee_mm_entry_t *mm = NULL;
163
164 if (!core_pbuf_is(CORE_MEM_NON_SEC, pa, sz))
165 return FFA_INVALID_PARAMETERS;
166
167 mm = tee_mm_alloc(&tee_mm_shm, sz);
168 if (!mm)
169 return FFA_NO_MEMORY;
170
171 if (core_mmu_map_contiguous_pages(tee_mm_get_smem(mm), pa,
172 sz / SMALL_PAGE_SIZE,
173 MEM_AREA_NSEC_SHM)) {
174 tee_mm_free(mm);
175 return FFA_INVALID_PARAMETERS;
176 }
177
178 *va_ret = (void *)tee_mm_get_smem(mm);
179 return 0;
180 }
181
unmap_buf(void * va,size_t sz)182 static void unmap_buf(void *va, size_t sz)
183 {
184 tee_mm_entry_t *mm = tee_mm_find(&tee_mm_shm, (vaddr_t)va);
185
186 assert(mm);
187 core_mmu_unmap_pages(tee_mm_get_smem(mm), sz / SMALL_PAGE_SIZE);
188 tee_mm_free(mm);
189 }
190
spmc_handle_rxtx_map(struct thread_smc_args * args,struct ffa_rxtx * rxtx)191 void spmc_handle_rxtx_map(struct thread_smc_args *args, struct ffa_rxtx *rxtx)
192 {
193 int rc = 0;
194 uint32_t ret_fid = FFA_ERROR;
195 unsigned int sz = 0;
196 paddr_t rx_pa = 0;
197 paddr_t tx_pa = 0;
198 void *rx = NULL;
199 void *tx = NULL;
200
201 cpu_spin_lock(&rxtx->spinlock);
202
203 if (args->a3 & GENMASK_64(63, 6)) {
204 rc = FFA_INVALID_PARAMETERS;
205 goto out;
206 }
207
208 sz = args->a3 * SMALL_PAGE_SIZE;
209 if (!sz) {
210 rc = FFA_INVALID_PARAMETERS;
211 goto out;
212 }
213 /* TX/RX are swapped compared to the caller */
214 tx_pa = args->a2;
215 rx_pa = args->a1;
216
217 if (rxtx->size) {
218 rc = FFA_DENIED;
219 goto out;
220 }
221
222 /*
223 * If the buffer comes from a SP the address is virtual and already
224 * mapped.
225 */
226 if (is_nw_buf(rxtx)) {
227 rc = map_buf(tx_pa, sz, &tx);
228 if (rc)
229 goto out;
230 rc = map_buf(rx_pa, sz, &rx);
231 if (rc) {
232 unmap_buf(tx, sz);
233 goto out;
234 }
235 rxtx->tx = tx;
236 rxtx->rx = rx;
237 } else {
238 if ((tx_pa & SMALL_PAGE_MASK) || (rx_pa & SMALL_PAGE_MASK)) {
239 rc = FFA_INVALID_PARAMETERS;
240 goto out;
241 }
242
243 if (!virt_to_phys((void *)tx_pa) ||
244 !virt_to_phys((void *)rx_pa)) {
245 rc = FFA_INVALID_PARAMETERS;
246 goto out;
247 }
248
249 rxtx->tx = (void *)tx_pa;
250 rxtx->rx = (void *)rx_pa;
251 }
252
253 rxtx->size = sz;
254 rxtx->tx_is_mine = true;
255 ret_fid = FFA_SUCCESS_32;
256 DMSG("Mapped tx %#"PRIxPA" size %#x @ %p", tx_pa, sz, tx);
257 DMSG("Mapped rx %#"PRIxPA" size %#x @ %p", rx_pa, sz, rx);
258 out:
259 cpu_spin_unlock(&rxtx->spinlock);
260 spmc_set_args(args, ret_fid, FFA_PARAM_MBZ, rc, FFA_PARAM_MBZ,
261 FFA_PARAM_MBZ, FFA_PARAM_MBZ);
262 }
263
spmc_handle_rxtx_unmap(struct thread_smc_args * args,struct ffa_rxtx * rxtx)264 void spmc_handle_rxtx_unmap(struct thread_smc_args *args, struct ffa_rxtx *rxtx)
265 {
266 uint32_t ret_fid = FFA_ERROR;
267 int rc = FFA_INVALID_PARAMETERS;
268
269 cpu_spin_lock(&rxtx->spinlock);
270
271 if (!rxtx->size)
272 goto out;
273
274 /* We don't unmap the SP memory as the SP might still use it */
275 if (is_nw_buf(rxtx)) {
276 unmap_buf(rxtx->rx, rxtx->size);
277 unmap_buf(rxtx->tx, rxtx->size);
278 }
279 rxtx->size = 0;
280 rxtx->rx = NULL;
281 rxtx->tx = NULL;
282 ret_fid = FFA_SUCCESS_32;
283 rc = 0;
284 out:
285 cpu_spin_unlock(&rxtx->spinlock);
286 spmc_set_args(args, ret_fid, FFA_PARAM_MBZ, rc, FFA_PARAM_MBZ,
287 FFA_PARAM_MBZ, FFA_PARAM_MBZ);
288 }
289
spmc_handle_rx_release(struct thread_smc_args * args,struct ffa_rxtx * rxtx)290 void spmc_handle_rx_release(struct thread_smc_args *args, struct ffa_rxtx *rxtx)
291 {
292 uint32_t ret_fid = 0;
293 int rc = 0;
294
295 cpu_spin_lock(&rxtx->spinlock);
296 /* The senders RX is our TX */
297 if (!rxtx->size || rxtx->tx_is_mine) {
298 ret_fid = FFA_ERROR;
299 rc = FFA_DENIED;
300 } else {
301 ret_fid = FFA_SUCCESS_32;
302 rc = 0;
303 rxtx->tx_is_mine = true;
304 }
305 cpu_spin_unlock(&rxtx->spinlock);
306
307 spmc_set_args(args, ret_fid, FFA_PARAM_MBZ, rc, FFA_PARAM_MBZ,
308 FFA_PARAM_MBZ, FFA_PARAM_MBZ);
309 }
310
is_nil_uuid(uint32_t w0,uint32_t w1,uint32_t w2,uint32_t w3)311 static bool is_nil_uuid(uint32_t w0, uint32_t w1, uint32_t w2, uint32_t w3)
312 {
313 return !w0 && !w1 && !w2 && !w3;
314 }
315
is_my_uuid(uint32_t w0,uint32_t w1,uint32_t w2,uint32_t w3)316 static bool is_my_uuid(uint32_t w0, uint32_t w1, uint32_t w2, uint32_t w3)
317 {
318 /*
319 * This depends on which UUID we have been assigned.
320 * TODO add a generic mechanism to obtain our UUID.
321 *
322 * The test below is for the hard coded UUID
323 * 486178e0-e7f8-11e3-bc5e-0002a5d5c51b
324 */
325 return w0 == 0xe0786148 && w1 == 0xe311f8e7 &&
326 w2 == 0x02005ebc && w3 == 0x1bc5d5a5;
327 }
328
spmc_fill_partition_entry(struct ffa_partition_info * fpi,uint16_t endpoint_id,uint16_t execution_context)329 void spmc_fill_partition_entry(struct ffa_partition_info *fpi,
330 uint16_t endpoint_id, uint16_t execution_context)
331 {
332 fpi->id = endpoint_id;
333 /* Number of execution contexts implemented by this partition */
334 fpi->execution_context = execution_context;
335
336 fpi->partition_properties = FFA_PARTITION_DIRECT_REQ_RECV_SUPPORT |
337 FFA_PARTITION_DIRECT_REQ_SEND_SUPPORT;
338 }
339
handle_partition_info_get_all(size_t * elem_count,struct ffa_rxtx * rxtx)340 static uint32_t handle_partition_info_get_all(size_t *elem_count,
341 struct ffa_rxtx *rxtx)
342 {
343 struct ffa_partition_info *fpi = rxtx->tx;
344
345 /* Add OP-TEE SP */
346 spmc_fill_partition_entry(fpi, my_endpoint_id, CFG_TEE_CORE_NB_CORE);
347 rxtx->tx_is_mine = false;
348 *elem_count = 1;
349 fpi++;
350
351 if (IS_ENABLED(CFG_SECURE_PARTITION)) {
352 size_t count = (rxtx->size / sizeof(*fpi)) - 1;
353
354 if (sp_partition_info_get_all(fpi, &count))
355 return FFA_NO_MEMORY;
356 *elem_count += count;
357 }
358
359 return FFA_OK;
360 }
361
spmc_handle_partition_info_get(struct thread_smc_args * args,struct ffa_rxtx * rxtx)362 void spmc_handle_partition_info_get(struct thread_smc_args *args,
363 struct ffa_rxtx *rxtx)
364 {
365 uint32_t ret_fid = FFA_ERROR;
366 uint32_t rc = 0;
367 uint32_t endpoint_id = my_endpoint_id;
368 struct ffa_partition_info *fpi = NULL;
369
370 cpu_spin_lock(&rxtx->spinlock);
371
372 if (!rxtx->size || !rxtx->tx_is_mine) {
373 if (rxtx->size)
374 rc = FFA_BUSY;
375 else
376 rc = FFA_DENIED; /* TX buffer not setup yet */
377 goto out;
378 }
379
380 fpi = rxtx->tx;
381
382 if (rxtx->size < sizeof(*fpi)) {
383 ret_fid = FFA_ERROR;
384 rc = FFA_NO_MEMORY;
385 goto out;
386 }
387
388 if (is_nil_uuid(args->a1, args->a2, args->a3, args->a4)) {
389 size_t elem_count = 0;
390
391 ret_fid = handle_partition_info_get_all(&elem_count, rxtx);
392
393 if (ret_fid) {
394 rc = ret_fid;
395 ret_fid = FFA_ERROR;
396 } else {
397 ret_fid = FFA_SUCCESS_32;
398 rc = elem_count;
399 }
400
401 goto out;
402 }
403
404 if (is_my_uuid(args->a1, args->a2, args->a3, args->a4)) {
405 spmc_fill_partition_entry(fpi, endpoint_id,
406 CFG_TEE_CORE_NB_CORE);
407 } else if (IS_ENABLED(CFG_SECURE_PARTITION)) {
408 uint32_t uuid_array[4] = { 0 };
409 TEE_UUID uuid = { };
410 TEE_Result res = TEE_SUCCESS;
411
412 uuid_array[0] = args->a1;
413 uuid_array[1] = args->a2;
414 uuid_array[2] = args->a3;
415 uuid_array[3] = args->a4;
416 tee_uuid_from_octets(&uuid, (uint8_t *)uuid_array);
417
418 res = sp_find_session_id(&uuid, &endpoint_id);
419 if (res != TEE_SUCCESS) {
420 ret_fid = FFA_ERROR;
421 rc = FFA_INVALID_PARAMETERS;
422 goto out;
423 }
424 spmc_fill_partition_entry(fpi, endpoint_id, 1);
425 } else {
426 ret_fid = FFA_ERROR;
427 rc = FFA_INVALID_PARAMETERS;
428 goto out;
429 }
430
431 ret_fid = FFA_SUCCESS_32;
432 rxtx->tx_is_mine = false;
433 rc = 1;
434
435 out:
436 spmc_set_args(args, ret_fid, FFA_PARAM_MBZ, rc, FFA_PARAM_MBZ,
437 FFA_PARAM_MBZ, FFA_PARAM_MBZ);
438 cpu_spin_unlock(&rxtx->spinlock);
439 }
440 #endif /*CFG_CORE_SEL1_SPMC*/
441
handle_yielding_call(struct thread_smc_args * args)442 static void handle_yielding_call(struct thread_smc_args *args)
443 {
444 TEE_Result res = 0;
445
446 thread_check_canaries();
447
448 if (args->a3 == OPTEE_FFA_YIELDING_CALL_RESUME) {
449 /* Note connection to struct thread_rpc_arg::ret */
450 thread_resume_from_rpc(args->a7, args->a4, args->a5, args->a6,
451 0);
452 res = TEE_ERROR_BAD_PARAMETERS;
453 } else {
454 thread_alloc_and_run(args->a1, args->a3, args->a4, args->a5,
455 args->a6, args->a7);
456 res = TEE_ERROR_BUSY;
457 }
458 spmc_set_args(args, FFA_MSG_SEND_DIRECT_RESP_32,
459 swap_src_dst(args->a1), 0, res, 0, 0);
460 }
461
handle_unregister_shm(uint32_t a4,uint32_t a5)462 static uint32_t handle_unregister_shm(uint32_t a4, uint32_t a5)
463 {
464 uint64_t cookie = reg_pair_to_64(a5, a4);
465 uint32_t res = 0;
466
467 res = mobj_ffa_unregister_by_cookie(cookie);
468 switch (res) {
469 case TEE_SUCCESS:
470 case TEE_ERROR_ITEM_NOT_FOUND:
471 return 0;
472 case TEE_ERROR_BUSY:
473 EMSG("res %#"PRIx32, res);
474 return FFA_BUSY;
475 default:
476 EMSG("res %#"PRIx32, res);
477 return FFA_INVALID_PARAMETERS;
478 }
479 }
480
handle_blocking_call(struct thread_smc_args * args)481 static void handle_blocking_call(struct thread_smc_args *args)
482 {
483 switch (args->a3) {
484 case OPTEE_FFA_GET_API_VERSION:
485 spmc_set_args(args, FFA_MSG_SEND_DIRECT_RESP_32,
486 swap_src_dst(args->a1), 0,
487 OPTEE_FFA_VERSION_MAJOR, OPTEE_FFA_VERSION_MINOR,
488 0);
489 break;
490 case OPTEE_FFA_GET_OS_VERSION:
491 spmc_set_args(args, FFA_MSG_SEND_DIRECT_RESP_32,
492 swap_src_dst(args->a1), 0,
493 CFG_OPTEE_REVISION_MAJOR,
494 CFG_OPTEE_REVISION_MINOR, TEE_IMPL_GIT_SHA1);
495 break;
496 case OPTEE_FFA_EXCHANGE_CAPABILITIES:
497 spmc_set_args(args, FFA_MSG_SEND_DIRECT_RESP_32,
498 swap_src_dst(args->a1), 0, 0,
499 THREAD_RPC_MAX_NUM_PARAMS,
500 OPTEE_FFA_SEC_CAP_ARG_OFFSET);
501 break;
502 case OPTEE_FFA_UNREGISTER_SHM:
503 spmc_set_args(args, FFA_MSG_SEND_DIRECT_RESP_32,
504 swap_src_dst(args->a1), 0,
505 handle_unregister_shm(args->a4, args->a5), 0, 0);
506 break;
507 default:
508 EMSG("Unhandled blocking service ID %#"PRIx32,
509 (uint32_t)args->a3);
510 panic();
511 }
512 }
513
514 #if defined(CFG_CORE_SEL1_SPMC)
get_acc_perms(struct ffa_mem_access * mem_acc,unsigned int num_mem_accs,uint8_t * acc_perms,unsigned int * region_offs)515 static int get_acc_perms(struct ffa_mem_access *mem_acc,
516 unsigned int num_mem_accs, uint8_t *acc_perms,
517 unsigned int *region_offs)
518 {
519 unsigned int n = 0;
520
521 for (n = 0; n < num_mem_accs; n++) {
522 struct ffa_mem_access_perm *descr = &mem_acc[n].access_perm;
523
524 if (READ_ONCE(descr->endpoint_id) == my_endpoint_id) {
525 *acc_perms = READ_ONCE(descr->perm);
526 *region_offs = READ_ONCE(mem_acc[n].region_offs);
527 return 0;
528 }
529 }
530
531 return FFA_INVALID_PARAMETERS;
532 }
533
mem_share_init(void * buf,size_t blen,unsigned int * page_count,unsigned int * region_count,size_t * addr_range_offs)534 static int mem_share_init(void *buf, size_t blen, unsigned int *page_count,
535 unsigned int *region_count, size_t *addr_range_offs)
536 {
537 const uint8_t exp_mem_reg_attr = FFA_NORMAL_MEM_REG_ATTR;
538 const uint8_t exp_mem_acc_perm = FFA_MEM_ACC_RW;
539 struct ffa_mem_region *region_descr = NULL;
540 struct ffa_mem_transaction *descr = NULL;
541 unsigned int num_mem_accs = 0;
542 uint8_t mem_acc_perm = 0;
543 unsigned int region_descr_offs = 0;
544 size_t n = 0;
545
546 if (!IS_ALIGNED_WITH_TYPE(buf, struct ffa_mem_transaction) ||
547 blen < sizeof(struct ffa_mem_transaction))
548 return FFA_INVALID_PARAMETERS;
549
550 descr = buf;
551
552 /* Check that the endpoint memory access descriptor array fits */
553 num_mem_accs = READ_ONCE(descr->mem_access_count);
554 if (MUL_OVERFLOW(sizeof(struct ffa_mem_access), num_mem_accs, &n) ||
555 ADD_OVERFLOW(sizeof(*descr), n, &n) || n > blen)
556 return FFA_INVALID_PARAMETERS;
557
558 if (READ_ONCE(descr->mem_reg_attr) != exp_mem_reg_attr)
559 return FFA_INVALID_PARAMETERS;
560
561 /* Check that the access permissions matches what's expected */
562 if (get_acc_perms(descr->mem_access_array,
563 num_mem_accs, &mem_acc_perm, ®ion_descr_offs) ||
564 mem_acc_perm != exp_mem_acc_perm)
565 return FFA_INVALID_PARAMETERS;
566
567 /* Check that the Composite memory region descriptor fits */
568 if (ADD_OVERFLOW(region_descr_offs, sizeof(*region_descr), &n) ||
569 n > blen)
570 return FFA_INVALID_PARAMETERS;
571
572 if (!IS_ALIGNED_WITH_TYPE((vaddr_t)descr + region_descr_offs,
573 struct ffa_mem_region))
574 return FFA_INVALID_PARAMETERS;
575
576 region_descr = (struct ffa_mem_region *)((vaddr_t)descr +
577 region_descr_offs);
578 *page_count = READ_ONCE(region_descr->total_page_count);
579 *region_count = READ_ONCE(region_descr->address_range_count);
580 *addr_range_offs = n;
581 return 0;
582 }
583
add_mem_share_helper(struct mem_share_state * s,void * buf,size_t flen)584 static int add_mem_share_helper(struct mem_share_state *s, void *buf,
585 size_t flen)
586 {
587 unsigned int region_count = flen / sizeof(struct ffa_address_range);
588 struct ffa_address_range *arange = NULL;
589 unsigned int n = 0;
590
591 if (region_count > s->region_count)
592 region_count = s->region_count;
593
594 if (!IS_ALIGNED_WITH_TYPE(buf, struct ffa_address_range))
595 return FFA_INVALID_PARAMETERS;
596 arange = buf;
597
598 for (n = 0; n < region_count; n++) {
599 unsigned int page_count = READ_ONCE(arange[n].page_count);
600 uint64_t addr = READ_ONCE(arange[n].address);
601
602 if (mobj_ffa_add_pages_at(s->mf, &s->current_page_idx,
603 addr, page_count))
604 return FFA_INVALID_PARAMETERS;
605 }
606
607 s->region_count -= region_count;
608 if (s->region_count)
609 return region_count * sizeof(*arange);
610
611 if (s->current_page_idx != s->page_count)
612 return FFA_INVALID_PARAMETERS;
613
614 return 0;
615 }
616
add_mem_share_frag(struct mem_frag_state * s,void * buf,size_t flen)617 static int add_mem_share_frag(struct mem_frag_state *s, void *buf, size_t flen)
618 {
619 int rc = 0;
620
621 rc = add_mem_share_helper(&s->share, buf, flen);
622 if (rc >= 0) {
623 if (!ADD_OVERFLOW(s->frag_offset, rc, &s->frag_offset)) {
624 if (s->share.region_count)
625 return s->frag_offset;
626 /* We're done, return the number of consumed bytes */
627 rc = s->frag_offset;
628 } else {
629 rc = FFA_INVALID_PARAMETERS;
630 }
631 }
632
633 SLIST_REMOVE(&frag_state_head, s, mem_frag_state, link);
634 if (rc < 0)
635 mobj_ffa_sel1_spmc_delete(s->share.mf);
636 else
637 mobj_ffa_push_to_inactive(s->share.mf);
638 free(s);
639
640 return rc;
641 }
642
is_sp_share(void * buf)643 static bool is_sp_share(void *buf)
644 {
645 struct ffa_mem_transaction *input_descr = NULL;
646 struct ffa_mem_access_perm *perm = NULL;
647
648 if (!IS_ENABLED(CFG_SECURE_PARTITION))
649 return false;
650
651 input_descr = buf;
652 perm = &input_descr->mem_access_array[0].access_perm;
653
654 /*
655 * perm->endpoint_id is read here only to check if the endpoint is
656 * OP-TEE. We do read it later on again, but there are some additional
657 * checks there to make sure that the data is correct.
658 */
659 return READ_ONCE(perm->endpoint_id) != my_endpoint_id;
660 }
661
add_mem_share(tee_mm_entry_t * mm,void * buf,size_t blen,size_t flen,uint64_t * global_handle)662 static int add_mem_share(tee_mm_entry_t *mm, void *buf, size_t blen,
663 size_t flen, uint64_t *global_handle)
664 {
665 int rc = 0;
666 struct mem_share_state share = { };
667 size_t addr_range_offs = 0;
668 size_t n = 0;
669
670 if (flen > blen)
671 return FFA_INVALID_PARAMETERS;
672
673 rc = mem_share_init(buf, flen, &share.page_count, &share.region_count,
674 &addr_range_offs);
675 if (rc)
676 return rc;
677
678 if (MUL_OVERFLOW(share.region_count,
679 sizeof(struct ffa_address_range), &n) ||
680 ADD_OVERFLOW(n, addr_range_offs, &n) || n > blen)
681 return FFA_INVALID_PARAMETERS;
682
683 share.mf = mobj_ffa_sel1_spmc_new(share.page_count);
684 if (!share.mf)
685 return FFA_NO_MEMORY;
686
687 if (flen != blen) {
688 struct mem_frag_state *s = calloc(sizeof(*s), 1);
689
690 if (!s) {
691 rc = FFA_NO_MEMORY;
692 goto err;
693 }
694 s->share = share;
695 s->mm = mm;
696 s->frag_offset = addr_range_offs;
697
698 SLIST_INSERT_HEAD(&frag_state_head, s, link);
699 rc = add_mem_share_frag(s, (char *)buf + addr_range_offs,
700 flen - addr_range_offs);
701
702 if (rc >= 0)
703 *global_handle = mobj_ffa_get_cookie(share.mf);
704
705 return rc;
706 }
707
708 rc = add_mem_share_helper(&share, (char *)buf + addr_range_offs,
709 flen - addr_range_offs);
710 if (rc) {
711 /*
712 * Number of consumed bytes may be returned instead of 0 for
713 * done.
714 */
715 rc = FFA_INVALID_PARAMETERS;
716 goto err;
717 }
718
719 *global_handle = mobj_ffa_push_to_inactive(share.mf);
720
721 return 0;
722 err:
723 mobj_ffa_sel1_spmc_delete(share.mf);
724 return rc;
725 }
726
handle_mem_share_tmem(paddr_t pbuf,size_t blen,size_t flen,unsigned int page_count,uint64_t * global_handle,struct ffa_rxtx * rxtx)727 static int handle_mem_share_tmem(paddr_t pbuf, size_t blen, size_t flen,
728 unsigned int page_count,
729 uint64_t *global_handle, struct ffa_rxtx *rxtx)
730 {
731 int rc = 0;
732 size_t len = 0;
733 tee_mm_entry_t *mm = NULL;
734 vaddr_t offs = pbuf & SMALL_PAGE_MASK;
735
736 if (MUL_OVERFLOW(page_count, SMALL_PAGE_SIZE, &len))
737 return FFA_INVALID_PARAMETERS;
738 if (!core_pbuf_is(CORE_MEM_NON_SEC, pbuf, len))
739 return FFA_INVALID_PARAMETERS;
740
741 /*
742 * Check that the length reported in blen is covered by len even
743 * if the offset is taken into account.
744 */
745 if (len < blen || len - offs < blen)
746 return FFA_INVALID_PARAMETERS;
747
748 mm = tee_mm_alloc(&tee_mm_shm, len);
749 if (!mm)
750 return FFA_NO_MEMORY;
751
752 if (core_mmu_map_contiguous_pages(tee_mm_get_smem(mm), pbuf,
753 page_count, MEM_AREA_NSEC_SHM)) {
754 rc = FFA_INVALID_PARAMETERS;
755 goto out;
756 }
757
758 cpu_spin_lock(&rxtx->spinlock);
759 rc = add_mem_share(mm, (void *)(tee_mm_get_smem(mm) + offs), blen, flen,
760 global_handle);
761 cpu_spin_unlock(&rxtx->spinlock);
762 if (rc > 0)
763 return rc;
764
765 core_mmu_unmap_pages(tee_mm_get_smem(mm), page_count);
766 out:
767 tee_mm_free(mm);
768 return rc;
769 }
770
handle_mem_share_rxbuf(size_t blen,size_t flen,uint64_t * global_handle,struct ffa_rxtx * rxtx)771 static int handle_mem_share_rxbuf(size_t blen, size_t flen,
772 uint64_t *global_handle,
773 struct ffa_rxtx *rxtx)
774 {
775 int rc = FFA_DENIED;
776
777 cpu_spin_lock(&rxtx->spinlock);
778
779 if (rxtx->rx && flen <= rxtx->size) {
780 if (is_sp_share(rxtx->rx)) {
781 rc = spmc_sp_add_share(rxtx, blen,
782 global_handle, NULL);
783 } else {
784 rc = add_mem_share(NULL, rxtx->rx, blen, flen,
785 global_handle);
786 }
787 }
788
789 cpu_spin_unlock(&rxtx->spinlock);
790
791 return rc;
792 }
793
handle_mem_share(struct thread_smc_args * args,struct ffa_rxtx * rxtx)794 static void handle_mem_share(struct thread_smc_args *args,
795 struct ffa_rxtx *rxtx)
796 {
797 uint32_t ret_w1 = 0;
798 uint32_t ret_w2 = FFA_INVALID_PARAMETERS;
799 uint32_t ret_w3 = 0;
800 uint32_t ret_fid = FFA_ERROR;
801 uint64_t global_handle = 0;
802 int rc = 0;
803
804 /* Check that the MBZs are indeed 0 */
805 if (args->a5 || args->a6 || args->a7)
806 goto out;
807
808 if (!args->a3) {
809 /*
810 * The memory transaction descriptor is passed via our rx
811 * buffer.
812 */
813 if (args->a4)
814 goto out;
815 rc = handle_mem_share_rxbuf(args->a1, args->a2, &global_handle,
816 rxtx);
817 } else {
818 rc = handle_mem_share_tmem(args->a3, args->a1, args->a2,
819 args->a4, &global_handle, rxtx);
820 }
821 if (rc < 0) {
822 ret_w2 = rc;
823 goto out;
824 }
825 if (rc > 0) {
826 ret_fid = FFA_MEM_FRAG_RX;
827 ret_w3 = rc;
828 reg_pair_from_64(global_handle, &ret_w2, &ret_w1);
829 }
830 ret_fid = FFA_SUCCESS_32;
831 reg_pair_from_64(global_handle, &ret_w3, &ret_w2);
832 out:
833 spmc_set_args(args, ret_fid, ret_w1, ret_w2, ret_w3, 0, 0);
834 }
835
get_frag_state(uint64_t global_handle)836 static struct mem_frag_state *get_frag_state(uint64_t global_handle)
837 {
838 struct mem_frag_state *s = NULL;
839
840 SLIST_FOREACH(s, &frag_state_head, link)
841 if (mobj_ffa_get_cookie(s->share.mf) == global_handle)
842 return s;
843
844 return NULL;
845 }
846
handle_mem_frag_tx(struct thread_smc_args * args,struct ffa_rxtx * rxtx)847 static void handle_mem_frag_tx(struct thread_smc_args *args,
848 struct ffa_rxtx *rxtx)
849 {
850 int rc = 0;
851 uint64_t global_handle = reg_pair_to_64(READ_ONCE(args->a2),
852 READ_ONCE(args->a1));
853 size_t flen = READ_ONCE(args->a3);
854 struct mem_frag_state *s = NULL;
855 tee_mm_entry_t *mm = NULL;
856 unsigned int page_count = 0;
857 void *buf = NULL;
858 uint32_t ret_w1 = 0;
859 uint32_t ret_w2 = 0;
860 uint32_t ret_w3 = 0;
861 uint32_t ret_fid = 0;
862
863 /*
864 * Currently we're only doing this for fragmented FFA_MEM_SHARE_*
865 * requests.
866 */
867
868 cpu_spin_lock(&rxtx->spinlock);
869
870 s = get_frag_state(global_handle);
871 if (!s) {
872 rc = FFA_INVALID_PARAMETERS;
873 goto out;
874 }
875
876 mm = s->mm;
877 if (mm) {
878 if (flen > tee_mm_get_bytes(mm)) {
879 rc = FFA_INVALID_PARAMETERS;
880 goto out;
881 }
882 page_count = s->share.page_count;
883 buf = (void *)tee_mm_get_smem(mm);
884 } else {
885 if (flen > rxtx->size) {
886 rc = FFA_INVALID_PARAMETERS;
887 goto out;
888 }
889 buf = rxtx->rx;
890 }
891
892 rc = add_mem_share_frag(s, buf, flen);
893 out:
894 cpu_spin_unlock(&rxtx->spinlock);
895
896 if (rc <= 0 && mm) {
897 core_mmu_unmap_pages(tee_mm_get_smem(mm), page_count);
898 tee_mm_free(mm);
899 }
900
901 if (rc < 0) {
902 ret_fid = FFA_ERROR;
903 ret_w2 = rc;
904 } else if (rc > 0) {
905 ret_fid = FFA_MEM_FRAG_RX;
906 ret_w3 = rc;
907 reg_pair_from_64(global_handle, &ret_w2, &ret_w1);
908 } else {
909 ret_fid = FFA_SUCCESS_32;
910 reg_pair_from_64(global_handle, &ret_w3, &ret_w2);
911 }
912
913 spmc_set_args(args, ret_fid, ret_w1, ret_w2, ret_w3, 0, 0);
914 }
915
handle_mem_reclaim(struct thread_smc_args * args)916 static void handle_mem_reclaim(struct thread_smc_args *args)
917 {
918 uint32_t ret_val = FFA_INVALID_PARAMETERS;
919 uint32_t ret_fid = FFA_ERROR;
920 uint64_t cookie = 0;
921
922 if (args->a3 || args->a4 || args->a5 || args->a6 || args->a7)
923 goto out;
924
925 cookie = reg_pair_to_64(args->a2, args->a1);
926 switch (mobj_ffa_sel1_spmc_reclaim(cookie)) {
927 case TEE_SUCCESS:
928 ret_fid = FFA_SUCCESS_32;
929 ret_val = 0;
930 break;
931 case TEE_ERROR_ITEM_NOT_FOUND:
932 DMSG("cookie %#"PRIx64" not found", cookie);
933 ret_val = FFA_INVALID_PARAMETERS;
934 break;
935 default:
936 DMSG("cookie %#"PRIx64" busy", cookie);
937 ret_val = FFA_DENIED;
938 break;
939 }
940 out:
941 spmc_set_args(args, ret_fid, ret_val, 0, 0, 0, 0);
942 }
943 #endif
944
945 /* Only called from assembly */
946 void thread_spmc_msg_recv(struct thread_smc_args *args);
thread_spmc_msg_recv(struct thread_smc_args * args)947 void thread_spmc_msg_recv(struct thread_smc_args *args)
948 {
949 assert((thread_get_exceptions() & THREAD_EXCP_ALL) == THREAD_EXCP_ALL);
950 switch (args->a0) {
951 #if defined(CFG_CORE_SEL1_SPMC)
952 case FFA_VERSION:
953 spmc_handle_version(args);
954 break;
955 case FFA_FEATURES:
956 handle_features(args);
957 break;
958 #ifdef ARM64
959 case FFA_RXTX_MAP_64:
960 #endif
961 case FFA_RXTX_MAP_32:
962 spmc_handle_rxtx_map(args, &nw_rxtx);
963 break;
964 case FFA_RXTX_UNMAP:
965 spmc_handle_rxtx_unmap(args, &nw_rxtx);
966 break;
967 case FFA_RX_RELEASE:
968 spmc_handle_rx_release(args, &nw_rxtx);
969 break;
970 case FFA_PARTITION_INFO_GET:
971 spmc_handle_partition_info_get(args, &nw_rxtx);
972 break;
973 #endif /*CFG_CORE_SEL1_SPMC*/
974 case FFA_INTERRUPT:
975 itr_core_handler();
976 spmc_set_args(args, FFA_MSG_WAIT, 0, 0, 0, 0, 0);
977 break;
978 #ifdef ARM64
979 case FFA_MSG_SEND_DIRECT_REQ_64:
980 #endif
981 case FFA_MSG_SEND_DIRECT_REQ_32:
982 if (IS_ENABLED(CFG_SECURE_PARTITION) &&
983 FFA_DST(args->a1) != my_endpoint_id) {
984 spmc_sp_start_thread(args);
985 break;
986 }
987
988 if (args->a3 & BIT32(OPTEE_FFA_YIELDING_CALL_BIT))
989 handle_yielding_call(args);
990 else
991 handle_blocking_call(args);
992 break;
993 #if defined(CFG_CORE_SEL1_SPMC)
994 #ifdef ARM64
995 case FFA_MEM_SHARE_64:
996 #endif
997 case FFA_MEM_SHARE_32:
998 handle_mem_share(args, &nw_rxtx);
999 break;
1000 case FFA_MEM_RECLAIM:
1001 if (!IS_ENABLED(CFG_SECURE_PARTITION) ||
1002 !ffa_mem_reclaim(args, NULL))
1003 handle_mem_reclaim(args);
1004 break;
1005 case FFA_MEM_FRAG_TX:
1006 handle_mem_frag_tx(args, &nw_rxtx);
1007 break;
1008 #endif /*CFG_CORE_SEL1_SPMC*/
1009 default:
1010 EMSG("Unhandled FFA function ID %#"PRIx32, (uint32_t)args->a0);
1011 spmc_set_args(args, FFA_ERROR, FFA_PARAM_MBZ, FFA_NOT_SUPPORTED,
1012 FFA_PARAM_MBZ, FFA_PARAM_MBZ, FFA_PARAM_MBZ);
1013 }
1014 }
1015
yielding_call_with_arg(uint64_t cookie,uint32_t offset)1016 static TEE_Result yielding_call_with_arg(uint64_t cookie, uint32_t offset)
1017 {
1018 size_t sz_rpc = OPTEE_MSG_GET_ARG_SIZE(THREAD_RPC_MAX_NUM_PARAMS);
1019 struct thread_ctx *thr = threads + thread_get_id();
1020 TEE_Result res = TEE_ERROR_BAD_PARAMETERS;
1021 struct optee_msg_arg *arg = NULL;
1022 struct mobj *mobj = NULL;
1023 uint32_t num_params = 0;
1024 size_t sz = 0;
1025
1026 mobj = mobj_ffa_get_by_cookie(cookie, 0);
1027 if (!mobj) {
1028 EMSG("Can't find cookie %#"PRIx64, cookie);
1029 return TEE_ERROR_BAD_PARAMETERS;
1030 }
1031
1032 res = mobj_inc_map(mobj);
1033 if (res)
1034 goto out_put_mobj;
1035
1036 res = TEE_ERROR_BAD_PARAMETERS;
1037 arg = mobj_get_va(mobj, offset, sizeof(*arg));
1038 if (!arg)
1039 goto out_dec_map;
1040
1041 num_params = READ_ONCE(arg->num_params);
1042 if (num_params > OPTEE_MSG_MAX_NUM_PARAMS)
1043 goto out_dec_map;
1044
1045 sz = OPTEE_MSG_GET_ARG_SIZE(num_params);
1046
1047 thr->rpc_arg = mobj_get_va(mobj, offset + sz, sz_rpc);
1048 if (!thr->rpc_arg)
1049 goto out_dec_map;
1050
1051 res = tee_entry_std(arg, num_params);
1052
1053 thread_rpc_shm_cache_clear(&thr->shm_cache);
1054 thr->rpc_arg = NULL;
1055
1056 out_dec_map:
1057 mobj_dec_map(mobj);
1058 out_put_mobj:
1059 mobj_put(mobj);
1060 return res;
1061 }
1062
1063 /*
1064 * Helper routine for the assembly function thread_std_smc_entry()
1065 *
1066 * Note: this function is weak just to make link_dummies_paged.c happy.
1067 */
__thread_std_smc_entry(uint32_t a0,uint32_t a1,uint32_t a2,uint32_t a3,uint32_t a4,uint32_t a5 __unused)1068 uint32_t __weak __thread_std_smc_entry(uint32_t a0, uint32_t a1,
1069 uint32_t a2, uint32_t a3,
1070 uint32_t a4, uint32_t a5 __unused)
1071 {
1072 /*
1073 * Arguments are supplied from handle_yielding_call() as:
1074 * a0 <- w1
1075 * a1 <- w3
1076 * a2 <- w4
1077 * a3 <- w5
1078 * a4 <- w6
1079 * a5 <- w7
1080 */
1081 thread_get_tsd()->rpc_target_info = swap_src_dst(a0);
1082 if (a1 == OPTEE_FFA_YIELDING_CALL_WITH_ARG)
1083 return yielding_call_with_arg(reg_pair_to_64(a3, a2), a4);
1084 return FFA_DENIED;
1085 }
1086
set_fmem(struct optee_msg_param * param,struct thread_param * tpm)1087 static bool set_fmem(struct optee_msg_param *param, struct thread_param *tpm)
1088 {
1089 uint64_t offs = tpm->u.memref.offs;
1090
1091 param->attr = tpm->attr - THREAD_PARAM_ATTR_MEMREF_IN +
1092 OPTEE_MSG_ATTR_TYPE_FMEM_INPUT;
1093
1094 param->u.fmem.offs_low = offs;
1095 param->u.fmem.offs_high = offs >> 32;
1096 if (param->u.fmem.offs_high != offs >> 32)
1097 return false;
1098
1099 param->u.fmem.size = tpm->u.memref.size;
1100 if (tpm->u.memref.mobj) {
1101 uint64_t cookie = mobj_get_cookie(tpm->u.memref.mobj);
1102
1103 /* If a mobj is passed it better be one with a valid cookie. */
1104 if (cookie == OPTEE_MSG_FMEM_INVALID_GLOBAL_ID)
1105 return false;
1106 param->u.fmem.global_id = cookie;
1107 } else {
1108 param->u.fmem.global_id = OPTEE_MSG_FMEM_INVALID_GLOBAL_ID;
1109 }
1110
1111 return true;
1112 }
1113
get_rpc_arg(uint32_t cmd,size_t num_params,struct thread_param * params,struct optee_msg_arg ** arg_ret)1114 static uint32_t get_rpc_arg(uint32_t cmd, size_t num_params,
1115 struct thread_param *params,
1116 struct optee_msg_arg **arg_ret)
1117 {
1118 size_t sz = OPTEE_MSG_GET_ARG_SIZE(THREAD_RPC_MAX_NUM_PARAMS);
1119 struct thread_ctx *thr = threads + thread_get_id();
1120 struct optee_msg_arg *arg = thr->rpc_arg;
1121
1122 if (num_params > THREAD_RPC_MAX_NUM_PARAMS)
1123 return TEE_ERROR_BAD_PARAMETERS;
1124
1125 if (!arg) {
1126 EMSG("rpc_arg not set");
1127 return TEE_ERROR_GENERIC;
1128 }
1129
1130 memset(arg, 0, sz);
1131 arg->cmd = cmd;
1132 arg->num_params = num_params;
1133 arg->ret = TEE_ERROR_GENERIC; /* in case value isn't updated */
1134
1135 for (size_t n = 0; n < num_params; n++) {
1136 switch (params[n].attr) {
1137 case THREAD_PARAM_ATTR_NONE:
1138 arg->params[n].attr = OPTEE_MSG_ATTR_TYPE_NONE;
1139 break;
1140 case THREAD_PARAM_ATTR_VALUE_IN:
1141 case THREAD_PARAM_ATTR_VALUE_OUT:
1142 case THREAD_PARAM_ATTR_VALUE_INOUT:
1143 arg->params[n].attr = params[n].attr -
1144 THREAD_PARAM_ATTR_VALUE_IN +
1145 OPTEE_MSG_ATTR_TYPE_VALUE_INPUT;
1146 arg->params[n].u.value.a = params[n].u.value.a;
1147 arg->params[n].u.value.b = params[n].u.value.b;
1148 arg->params[n].u.value.c = params[n].u.value.c;
1149 break;
1150 case THREAD_PARAM_ATTR_MEMREF_IN:
1151 case THREAD_PARAM_ATTR_MEMREF_OUT:
1152 case THREAD_PARAM_ATTR_MEMREF_INOUT:
1153 if (!set_fmem(arg->params + n, params + n))
1154 return TEE_ERROR_BAD_PARAMETERS;
1155 break;
1156 default:
1157 return TEE_ERROR_BAD_PARAMETERS;
1158 }
1159 }
1160
1161 if (arg_ret)
1162 *arg_ret = arg;
1163
1164 return TEE_SUCCESS;
1165 }
1166
get_rpc_arg_res(struct optee_msg_arg * arg,size_t num_params,struct thread_param * params)1167 static uint32_t get_rpc_arg_res(struct optee_msg_arg *arg, size_t num_params,
1168 struct thread_param *params)
1169 {
1170 for (size_t n = 0; n < num_params; n++) {
1171 switch (params[n].attr) {
1172 case THREAD_PARAM_ATTR_VALUE_OUT:
1173 case THREAD_PARAM_ATTR_VALUE_INOUT:
1174 params[n].u.value.a = arg->params[n].u.value.a;
1175 params[n].u.value.b = arg->params[n].u.value.b;
1176 params[n].u.value.c = arg->params[n].u.value.c;
1177 break;
1178 case THREAD_PARAM_ATTR_MEMREF_OUT:
1179 case THREAD_PARAM_ATTR_MEMREF_INOUT:
1180 params[n].u.memref.size = arg->params[n].u.fmem.size;
1181 break;
1182 default:
1183 break;
1184 }
1185 }
1186
1187 return arg->ret;
1188 }
1189
thread_rpc_cmd(uint32_t cmd,size_t num_params,struct thread_param * params)1190 uint32_t thread_rpc_cmd(uint32_t cmd, size_t num_params,
1191 struct thread_param *params)
1192 {
1193 struct thread_rpc_arg rpc_arg = { .call = {
1194 .w1 = thread_get_tsd()->rpc_target_info,
1195 .w4 = OPTEE_FFA_YIELDING_CALL_RETURN_RPC_CMD,
1196 },
1197 };
1198 struct optee_msg_arg *arg = NULL;
1199 uint32_t ret = 0;
1200
1201 ret = get_rpc_arg(cmd, num_params, params, &arg);
1202 if (ret)
1203 return ret;
1204
1205 thread_rpc(&rpc_arg);
1206
1207 return get_rpc_arg_res(arg, num_params, params);
1208 }
1209
thread_rpc_free(unsigned int bt,uint64_t cookie,struct mobj * mobj)1210 static void thread_rpc_free(unsigned int bt, uint64_t cookie, struct mobj *mobj)
1211 {
1212 struct thread_rpc_arg rpc_arg = { .call = {
1213 .w1 = thread_get_tsd()->rpc_target_info,
1214 .w4 = OPTEE_FFA_YIELDING_CALL_RETURN_RPC_CMD,
1215 },
1216 };
1217 struct thread_param param = THREAD_PARAM_VALUE(IN, bt, cookie, 0);
1218 uint32_t res2 = 0;
1219 uint32_t res = 0;
1220
1221 DMSG("freeing cookie %#"PRIx64, cookie);
1222
1223 res = get_rpc_arg(OPTEE_RPC_CMD_SHM_FREE, 1, ¶m, NULL);
1224
1225 mobj_put(mobj);
1226 res2 = mobj_ffa_unregister_by_cookie(cookie);
1227 if (res2)
1228 DMSG("mobj_ffa_unregister_by_cookie(%#"PRIx64"): %#"PRIx32,
1229 cookie, res2);
1230 if (!res)
1231 thread_rpc(&rpc_arg);
1232 }
1233
thread_rpc_alloc(size_t size,size_t align,unsigned int bt)1234 static struct mobj *thread_rpc_alloc(size_t size, size_t align, unsigned int bt)
1235 {
1236 struct thread_rpc_arg rpc_arg = { .call = {
1237 .w1 = thread_get_tsd()->rpc_target_info,
1238 .w4 = OPTEE_FFA_YIELDING_CALL_RETURN_RPC_CMD,
1239 },
1240 };
1241 struct thread_param param = THREAD_PARAM_VALUE(IN, bt, size, align);
1242 struct optee_msg_arg *arg = NULL;
1243 unsigned int internal_offset = 0;
1244 struct mobj *mobj = NULL;
1245 uint64_t cookie = 0;
1246
1247 if (get_rpc_arg(OPTEE_RPC_CMD_SHM_ALLOC, 1, ¶m, &arg))
1248 return NULL;
1249
1250 thread_rpc(&rpc_arg);
1251
1252 if (arg->num_params != 1 ||
1253 arg->params->attr != OPTEE_MSG_ATTR_TYPE_FMEM_OUTPUT)
1254 return NULL;
1255
1256 internal_offset = READ_ONCE(arg->params->u.fmem.internal_offs);
1257 cookie = READ_ONCE(arg->params->u.fmem.global_id);
1258 mobj = mobj_ffa_get_by_cookie(cookie, internal_offset);
1259 if (!mobj) {
1260 DMSG("mobj_ffa_get_by_cookie(%#"PRIx64", %#x): failed",
1261 cookie, internal_offset);
1262 return NULL;
1263 }
1264
1265 assert(mobj_is_nonsec(mobj));
1266
1267 if (mobj->size < size) {
1268 DMSG("Mobj %#"PRIx64": wrong size", cookie);
1269 mobj_put(mobj);
1270 return NULL;
1271 }
1272
1273 if (mobj_inc_map(mobj)) {
1274 DMSG("mobj_inc_map(%#"PRIx64"): failed", cookie);
1275 mobj_put(mobj);
1276 return NULL;
1277 }
1278
1279 return mobj;
1280 }
1281
thread_rpc_alloc_payload(size_t size)1282 struct mobj *thread_rpc_alloc_payload(size_t size)
1283 {
1284 return thread_rpc_alloc(size, 8, OPTEE_RPC_SHM_TYPE_APPL);
1285 }
1286
thread_rpc_alloc_kernel_payload(size_t size)1287 struct mobj *thread_rpc_alloc_kernel_payload(size_t size)
1288 {
1289 return thread_rpc_alloc(size, 8, OPTEE_RPC_SHM_TYPE_KERNEL);
1290 }
1291
thread_rpc_free_kernel_payload(struct mobj * mobj)1292 void thread_rpc_free_kernel_payload(struct mobj *mobj)
1293 {
1294 thread_rpc_free(OPTEE_RPC_SHM_TYPE_KERNEL, mobj_get_cookie(mobj), mobj);
1295 }
1296
thread_rpc_free_payload(struct mobj * mobj)1297 void thread_rpc_free_payload(struct mobj *mobj)
1298 {
1299 thread_rpc_free(OPTEE_RPC_SHM_TYPE_APPL, mobj_get_cookie(mobj),
1300 mobj);
1301 }
1302
thread_rpc_alloc_global_payload(size_t size)1303 struct mobj *thread_rpc_alloc_global_payload(size_t size)
1304 {
1305 return thread_rpc_alloc(size, 8, OPTEE_RPC_SHM_TYPE_GLOBAL);
1306 }
1307
thread_rpc_free_global_payload(struct mobj * mobj)1308 void thread_rpc_free_global_payload(struct mobj *mobj)
1309 {
1310 thread_rpc_free(OPTEE_RPC_SHM_TYPE_GLOBAL, mobj_get_cookie(mobj),
1311 mobj);
1312 }
1313
thread_spmc_register_secondary_ep(vaddr_t ep)1314 void thread_spmc_register_secondary_ep(vaddr_t ep)
1315 {
1316 unsigned long ret = 0;
1317
1318 /* Let the SPM know the entry point for secondary CPUs */
1319 ret = thread_smc(FFA_SECONDARY_EP_REGISTER_64, ep, 0, 0);
1320
1321 if (ret != FFA_SUCCESS_32 && ret != FFA_SUCCESS_64)
1322 EMSG("FFA_SECONDARY_EP_REGISTER_64 ret %#lx", ret);
1323 }
1324
1325 #if defined(CFG_CORE_SEL1_SPMC)
spmc_init(void)1326 static TEE_Result spmc_init(void)
1327 {
1328 my_endpoint_id = SPMC_ENDPOINT_ID;
1329 DMSG("My endpoint ID %#x", my_endpoint_id);
1330
1331 return TEE_SUCCESS;
1332 }
1333 #else /* !defined(CFG_CORE_SEL1_SPMC) */
is_ffa_success(uint32_t fid)1334 static bool is_ffa_success(uint32_t fid)
1335 {
1336 #ifdef ARM64
1337 if (fid == FFA_SUCCESS_64)
1338 return true;
1339 #endif
1340 return fid == FFA_SUCCESS_32;
1341 }
1342
spmc_rxtx_map(struct ffa_rxtx * rxtx)1343 static void spmc_rxtx_map(struct ffa_rxtx *rxtx)
1344 {
1345 struct thread_smc_args args = {
1346 #ifdef ARM64
1347 .a0 = FFA_RXTX_MAP_64,
1348 #else
1349 .a0 = FFA_RXTX_MAP_32,
1350 #endif
1351 .a1 = virt_to_phys(rxtx->tx),
1352 .a2 = virt_to_phys(rxtx->rx),
1353 .a3 = 1,
1354 };
1355
1356 thread_smccc(&args);
1357 if (!is_ffa_success(args.a0)) {
1358 if (args.a0 == FFA_ERROR)
1359 EMSG("rxtx map failed with error %ld", args.a2);
1360 else
1361 EMSG("rxtx map failed");
1362 panic();
1363 }
1364 }
1365
spmc_get_id(void)1366 static uint16_t spmc_get_id(void)
1367 {
1368 struct thread_smc_args args = {
1369 .a0 = FFA_ID_GET,
1370 };
1371
1372 thread_smccc(&args);
1373 if (!is_ffa_success(args.a0)) {
1374 if (args.a0 == FFA_ERROR)
1375 EMSG("Get id failed with error %ld", args.a2);
1376 else
1377 EMSG("Get id failed");
1378 panic();
1379 }
1380
1381 return args.a2;
1382 }
1383
spmc_retrieve_req(uint64_t cookie)1384 static struct ffa_mem_transaction *spmc_retrieve_req(uint64_t cookie)
1385 {
1386 struct ffa_mem_transaction *trans_descr = nw_rxtx.tx;
1387 struct ffa_mem_access *acc_descr_array = NULL;
1388 struct ffa_mem_access_perm *perm_descr = NULL;
1389 size_t size = sizeof(*trans_descr) +
1390 1 * sizeof(struct ffa_mem_access);
1391 struct thread_smc_args args = {
1392 .a0 = FFA_MEM_RETRIEVE_REQ_32,
1393 .a1 = size, /* Total Length */
1394 .a2 = size, /* Frag Length == Total length */
1395 .a3 = 0, /* Address, Using TX -> MBZ */
1396 .a4 = 0, /* Using TX -> MBZ */
1397 };
1398
1399 memset(trans_descr, 0, size);
1400 trans_descr->sender_id = thread_get_tsd()->rpc_target_info;
1401 trans_descr->mem_reg_attr = FFA_NORMAL_MEM_REG_ATTR;
1402 trans_descr->global_handle = cookie;
1403 trans_descr->flags = FFA_MEMORY_REGION_TRANSACTION_TYPE_SHARE |
1404 FFA_MEMORY_REGION_FLAG_ANY_ALIGNMENT;
1405 trans_descr->mem_access_count = 1;
1406 acc_descr_array = trans_descr->mem_access_array;
1407 acc_descr_array->region_offs = 0;
1408 acc_descr_array->reserved = 0;
1409 perm_descr = &acc_descr_array->access_perm;
1410 perm_descr->endpoint_id = my_endpoint_id;
1411 perm_descr->perm = FFA_MEM_ACC_RW;
1412 perm_descr->flags = 0;
1413
1414 thread_smccc(&args);
1415 if (args.a0 != FFA_MEM_RETRIEVE_RESP) {
1416 if (args.a0 == FFA_ERROR)
1417 EMSG("Failed to fetch cookie %#"PRIx64" error code %d",
1418 cookie, (int)args.a2);
1419 else
1420 EMSG("Failed to fetch cookie %#"PRIx64" a0 %#"PRIx64,
1421 cookie, args.a0);
1422 return NULL;
1423 }
1424
1425 return nw_rxtx.rx;
1426 }
1427
thread_spmc_relinquish(uint64_t cookie)1428 void thread_spmc_relinquish(uint64_t cookie)
1429 {
1430 struct ffa_mem_relinquish *relinquish_desc = nw_rxtx.tx;
1431 struct thread_smc_args args = {
1432 .a0 = FFA_MEM_RELINQUISH,
1433 };
1434
1435 memset(relinquish_desc, 0, sizeof(*relinquish_desc));
1436 relinquish_desc->handle = cookie;
1437 relinquish_desc->flags = 0;
1438 relinquish_desc->endpoint_count = 1;
1439 relinquish_desc->endpoint_id_array[0] = my_endpoint_id;
1440 thread_smccc(&args);
1441 if (!is_ffa_success(args.a0))
1442 EMSG("Failed to relinquish cookie %#"PRIx64, cookie);
1443 }
1444
set_pages(struct ffa_address_range * regions,unsigned int num_regions,unsigned int num_pages,struct mobj_ffa * mf)1445 static int set_pages(struct ffa_address_range *regions,
1446 unsigned int num_regions, unsigned int num_pages,
1447 struct mobj_ffa *mf)
1448 {
1449 unsigned int n = 0;
1450 unsigned int idx = 0;
1451
1452 for (n = 0; n < num_regions; n++) {
1453 unsigned int page_count = READ_ONCE(regions[n].page_count);
1454 uint64_t addr = READ_ONCE(regions[n].address);
1455
1456 if (mobj_ffa_add_pages_at(mf, &idx, addr, page_count))
1457 return FFA_INVALID_PARAMETERS;
1458 }
1459
1460 if (idx != num_pages)
1461 return FFA_INVALID_PARAMETERS;
1462
1463 return 0;
1464 }
1465
thread_spmc_populate_mobj_from_rx(uint64_t cookie)1466 struct mobj_ffa *thread_spmc_populate_mobj_from_rx(uint64_t cookie)
1467 {
1468 struct mobj_ffa *ret = NULL;
1469 struct ffa_mem_transaction *retrieve_desc = NULL;
1470 struct ffa_mem_access *descr_array = NULL;
1471 struct ffa_mem_region *descr = NULL;
1472 struct mobj_ffa *mf = NULL;
1473 unsigned int num_pages = 0;
1474 unsigned int offs = 0;
1475 struct thread_smc_args ffa_rx_release_args = {
1476 .a0 = FFA_RX_RELEASE
1477 };
1478
1479 /*
1480 * OP-TEE is only supporting a single mem_region while the
1481 * specification allows for more than one.
1482 */
1483 retrieve_desc = spmc_retrieve_req(cookie);
1484 if (!retrieve_desc) {
1485 EMSG("Failed to retrieve cookie from rx buffer %#"PRIx64,
1486 cookie);
1487 return NULL;
1488 }
1489
1490 descr_array = retrieve_desc->mem_access_array;
1491 offs = READ_ONCE(descr_array->region_offs);
1492 descr = (struct ffa_mem_region *)((vaddr_t)retrieve_desc + offs);
1493
1494 num_pages = READ_ONCE(descr->total_page_count);
1495 mf = mobj_ffa_spmc_new(cookie, num_pages);
1496 if (!mf)
1497 goto out;
1498
1499 if (set_pages(descr->address_range_array,
1500 READ_ONCE(descr->address_range_count), num_pages, mf)) {
1501 mobj_ffa_spmc_delete(mf);
1502 goto out;
1503 }
1504
1505 ret = mf;
1506
1507 out:
1508 /* Release RX buffer after the mem retrieve request. */
1509 thread_smccc(&ffa_rx_release_args);
1510
1511 return ret;
1512 }
1513
spmc_init(void)1514 static TEE_Result spmc_init(void)
1515 {
1516 spmc_rxtx_map(&nw_rxtx);
1517 my_endpoint_id = spmc_get_id();
1518 DMSG("My endpoint ID %#x", my_endpoint_id);
1519
1520 return TEE_SUCCESS;
1521 }
1522 #endif /* !defined(CFG_CORE_SEL1_SPMC) */
1523
1524 service_init(spmc_init);
1525