1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * MFD driver for TWL6040 audio device
4 *
5 * Authors: Misael Lopez Cruz <misael.lopez@ti.com>
6 * Jorge Eduardo Candelaria <jorge.candelaria@ti.com>
7 * Peter Ujfalusi <peter.ujfalusi@ti.com>
8 *
9 * Copyright: (C) 2011 Texas Instruments, Inc.
10 */
11
12 #include <linux/module.h>
13 #include <linux/types.h>
14 #include <linux/slab.h>
15 #include <linux/kernel.h>
16 #include <linux/err.h>
17 #include <linux/platform_device.h>
18 #include <linux/of.h>
19 #include <linux/of_irq.h>
20 #include <linux/of_platform.h>
21 #include <linux/gpio/consumer.h>
22 #include <linux/delay.h>
23 #include <linux/i2c.h>
24 #include <linux/regmap.h>
25 #include <linux/mfd/core.h>
26 #include <linux/mfd/twl6040.h>
27 #include <linux/regulator/consumer.h>
28
29 #define VIBRACTRL_MEMBER(reg) ((reg == TWL6040_REG_VIBCTLL) ? 0 : 1)
30 #define TWL6040_NUM_SUPPLIES (2)
31
32 static const struct reg_default twl6040_defaults[] = {
33 { 0x01, 0x4B }, /* REG_ASICID (ro) */
34 { 0x02, 0x00 }, /* REG_ASICREV (ro) */
35 { 0x03, 0x00 }, /* REG_INTID */
36 { 0x04, 0x00 }, /* REG_INTMR */
37 { 0x05, 0x00 }, /* REG_NCPCTRL */
38 { 0x06, 0x00 }, /* REG_LDOCTL */
39 { 0x07, 0x60 }, /* REG_HPPLLCTL */
40 { 0x08, 0x00 }, /* REG_LPPLLCTL */
41 { 0x09, 0x4A }, /* REG_LPPLLDIV */
42 { 0x0A, 0x00 }, /* REG_AMICBCTL */
43 { 0x0B, 0x00 }, /* REG_DMICBCTL */
44 { 0x0C, 0x00 }, /* REG_MICLCTL */
45 { 0x0D, 0x00 }, /* REG_MICRCTL */
46 { 0x0E, 0x00 }, /* REG_MICGAIN */
47 { 0x0F, 0x1B }, /* REG_LINEGAIN */
48 { 0x10, 0x00 }, /* REG_HSLCTL */
49 { 0x11, 0x00 }, /* REG_HSRCTL */
50 { 0x12, 0x00 }, /* REG_HSGAIN */
51 { 0x13, 0x00 }, /* REG_EARCTL */
52 { 0x14, 0x00 }, /* REG_HFLCTL */
53 { 0x15, 0x00 }, /* REG_HFLGAIN */
54 { 0x16, 0x00 }, /* REG_HFRCTL */
55 { 0x17, 0x00 }, /* REG_HFRGAIN */
56 { 0x18, 0x00 }, /* REG_VIBCTLL */
57 { 0x19, 0x00 }, /* REG_VIBDATL */
58 { 0x1A, 0x00 }, /* REG_VIBCTLR */
59 { 0x1B, 0x00 }, /* REG_VIBDATR */
60 { 0x1C, 0x00 }, /* REG_HKCTL1 */
61 { 0x1D, 0x00 }, /* REG_HKCTL2 */
62 { 0x1E, 0x00 }, /* REG_GPOCTL */
63 { 0x1F, 0x00 }, /* REG_ALB */
64 { 0x20, 0x00 }, /* REG_DLB */
65 /* 0x28, REG_TRIM1 */
66 /* 0x29, REG_TRIM2 */
67 /* 0x2A, REG_TRIM3 */
68 /* 0x2B, REG_HSOTRIM */
69 /* 0x2C, REG_HFOTRIM */
70 { 0x2D, 0x08 }, /* REG_ACCCTL */
71 { 0x2E, 0x00 }, /* REG_STATUS (ro) */
72 };
73
74 static struct reg_sequence twl6040_patch[] = {
75 /*
76 * Select I2C bus access to dual access registers
77 * Interrupt register is cleared on read
78 * Select fast mode for i2c (400KHz)
79 */
80 { TWL6040_REG_ACCCTL,
81 TWL6040_I2CSEL | TWL6040_INTCLRMODE | TWL6040_I2CMODE(1) },
82 };
83
84
twl6040_has_vibra(struct device_node * parent)85 static bool twl6040_has_vibra(struct device_node *parent)
86 {
87 struct device_node *node;
88
89 node = of_get_child_by_name(parent, "vibra");
90 if (node) {
91 of_node_put(node);
92 return true;
93 }
94
95 return false;
96 }
97
twl6040_reg_read(struct twl6040 * twl6040,unsigned int reg)98 int twl6040_reg_read(struct twl6040 *twl6040, unsigned int reg)
99 {
100 int ret;
101 unsigned int val;
102
103 ret = regmap_read(twl6040->regmap, reg, &val);
104 if (ret < 0)
105 return ret;
106
107 return val;
108 }
109 EXPORT_SYMBOL(twl6040_reg_read);
110
twl6040_reg_write(struct twl6040 * twl6040,unsigned int reg,u8 val)111 int twl6040_reg_write(struct twl6040 *twl6040, unsigned int reg, u8 val)
112 {
113 int ret;
114
115 ret = regmap_write(twl6040->regmap, reg, val);
116
117 return ret;
118 }
119 EXPORT_SYMBOL(twl6040_reg_write);
120
twl6040_set_bits(struct twl6040 * twl6040,unsigned int reg,u8 mask)121 int twl6040_set_bits(struct twl6040 *twl6040, unsigned int reg, u8 mask)
122 {
123 return regmap_update_bits(twl6040->regmap, reg, mask, mask);
124 }
125 EXPORT_SYMBOL(twl6040_set_bits);
126
twl6040_clear_bits(struct twl6040 * twl6040,unsigned int reg,u8 mask)127 int twl6040_clear_bits(struct twl6040 *twl6040, unsigned int reg, u8 mask)
128 {
129 return regmap_update_bits(twl6040->regmap, reg, mask, 0);
130 }
131 EXPORT_SYMBOL(twl6040_clear_bits);
132
133 /* twl6040 codec manual power-up sequence */
twl6040_power_up_manual(struct twl6040 * twl6040)134 static int twl6040_power_up_manual(struct twl6040 *twl6040)
135 {
136 u8 ldoctl, ncpctl, lppllctl;
137 int ret;
138
139 /* enable high-side LDO, reference system and internal oscillator */
140 ldoctl = TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA;
141 ret = twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
142 if (ret)
143 return ret;
144 usleep_range(10000, 10500);
145
146 /* enable negative charge pump */
147 ncpctl = TWL6040_NCPENA;
148 ret = twl6040_reg_write(twl6040, TWL6040_REG_NCPCTL, ncpctl);
149 if (ret)
150 goto ncp_err;
151 usleep_range(1000, 1500);
152
153 /* enable low-side LDO */
154 ldoctl |= TWL6040_LSLDOENA;
155 ret = twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
156 if (ret)
157 goto lsldo_err;
158 usleep_range(1000, 1500);
159
160 /* enable low-power PLL */
161 lppllctl = TWL6040_LPLLENA;
162 ret = twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl);
163 if (ret)
164 goto lppll_err;
165 usleep_range(5000, 5500);
166
167 /* disable internal oscillator */
168 ldoctl &= ~TWL6040_OSCENA;
169 ret = twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
170 if (ret)
171 goto osc_err;
172
173 return 0;
174
175 osc_err:
176 lppllctl &= ~TWL6040_LPLLENA;
177 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl);
178 lppll_err:
179 ldoctl &= ~TWL6040_LSLDOENA;
180 twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
181 lsldo_err:
182 ncpctl &= ~TWL6040_NCPENA;
183 twl6040_reg_write(twl6040, TWL6040_REG_NCPCTL, ncpctl);
184 ncp_err:
185 ldoctl &= ~(TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA);
186 twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
187
188 dev_err(twl6040->dev, "manual power-up failed\n");
189 return ret;
190 }
191
192 /* twl6040 manual power-down sequence */
twl6040_power_down_manual(struct twl6040 * twl6040)193 static void twl6040_power_down_manual(struct twl6040 *twl6040)
194 {
195 u8 ncpctl, ldoctl, lppllctl;
196
197 ncpctl = twl6040_reg_read(twl6040, TWL6040_REG_NCPCTL);
198 ldoctl = twl6040_reg_read(twl6040, TWL6040_REG_LDOCTL);
199 lppllctl = twl6040_reg_read(twl6040, TWL6040_REG_LPPLLCTL);
200
201 /* enable internal oscillator */
202 ldoctl |= TWL6040_OSCENA;
203 twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
204 usleep_range(1000, 1500);
205
206 /* disable low-power PLL */
207 lppllctl &= ~TWL6040_LPLLENA;
208 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl);
209
210 /* disable low-side LDO */
211 ldoctl &= ~TWL6040_LSLDOENA;
212 twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
213
214 /* disable negative charge pump */
215 ncpctl &= ~TWL6040_NCPENA;
216 twl6040_reg_write(twl6040, TWL6040_REG_NCPCTL, ncpctl);
217
218 /* disable high-side LDO, reference system and internal oscillator */
219 ldoctl &= ~(TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA);
220 twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
221 }
222
twl6040_readyint_handler(int irq,void * data)223 static irqreturn_t twl6040_readyint_handler(int irq, void *data)
224 {
225 struct twl6040 *twl6040 = data;
226
227 complete(&twl6040->ready);
228
229 return IRQ_HANDLED;
230 }
231
twl6040_thint_handler(int irq,void * data)232 static irqreturn_t twl6040_thint_handler(int irq, void *data)
233 {
234 struct twl6040 *twl6040 = data;
235 u8 status;
236
237 status = twl6040_reg_read(twl6040, TWL6040_REG_STATUS);
238 if (status & TWL6040_TSHUTDET) {
239 dev_warn(twl6040->dev, "Thermal shutdown, powering-off");
240 twl6040_power(twl6040, 0);
241 } else {
242 dev_warn(twl6040->dev, "Leaving thermal shutdown, powering-on");
243 twl6040_power(twl6040, 1);
244 }
245
246 return IRQ_HANDLED;
247 }
248
twl6040_power_up_automatic(struct twl6040 * twl6040)249 static int twl6040_power_up_automatic(struct twl6040 *twl6040)
250 {
251 int time_left;
252
253 gpiod_set_value_cansleep(twl6040->audpwron, 1);
254
255 time_left = wait_for_completion_timeout(&twl6040->ready,
256 msecs_to_jiffies(144));
257 if (!time_left) {
258 u8 intid;
259
260 dev_warn(twl6040->dev, "timeout waiting for READYINT\n");
261 intid = twl6040_reg_read(twl6040, TWL6040_REG_INTID);
262 if (!(intid & TWL6040_READYINT)) {
263 dev_err(twl6040->dev, "automatic power-up failed\n");
264 gpiod_set_value_cansleep(twl6040->audpwron, 0);
265 return -ETIMEDOUT;
266 }
267 }
268
269 return 0;
270 }
271
twl6040_power(struct twl6040 * twl6040,int on)272 int twl6040_power(struct twl6040 *twl6040, int on)
273 {
274 int ret = 0;
275
276 mutex_lock(&twl6040->mutex);
277
278 if (on) {
279 /* already powered-up */
280 if (twl6040->power_count++)
281 goto out;
282
283 ret = clk_prepare_enable(twl6040->clk32k);
284 if (ret) {
285 twl6040->power_count = 0;
286 goto out;
287 }
288
289 /* Allow writes to the chip */
290 regcache_cache_only(twl6040->regmap, false);
291
292 if (twl6040->audpwron) {
293 /* use automatic power-up sequence */
294 ret = twl6040_power_up_automatic(twl6040);
295 if (ret) {
296 clk_disable_unprepare(twl6040->clk32k);
297 twl6040->power_count = 0;
298 goto out;
299 }
300 } else {
301 /* use manual power-up sequence */
302 ret = twl6040_power_up_manual(twl6040);
303 if (ret) {
304 clk_disable_unprepare(twl6040->clk32k);
305 twl6040->power_count = 0;
306 goto out;
307 }
308 }
309
310 /*
311 * Register access can produce errors after power-up unless we
312 * wait at least 8ms based on measurements on duovero.
313 */
314 usleep_range(10000, 12000);
315
316 /* Sync with the HW */
317 ret = regcache_sync(twl6040->regmap);
318 if (ret) {
319 dev_err(twl6040->dev, "Failed to sync with the HW: %i\n",
320 ret);
321 goto out;
322 }
323
324 /* Default PLL configuration after power up */
325 twl6040->pll = TWL6040_SYSCLK_SEL_LPPLL;
326 twl6040->sysclk_rate = 19200000;
327 } else {
328 /* already powered-down */
329 if (!twl6040->power_count) {
330 dev_err(twl6040->dev,
331 "device is already powered-off\n");
332 ret = -EPERM;
333 goto out;
334 }
335
336 if (--twl6040->power_count)
337 goto out;
338
339 if (twl6040->audpwron) {
340 /* use AUDPWRON line */
341 gpiod_set_value_cansleep(twl6040->audpwron, 0);
342
343 /* power-down sequence latency */
344 usleep_range(500, 700);
345 } else {
346 /* use manual power-down sequence */
347 twl6040_power_down_manual(twl6040);
348 }
349
350 /* Set regmap to cache only and mark it as dirty */
351 regcache_cache_only(twl6040->regmap, true);
352 regcache_mark_dirty(twl6040->regmap);
353
354 twl6040->sysclk_rate = 0;
355
356 if (twl6040->pll == TWL6040_SYSCLK_SEL_HPPLL) {
357 clk_disable_unprepare(twl6040->mclk);
358 twl6040->mclk_rate = 0;
359 }
360
361 clk_disable_unprepare(twl6040->clk32k);
362 }
363
364 out:
365 mutex_unlock(&twl6040->mutex);
366 return ret;
367 }
368 EXPORT_SYMBOL(twl6040_power);
369
twl6040_set_pll(struct twl6040 * twl6040,int pll_id,unsigned int freq_in,unsigned int freq_out)370 int twl6040_set_pll(struct twl6040 *twl6040, int pll_id,
371 unsigned int freq_in, unsigned int freq_out)
372 {
373 u8 hppllctl, lppllctl;
374 int ret = 0;
375
376 mutex_lock(&twl6040->mutex);
377
378 hppllctl = twl6040_reg_read(twl6040, TWL6040_REG_HPPLLCTL);
379 lppllctl = twl6040_reg_read(twl6040, TWL6040_REG_LPPLLCTL);
380
381 /* Force full reconfiguration when switching between PLL */
382 if (pll_id != twl6040->pll) {
383 twl6040->sysclk_rate = 0;
384 twl6040->mclk_rate = 0;
385 }
386
387 switch (pll_id) {
388 case TWL6040_SYSCLK_SEL_LPPLL:
389 /* low-power PLL divider */
390 /* Change the sysclk configuration only if it has been canged */
391 if (twl6040->sysclk_rate != freq_out) {
392 switch (freq_out) {
393 case 17640000:
394 lppllctl |= TWL6040_LPLLFIN;
395 break;
396 case 19200000:
397 lppllctl &= ~TWL6040_LPLLFIN;
398 break;
399 default:
400 dev_err(twl6040->dev,
401 "freq_out %d not supported\n",
402 freq_out);
403 ret = -EINVAL;
404 goto pll_out;
405 }
406 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
407 lppllctl);
408 }
409
410 /* The PLL in use has not been change, we can exit */
411 if (twl6040->pll == pll_id)
412 break;
413
414 switch (freq_in) {
415 case 32768:
416 lppllctl |= TWL6040_LPLLENA;
417 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
418 lppllctl);
419 mdelay(5);
420 lppllctl &= ~TWL6040_HPLLSEL;
421 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
422 lppllctl);
423 hppllctl &= ~TWL6040_HPLLENA;
424 twl6040_reg_write(twl6040, TWL6040_REG_HPPLLCTL,
425 hppllctl);
426 break;
427 default:
428 dev_err(twl6040->dev,
429 "freq_in %d not supported\n", freq_in);
430 ret = -EINVAL;
431 goto pll_out;
432 }
433
434 clk_disable_unprepare(twl6040->mclk);
435 break;
436 case TWL6040_SYSCLK_SEL_HPPLL:
437 /* high-performance PLL can provide only 19.2 MHz */
438 if (freq_out != 19200000) {
439 dev_err(twl6040->dev,
440 "freq_out %d not supported\n", freq_out);
441 ret = -EINVAL;
442 goto pll_out;
443 }
444
445 if (twl6040->mclk_rate != freq_in) {
446 hppllctl &= ~TWL6040_MCLK_MSK;
447
448 switch (freq_in) {
449 case 12000000:
450 /* PLL enabled, active mode */
451 hppllctl |= TWL6040_MCLK_12000KHZ |
452 TWL6040_HPLLENA;
453 break;
454 case 19200000:
455 /* PLL enabled, bypass mode */
456 hppllctl |= TWL6040_MCLK_19200KHZ |
457 TWL6040_HPLLBP | TWL6040_HPLLENA;
458 break;
459 case 26000000:
460 /* PLL enabled, active mode */
461 hppllctl |= TWL6040_MCLK_26000KHZ |
462 TWL6040_HPLLENA;
463 break;
464 case 38400000:
465 /* PLL enabled, bypass mode */
466 hppllctl |= TWL6040_MCLK_38400KHZ |
467 TWL6040_HPLLBP | TWL6040_HPLLENA;
468 break;
469 default:
470 dev_err(twl6040->dev,
471 "freq_in %d not supported\n", freq_in);
472 ret = -EINVAL;
473 goto pll_out;
474 }
475
476 /* When switching to HPPLL, enable the mclk first */
477 if (pll_id != twl6040->pll)
478 clk_prepare_enable(twl6040->mclk);
479 /*
480 * enable clock slicer to ensure input waveform is
481 * square
482 */
483 hppllctl |= TWL6040_HPLLSQRENA;
484
485 twl6040_reg_write(twl6040, TWL6040_REG_HPPLLCTL,
486 hppllctl);
487 usleep_range(500, 700);
488 lppllctl |= TWL6040_HPLLSEL;
489 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
490 lppllctl);
491 lppllctl &= ~TWL6040_LPLLENA;
492 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
493 lppllctl);
494
495 twl6040->mclk_rate = freq_in;
496 }
497 break;
498 default:
499 dev_err(twl6040->dev, "unknown pll id %d\n", pll_id);
500 ret = -EINVAL;
501 goto pll_out;
502 }
503
504 twl6040->sysclk_rate = freq_out;
505 twl6040->pll = pll_id;
506
507 pll_out:
508 mutex_unlock(&twl6040->mutex);
509 return ret;
510 }
511 EXPORT_SYMBOL(twl6040_set_pll);
512
twl6040_get_pll(struct twl6040 * twl6040)513 int twl6040_get_pll(struct twl6040 *twl6040)
514 {
515 if (twl6040->power_count)
516 return twl6040->pll;
517 else
518 return -ENODEV;
519 }
520 EXPORT_SYMBOL(twl6040_get_pll);
521
twl6040_get_sysclk(struct twl6040 * twl6040)522 unsigned int twl6040_get_sysclk(struct twl6040 *twl6040)
523 {
524 return twl6040->sysclk_rate;
525 }
526 EXPORT_SYMBOL(twl6040_get_sysclk);
527
528 /* Get the combined status of the vibra control register */
twl6040_get_vibralr_status(struct twl6040 * twl6040)529 int twl6040_get_vibralr_status(struct twl6040 *twl6040)
530 {
531 unsigned int reg;
532 int ret;
533 u8 status;
534
535 ret = regmap_read(twl6040->regmap, TWL6040_REG_VIBCTLL, ®);
536 if (ret != 0)
537 return ret;
538 status = reg;
539
540 ret = regmap_read(twl6040->regmap, TWL6040_REG_VIBCTLR, ®);
541 if (ret != 0)
542 return ret;
543 status |= reg;
544
545 status &= (TWL6040_VIBENA | TWL6040_VIBSEL);
546
547 return status;
548 }
549 EXPORT_SYMBOL(twl6040_get_vibralr_status);
550
551 static struct resource twl6040_vibra_rsrc[] = {
552 {
553 .flags = IORESOURCE_IRQ,
554 },
555 };
556
557 static struct resource twl6040_codec_rsrc[] = {
558 {
559 .flags = IORESOURCE_IRQ,
560 },
561 };
562
twl6040_readable_reg(struct device * dev,unsigned int reg)563 static bool twl6040_readable_reg(struct device *dev, unsigned int reg)
564 {
565 /* Register 0 is not readable */
566 if (!reg)
567 return false;
568 return true;
569 }
570
twl6040_volatile_reg(struct device * dev,unsigned int reg)571 static bool twl6040_volatile_reg(struct device *dev, unsigned int reg)
572 {
573 switch (reg) {
574 case TWL6040_REG_ASICID:
575 case TWL6040_REG_ASICREV:
576 case TWL6040_REG_INTID:
577 case TWL6040_REG_LPPLLCTL:
578 case TWL6040_REG_HPPLLCTL:
579 case TWL6040_REG_STATUS:
580 return true;
581 default:
582 return false;
583 }
584 }
585
twl6040_writeable_reg(struct device * dev,unsigned int reg)586 static bool twl6040_writeable_reg(struct device *dev, unsigned int reg)
587 {
588 switch (reg) {
589 case TWL6040_REG_ASICID:
590 case TWL6040_REG_ASICREV:
591 case TWL6040_REG_STATUS:
592 return false;
593 default:
594 return true;
595 }
596 }
597
598 static const struct regmap_config twl6040_regmap_config = {
599 .reg_bits = 8,
600 .val_bits = 8,
601
602 .reg_defaults = twl6040_defaults,
603 .num_reg_defaults = ARRAY_SIZE(twl6040_defaults),
604
605 .max_register = TWL6040_REG_STATUS, /* 0x2e */
606
607 .readable_reg = twl6040_readable_reg,
608 .volatile_reg = twl6040_volatile_reg,
609 .writeable_reg = twl6040_writeable_reg,
610
611 .cache_type = REGCACHE_RBTREE,
612 .use_single_read = true,
613 .use_single_write = true,
614 };
615
616 static const struct regmap_irq twl6040_irqs[] = {
617 { .reg_offset = 0, .mask = TWL6040_THINT, },
618 { .reg_offset = 0, .mask = TWL6040_PLUGINT | TWL6040_UNPLUGINT, },
619 { .reg_offset = 0, .mask = TWL6040_HOOKINT, },
620 { .reg_offset = 0, .mask = TWL6040_HFINT, },
621 { .reg_offset = 0, .mask = TWL6040_VIBINT, },
622 { .reg_offset = 0, .mask = TWL6040_READYINT, },
623 };
624
625 static struct regmap_irq_chip twl6040_irq_chip = {
626 .name = "twl6040",
627 .irqs = twl6040_irqs,
628 .num_irqs = ARRAY_SIZE(twl6040_irqs),
629
630 .num_regs = 1,
631 .status_base = TWL6040_REG_INTID,
632 .mask_base = TWL6040_REG_INTMR,
633 };
634
twl6040_probe(struct i2c_client * client)635 static int twl6040_probe(struct i2c_client *client)
636 {
637 struct device_node *node = client->dev.of_node;
638 struct twl6040 *twl6040;
639 struct mfd_cell *cell = NULL;
640 int irq, ret, children = 0;
641
642 if (!node) {
643 dev_err(&client->dev, "of node is missing\n");
644 return -EINVAL;
645 }
646
647 /* In order to operate correctly we need valid interrupt config */
648 if (!client->irq) {
649 dev_err(&client->dev, "Invalid IRQ configuration\n");
650 return -EINVAL;
651 }
652
653 twl6040 = devm_kzalloc(&client->dev, sizeof(struct twl6040),
654 GFP_KERNEL);
655 if (!twl6040)
656 return -ENOMEM;
657
658 twl6040->regmap = devm_regmap_init_i2c(client, &twl6040_regmap_config);
659 if (IS_ERR(twl6040->regmap))
660 return PTR_ERR(twl6040->regmap);
661
662 i2c_set_clientdata(client, twl6040);
663
664 twl6040->clk32k = devm_clk_get(&client->dev, "clk32k");
665 if (IS_ERR(twl6040->clk32k)) {
666 if (PTR_ERR(twl6040->clk32k) == -EPROBE_DEFER)
667 return -EPROBE_DEFER;
668 dev_dbg(&client->dev, "clk32k is not handled\n");
669 twl6040->clk32k = NULL;
670 }
671
672 twl6040->mclk = devm_clk_get(&client->dev, "mclk");
673 if (IS_ERR(twl6040->mclk)) {
674 if (PTR_ERR(twl6040->mclk) == -EPROBE_DEFER)
675 return -EPROBE_DEFER;
676 dev_dbg(&client->dev, "mclk is not handled\n");
677 twl6040->mclk = NULL;
678 }
679
680 twl6040->supplies[0].supply = "vio";
681 twl6040->supplies[1].supply = "v2v1";
682 ret = devm_regulator_bulk_get(&client->dev, TWL6040_NUM_SUPPLIES,
683 twl6040->supplies);
684 if (ret != 0) {
685 dev_err(&client->dev, "Failed to get supplies: %d\n", ret);
686 return ret;
687 }
688
689 ret = regulator_bulk_enable(TWL6040_NUM_SUPPLIES, twl6040->supplies);
690 if (ret != 0) {
691 dev_err(&client->dev, "Failed to enable supplies: %d\n", ret);
692 return ret;
693 }
694
695 twl6040->dev = &client->dev;
696 twl6040->irq = client->irq;
697
698 mutex_init(&twl6040->mutex);
699 init_completion(&twl6040->ready);
700
701 regmap_register_patch(twl6040->regmap, twl6040_patch,
702 ARRAY_SIZE(twl6040_patch));
703
704 twl6040->rev = twl6040_reg_read(twl6040, TWL6040_REG_ASICREV);
705 if (twl6040->rev < 0) {
706 dev_err(&client->dev, "Failed to read revision register: %d\n",
707 twl6040->rev);
708 ret = twl6040->rev;
709 goto gpio_err;
710 }
711
712 /* ERRATA: Automatic power-up is not possible in ES1.0 */
713 if (twl6040_get_revid(twl6040) > TWL6040_REV_ES1_0) {
714 twl6040->audpwron = devm_gpiod_get_optional(&client->dev,
715 "ti,audpwron",
716 GPIOD_OUT_LOW);
717 ret = PTR_ERR_OR_ZERO(twl6040->audpwron);
718 if (ret)
719 goto gpio_err;
720
721 gpiod_set_consumer_name(twl6040->audpwron, "audpwron");
722
723 /* Clear any pending interrupt */
724 twl6040_reg_read(twl6040, TWL6040_REG_INTID);
725 }
726
727 ret = regmap_add_irq_chip(twl6040->regmap, twl6040->irq, IRQF_ONESHOT,
728 0, &twl6040_irq_chip, &twl6040->irq_data);
729 if (ret < 0)
730 goto gpio_err;
731
732 twl6040->irq_ready = regmap_irq_get_virq(twl6040->irq_data,
733 TWL6040_IRQ_READY);
734 twl6040->irq_th = regmap_irq_get_virq(twl6040->irq_data,
735 TWL6040_IRQ_TH);
736
737 ret = devm_request_threaded_irq(twl6040->dev, twl6040->irq_ready, NULL,
738 twl6040_readyint_handler, IRQF_ONESHOT,
739 "twl6040_irq_ready", twl6040);
740 if (ret) {
741 dev_err(twl6040->dev, "READY IRQ request failed: %d\n", ret);
742 goto readyirq_err;
743 }
744
745 ret = devm_request_threaded_irq(twl6040->dev, twl6040->irq_th, NULL,
746 twl6040_thint_handler, IRQF_ONESHOT,
747 "twl6040_irq_th", twl6040);
748 if (ret) {
749 dev_err(twl6040->dev, "Thermal IRQ request failed: %d\n", ret);
750 goto readyirq_err;
751 }
752
753 /*
754 * The main functionality of twl6040 to provide audio on OMAP4+ systems.
755 * We can add the ASoC codec child whenever this driver has been loaded.
756 */
757 irq = regmap_irq_get_virq(twl6040->irq_data, TWL6040_IRQ_PLUG);
758 cell = &twl6040->cells[children];
759 cell->name = "twl6040-codec";
760 twl6040_codec_rsrc[0].start = irq;
761 twl6040_codec_rsrc[0].end = irq;
762 cell->resources = twl6040_codec_rsrc;
763 cell->num_resources = ARRAY_SIZE(twl6040_codec_rsrc);
764 children++;
765
766 /* Vibra input driver support */
767 if (twl6040_has_vibra(node)) {
768 irq = regmap_irq_get_virq(twl6040->irq_data, TWL6040_IRQ_VIB);
769
770 cell = &twl6040->cells[children];
771 cell->name = "twl6040-vibra";
772 twl6040_vibra_rsrc[0].start = irq;
773 twl6040_vibra_rsrc[0].end = irq;
774 cell->resources = twl6040_vibra_rsrc;
775 cell->num_resources = ARRAY_SIZE(twl6040_vibra_rsrc);
776 children++;
777 }
778
779 /* GPO support */
780 cell = &twl6040->cells[children];
781 cell->name = "twl6040-gpo";
782 children++;
783
784 /* PDM clock support */
785 cell = &twl6040->cells[children];
786 cell->name = "twl6040-pdmclk";
787 children++;
788
789 /* The chip is powered down so mark regmap to cache only and dirty */
790 regcache_cache_only(twl6040->regmap, true);
791 regcache_mark_dirty(twl6040->regmap);
792
793 ret = mfd_add_devices(&client->dev, -1, twl6040->cells, children,
794 NULL, 0, NULL);
795 if (ret)
796 goto readyirq_err;
797
798 return 0;
799
800 readyirq_err:
801 regmap_del_irq_chip(twl6040->irq, twl6040->irq_data);
802 gpio_err:
803 regulator_bulk_disable(TWL6040_NUM_SUPPLIES, twl6040->supplies);
804 return ret;
805 }
806
twl6040_remove(struct i2c_client * client)807 static void twl6040_remove(struct i2c_client *client)
808 {
809 struct twl6040 *twl6040 = i2c_get_clientdata(client);
810
811 if (twl6040->power_count)
812 twl6040_power(twl6040, 0);
813
814 regmap_del_irq_chip(twl6040->irq, twl6040->irq_data);
815
816 mfd_remove_devices(&client->dev);
817
818 regulator_bulk_disable(TWL6040_NUM_SUPPLIES, twl6040->supplies);
819 }
820
821 static const struct i2c_device_id twl6040_i2c_id[] = {
822 { "twl6040", 0, },
823 { "twl6041", 0, },
824 { },
825 };
826 MODULE_DEVICE_TABLE(i2c, twl6040_i2c_id);
827
828 static struct i2c_driver twl6040_driver = {
829 .driver = {
830 .name = "twl6040",
831 },
832 .probe_new = twl6040_probe,
833 .remove = twl6040_remove,
834 .id_table = twl6040_i2c_id,
835 };
836
837 module_i2c_driver(twl6040_driver);
838
839 MODULE_DESCRIPTION("TWL6040 MFD");
840 MODULE_AUTHOR("Misael Lopez Cruz <misael.lopez@ti.com>");
841 MODULE_AUTHOR("Jorge Eduardo Candelaria <jorge.candelaria@ti.com>");
842 MODULE_LICENSE("GPL");
843