1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright 2020-2021 NXP
4 */
5
6 #include <linux/init.h>
7 #include <linux/interconnect.h>
8 #include <linux/ioctl.h>
9 #include <linux/list.h>
10 #include <linux/kernel.h>
11 #include <linux/module.h>
12 #include <linux/pm_runtime.h>
13 #include <linux/videodev2.h>
14 #include <media/v4l2-device.h>
15 #include <media/v4l2-event.h>
16 #include <media/v4l2-mem2mem.h>
17 #include <media/v4l2-ioctl.h>
18 #include <media/videobuf2-v4l2.h>
19 #include <media/videobuf2-dma-contig.h>
20 #include <media/videobuf2-vmalloc.h>
21 #include "vpu.h"
22 #include "vpu_core.h"
23 #include "vpu_v4l2.h"
24 #include "vpu_msgs.h"
25 #include "vpu_helpers.h"
26
vpu_inst_lock(struct vpu_inst * inst)27 void vpu_inst_lock(struct vpu_inst *inst)
28 {
29 mutex_lock(&inst->lock);
30 }
31
vpu_inst_unlock(struct vpu_inst * inst)32 void vpu_inst_unlock(struct vpu_inst *inst)
33 {
34 mutex_unlock(&inst->lock);
35 }
36
vpu_get_vb_phy_addr(struct vb2_buffer * vb,u32 plane_no)37 dma_addr_t vpu_get_vb_phy_addr(struct vb2_buffer *vb, u32 plane_no)
38 {
39 if (plane_no >= vb->num_planes)
40 return 0;
41 return vb2_dma_contig_plane_dma_addr(vb, plane_no) +
42 vb->planes[plane_no].data_offset;
43 }
44
vpu_get_vb_length(struct vb2_buffer * vb,u32 plane_no)45 unsigned int vpu_get_vb_length(struct vb2_buffer *vb, u32 plane_no)
46 {
47 if (plane_no >= vb->num_planes)
48 return 0;
49 return vb2_plane_size(vb, plane_no) - vb->planes[plane_no].data_offset;
50 }
51
vpu_set_buffer_state(struct vb2_v4l2_buffer * vbuf,unsigned int state)52 void vpu_set_buffer_state(struct vb2_v4l2_buffer *vbuf, unsigned int state)
53 {
54 struct vpu_vb2_buffer *vpu_buf = to_vpu_vb2_buffer(vbuf);
55
56 vpu_buf->state = state;
57 }
58
vpu_get_buffer_state(struct vb2_v4l2_buffer * vbuf)59 unsigned int vpu_get_buffer_state(struct vb2_v4l2_buffer *vbuf)
60 {
61 struct vpu_vb2_buffer *vpu_buf = to_vpu_vb2_buffer(vbuf);
62
63 return vpu_buf->state;
64 }
65
vpu_v4l2_set_error(struct vpu_inst * inst)66 void vpu_v4l2_set_error(struct vpu_inst *inst)
67 {
68 vpu_inst_lock(inst);
69 dev_err(inst->dev, "some error occurs in codec\n");
70 if (inst->fh.m2m_ctx) {
71 vb2_queue_error(v4l2_m2m_get_src_vq(inst->fh.m2m_ctx));
72 vb2_queue_error(v4l2_m2m_get_dst_vq(inst->fh.m2m_ctx));
73 }
74 vpu_inst_unlock(inst);
75 }
76
vpu_notify_eos(struct vpu_inst * inst)77 int vpu_notify_eos(struct vpu_inst *inst)
78 {
79 static const struct v4l2_event ev = {
80 .id = 0,
81 .type = V4L2_EVENT_EOS
82 };
83
84 vpu_trace(inst->dev, "[%d]\n", inst->id);
85 v4l2_event_queue_fh(&inst->fh, &ev);
86
87 return 0;
88 }
89
vpu_notify_source_change(struct vpu_inst * inst)90 int vpu_notify_source_change(struct vpu_inst *inst)
91 {
92 static const struct v4l2_event ev = {
93 .id = 0,
94 .type = V4L2_EVENT_SOURCE_CHANGE,
95 .u.src_change.changes = V4L2_EVENT_SRC_CH_RESOLUTION
96 };
97
98 vpu_trace(inst->dev, "[%d]\n", inst->id);
99 v4l2_event_queue_fh(&inst->fh, &ev);
100 return 0;
101 }
102
vpu_set_last_buffer_dequeued(struct vpu_inst * inst)103 int vpu_set_last_buffer_dequeued(struct vpu_inst *inst)
104 {
105 struct vb2_queue *q;
106
107 if (!inst || !inst->fh.m2m_ctx)
108 return -EINVAL;
109
110 q = v4l2_m2m_get_dst_vq(inst->fh.m2m_ctx);
111 if (!list_empty(&q->done_list))
112 return -EINVAL;
113
114 if (q->last_buffer_dequeued)
115 return 0;
116 vpu_trace(inst->dev, "last buffer dequeued\n");
117 q->last_buffer_dequeued = true;
118 wake_up(&q->done_wq);
119 vpu_notify_eos(inst);
120 return 0;
121 }
122
vpu_is_source_empty(struct vpu_inst * inst)123 bool vpu_is_source_empty(struct vpu_inst *inst)
124 {
125 struct v4l2_m2m_buffer *buf = NULL;
126
127 if (!inst->fh.m2m_ctx)
128 return true;
129 v4l2_m2m_for_each_src_buf(inst->fh.m2m_ctx, buf) {
130 if (vpu_get_buffer_state(&buf->vb) == VPU_BUF_STATE_IDLE)
131 return false;
132 }
133 return true;
134 }
135
vpu_init_format(struct vpu_inst * inst,struct vpu_format * fmt)136 static int vpu_init_format(struct vpu_inst *inst, struct vpu_format *fmt)
137 {
138 const struct vpu_format *info;
139
140 info = vpu_helper_find_format(inst, fmt->type, fmt->pixfmt);
141 if (!info) {
142 info = vpu_helper_enum_format(inst, fmt->type, 0);
143 if (!info)
144 return -EINVAL;
145 }
146 memcpy(fmt, info, sizeof(*fmt));
147
148 return 0;
149 }
150
vpu_calc_fmt_bytesperline(struct v4l2_format * f,struct vpu_format * fmt)151 static int vpu_calc_fmt_bytesperline(struct v4l2_format *f, struct vpu_format *fmt)
152 {
153 struct v4l2_pix_format_mplane *pixmp = &f->fmt.pix_mp;
154 int i;
155
156 if (fmt->flags & V4L2_FMT_FLAG_COMPRESSED) {
157 for (i = 0; i < fmt->comp_planes; i++)
158 fmt->bytesperline[i] = 0;
159 return 0;
160 }
161 if (pixmp->num_planes == fmt->comp_planes) {
162 for (i = 0; i < fmt->comp_planes; i++)
163 fmt->bytesperline[i] = pixmp->plane_fmt[i].bytesperline;
164 return 0;
165 }
166 if (pixmp->num_planes > 1)
167 return -EINVAL;
168
169 /*amphion vpu only support nv12 and nv12 tiled,
170 * so the bytesperline of luma and chroma should be same
171 */
172 for (i = 0; i < fmt->comp_planes; i++)
173 fmt->bytesperline[i] = pixmp->plane_fmt[0].bytesperline;
174
175 return 0;
176 }
177
vpu_calc_fmt_sizeimage(struct vpu_inst * inst,struct vpu_format * fmt)178 static int vpu_calc_fmt_sizeimage(struct vpu_inst *inst, struct vpu_format *fmt)
179 {
180 u32 stride = 1;
181 int i;
182
183 if (!(fmt->flags & V4L2_FMT_FLAG_COMPRESSED)) {
184 const struct vpu_core_resources *res = vpu_get_resource(inst);
185
186 if (res)
187 stride = res->stride;
188 }
189
190 for (i = 0; i < fmt->comp_planes; i++) {
191 fmt->sizeimage[i] = vpu_helper_get_plane_size(fmt->pixfmt,
192 fmt->width,
193 fmt->height,
194 i,
195 stride,
196 fmt->field != V4L2_FIELD_NONE ? 1 : 0,
197 &fmt->bytesperline[i]);
198 fmt->sizeimage[i] = max_t(u32, fmt->sizeimage[i], PAGE_SIZE);
199 if (fmt->flags & V4L2_FMT_FLAG_COMPRESSED) {
200 fmt->sizeimage[i] = clamp_val(fmt->sizeimage[i], SZ_128K, SZ_8M);
201 fmt->bytesperline[i] = 0;
202 }
203 }
204
205 return 0;
206 }
207
vpu_get_fmt_plane_size(struct vpu_format * fmt,u32 plane_no)208 u32 vpu_get_fmt_plane_size(struct vpu_format *fmt, u32 plane_no)
209 {
210 u32 size;
211 int i;
212
213 if (plane_no >= fmt->mem_planes)
214 return 0;
215
216 if (fmt->comp_planes == fmt->mem_planes)
217 return fmt->sizeimage[plane_no];
218 if (plane_no < fmt->mem_planes - 1)
219 return fmt->sizeimage[plane_no];
220
221 size = fmt->sizeimage[plane_no];
222 for (i = fmt->mem_planes; i < fmt->comp_planes; i++)
223 size += fmt->sizeimage[i];
224
225 return size;
226 }
227
vpu_try_fmt_common(struct vpu_inst * inst,struct v4l2_format * f,struct vpu_format * fmt)228 int vpu_try_fmt_common(struct vpu_inst *inst, struct v4l2_format *f, struct vpu_format *fmt)
229 {
230 struct v4l2_pix_format_mplane *pixmp = &f->fmt.pix_mp;
231 int i;
232 int ret;
233
234 fmt->pixfmt = pixmp->pixelformat;
235 fmt->type = f->type;
236 ret = vpu_init_format(inst, fmt);
237 if (ret < 0)
238 return ret;
239
240 fmt->width = pixmp->width;
241 fmt->height = pixmp->height;
242 if (fmt->width)
243 fmt->width = vpu_helper_valid_frame_width(inst, fmt->width);
244 if (fmt->height)
245 fmt->height = vpu_helper_valid_frame_height(inst, fmt->height);
246 fmt->field = pixmp->field == V4L2_FIELD_ANY ? V4L2_FIELD_NONE : pixmp->field;
247 vpu_calc_fmt_bytesperline(f, fmt);
248 vpu_calc_fmt_sizeimage(inst, fmt);
249 if ((fmt->flags & V4L2_FMT_FLAG_COMPRESSED) && pixmp->plane_fmt[0].sizeimage)
250 fmt->sizeimage[0] = clamp_val(pixmp->plane_fmt[0].sizeimage, SZ_128K, SZ_8M);
251
252 pixmp->pixelformat = fmt->pixfmt;
253 pixmp->width = fmt->width;
254 pixmp->height = fmt->height;
255 pixmp->flags = fmt->flags;
256 pixmp->num_planes = fmt->mem_planes;
257 pixmp->field = fmt->field;
258 memset(pixmp->reserved, 0, sizeof(pixmp->reserved));
259 for (i = 0; i < pixmp->num_planes; i++) {
260 pixmp->plane_fmt[i].bytesperline = fmt->bytesperline[i];
261 pixmp->plane_fmt[i].sizeimage = vpu_get_fmt_plane_size(fmt, i);
262 memset(pixmp->plane_fmt[i].reserved, 0, sizeof(pixmp->plane_fmt[i].reserved));
263 }
264
265 return 0;
266 }
267
vpu_check_ready(struct vpu_inst * inst,u32 type)268 static bool vpu_check_ready(struct vpu_inst *inst, u32 type)
269 {
270 if (!inst)
271 return false;
272 if (inst->state == VPU_CODEC_STATE_DEINIT || inst->id < 0)
273 return false;
274 if (!inst->ops->check_ready)
275 return true;
276 return call_vop(inst, check_ready, type);
277 }
278
vpu_process_output_buffer(struct vpu_inst * inst)279 int vpu_process_output_buffer(struct vpu_inst *inst)
280 {
281 struct v4l2_m2m_buffer *buf = NULL;
282 struct vb2_v4l2_buffer *vbuf = NULL;
283
284 if (!inst || !inst->fh.m2m_ctx)
285 return -EINVAL;
286
287 if (!vpu_check_ready(inst, inst->out_format.type))
288 return -EINVAL;
289
290 v4l2_m2m_for_each_src_buf(inst->fh.m2m_ctx, buf) {
291 vbuf = &buf->vb;
292 if (vpu_get_buffer_state(vbuf) == VPU_BUF_STATE_IDLE)
293 break;
294 vbuf = NULL;
295 }
296
297 if (!vbuf)
298 return -EINVAL;
299
300 dev_dbg(inst->dev, "[%d]frame id = %d / %d\n",
301 inst->id, vbuf->sequence, inst->sequence);
302 return call_vop(inst, process_output, &vbuf->vb2_buf);
303 }
304
vpu_process_capture_buffer(struct vpu_inst * inst)305 int vpu_process_capture_buffer(struct vpu_inst *inst)
306 {
307 struct v4l2_m2m_buffer *buf = NULL;
308 struct vb2_v4l2_buffer *vbuf = NULL;
309
310 if (!inst || !inst->fh.m2m_ctx)
311 return -EINVAL;
312
313 if (!vpu_check_ready(inst, inst->cap_format.type))
314 return -EINVAL;
315
316 v4l2_m2m_for_each_dst_buf(inst->fh.m2m_ctx, buf) {
317 vbuf = &buf->vb;
318 if (vpu_get_buffer_state(vbuf) == VPU_BUF_STATE_IDLE)
319 break;
320 vbuf = NULL;
321 }
322 if (!vbuf)
323 return -EINVAL;
324
325 return call_vop(inst, process_capture, &vbuf->vb2_buf);
326 }
327
vpu_next_src_buf(struct vpu_inst * inst)328 struct vb2_v4l2_buffer *vpu_next_src_buf(struct vpu_inst *inst)
329 {
330 struct vb2_v4l2_buffer *src_buf = NULL;
331
332 if (!inst->fh.m2m_ctx)
333 return NULL;
334
335 src_buf = v4l2_m2m_next_src_buf(inst->fh.m2m_ctx);
336 if (!src_buf || vpu_get_buffer_state(src_buf) == VPU_BUF_STATE_IDLE)
337 return NULL;
338
339 while (vpu_vb_is_codecconfig(src_buf)) {
340 v4l2_m2m_src_buf_remove(inst->fh.m2m_ctx);
341 vpu_set_buffer_state(src_buf, VPU_BUF_STATE_IDLE);
342 v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
343
344 src_buf = v4l2_m2m_next_src_buf(inst->fh.m2m_ctx);
345 if (!src_buf || vpu_get_buffer_state(src_buf) == VPU_BUF_STATE_IDLE)
346 return NULL;
347 }
348
349 return src_buf;
350 }
351
vpu_skip_frame(struct vpu_inst * inst,int count)352 void vpu_skip_frame(struct vpu_inst *inst, int count)
353 {
354 struct vb2_v4l2_buffer *src_buf;
355 enum vb2_buffer_state state;
356 int i = 0;
357
358 if (count <= 0 || !inst->fh.m2m_ctx)
359 return;
360
361 while (i < count) {
362 src_buf = v4l2_m2m_src_buf_remove(inst->fh.m2m_ctx);
363 if (!src_buf || vpu_get_buffer_state(src_buf) == VPU_BUF_STATE_IDLE)
364 return;
365 if (vpu_get_buffer_state(src_buf) == VPU_BUF_STATE_DECODED)
366 state = VB2_BUF_STATE_DONE;
367 else
368 state = VB2_BUF_STATE_ERROR;
369 i++;
370 vpu_set_buffer_state(src_buf, VPU_BUF_STATE_IDLE);
371 v4l2_m2m_buf_done(src_buf, state);
372 }
373 }
374
vpu_find_buf_by_sequence(struct vpu_inst * inst,u32 type,u32 sequence)375 struct vb2_v4l2_buffer *vpu_find_buf_by_sequence(struct vpu_inst *inst, u32 type, u32 sequence)
376 {
377 struct v4l2_m2m_buffer *buf = NULL;
378 struct vb2_v4l2_buffer *vbuf = NULL;
379
380 if (!inst || !inst->fh.m2m_ctx)
381 return NULL;
382
383 if (V4L2_TYPE_IS_OUTPUT(type)) {
384 v4l2_m2m_for_each_src_buf(inst->fh.m2m_ctx, buf) {
385 vbuf = &buf->vb;
386 if (vbuf->sequence == sequence)
387 break;
388 vbuf = NULL;
389 }
390 } else {
391 v4l2_m2m_for_each_dst_buf(inst->fh.m2m_ctx, buf) {
392 vbuf = &buf->vb;
393 if (vbuf->sequence == sequence)
394 break;
395 vbuf = NULL;
396 }
397 }
398
399 return vbuf;
400 }
401
vpu_find_buf_by_idx(struct vpu_inst * inst,u32 type,u32 idx)402 struct vb2_v4l2_buffer *vpu_find_buf_by_idx(struct vpu_inst *inst, u32 type, u32 idx)
403 {
404 struct v4l2_m2m_buffer *buf = NULL;
405 struct vb2_v4l2_buffer *vbuf = NULL;
406
407 if (!inst || !inst->fh.m2m_ctx)
408 return NULL;
409
410 if (V4L2_TYPE_IS_OUTPUT(type)) {
411 v4l2_m2m_for_each_src_buf(inst->fh.m2m_ctx, buf) {
412 vbuf = &buf->vb;
413 if (vbuf->vb2_buf.index == idx)
414 break;
415 vbuf = NULL;
416 }
417 } else {
418 v4l2_m2m_for_each_dst_buf(inst->fh.m2m_ctx, buf) {
419 vbuf = &buf->vb;
420 if (vbuf->vb2_buf.index == idx)
421 break;
422 vbuf = NULL;
423 }
424 }
425
426 return vbuf;
427 }
428
vpu_get_num_buffers(struct vpu_inst * inst,u32 type)429 int vpu_get_num_buffers(struct vpu_inst *inst, u32 type)
430 {
431 struct vb2_queue *q;
432
433 if (!inst || !inst->fh.m2m_ctx)
434 return -EINVAL;
435
436 if (V4L2_TYPE_IS_OUTPUT(type))
437 q = v4l2_m2m_get_src_vq(inst->fh.m2m_ctx);
438 else
439 q = v4l2_m2m_get_dst_vq(inst->fh.m2m_ctx);
440
441 return q->num_buffers;
442 }
443
vpu_m2m_device_run(void * priv)444 static void vpu_m2m_device_run(void *priv)
445 {
446 }
447
vpu_m2m_job_abort(void * priv)448 static void vpu_m2m_job_abort(void *priv)
449 {
450 struct vpu_inst *inst = priv;
451 struct v4l2_m2m_ctx *m2m_ctx = inst->fh.m2m_ctx;
452
453 v4l2_m2m_job_finish(m2m_ctx->m2m_dev, m2m_ctx);
454 }
455
456 static const struct v4l2_m2m_ops vpu_m2m_ops = {
457 .device_run = vpu_m2m_device_run,
458 .job_abort = vpu_m2m_job_abort
459 };
460
vpu_vb2_queue_setup(struct vb2_queue * vq,unsigned int * buf_count,unsigned int * plane_count,unsigned int psize[],struct device * allocators[])461 static int vpu_vb2_queue_setup(struct vb2_queue *vq,
462 unsigned int *buf_count,
463 unsigned int *plane_count,
464 unsigned int psize[],
465 struct device *allocators[])
466 {
467 struct vpu_inst *inst = vb2_get_drv_priv(vq);
468 struct vpu_format *cur_fmt;
469 int i;
470
471 cur_fmt = vpu_get_format(inst, vq->type);
472
473 if (*plane_count) {
474 if (*plane_count != cur_fmt->mem_planes)
475 return -EINVAL;
476 for (i = 0; i < cur_fmt->mem_planes; i++) {
477 if (psize[i] < vpu_get_fmt_plane_size(cur_fmt, i))
478 return -EINVAL;
479 }
480 return 0;
481 }
482
483 if (V4L2_TYPE_IS_OUTPUT(vq->type))
484 *buf_count = max_t(unsigned int, *buf_count, inst->min_buffer_out);
485 else
486 *buf_count = max_t(unsigned int, *buf_count, inst->min_buffer_cap);
487 *plane_count = cur_fmt->mem_planes;
488 for (i = 0; i < cur_fmt->mem_planes; i++)
489 psize[i] = vpu_get_fmt_plane_size(cur_fmt, i);
490
491 return 0;
492 }
493
vpu_vb2_buf_init(struct vb2_buffer * vb)494 static int vpu_vb2_buf_init(struct vb2_buffer *vb)
495 {
496 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
497
498 vpu_set_buffer_state(vbuf, VPU_BUF_STATE_IDLE);
499 return 0;
500 }
501
vpu_vb2_buf_out_validate(struct vb2_buffer * vb)502 static int vpu_vb2_buf_out_validate(struct vb2_buffer *vb)
503 {
504 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
505
506 vbuf->field = V4L2_FIELD_NONE;
507
508 return 0;
509 }
510
vpu_vb2_buf_prepare(struct vb2_buffer * vb)511 static int vpu_vb2_buf_prepare(struct vb2_buffer *vb)
512 {
513 struct vpu_inst *inst = vb2_get_drv_priv(vb->vb2_queue);
514 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
515 struct vpu_format *cur_fmt;
516 u32 i;
517
518 cur_fmt = vpu_get_format(inst, vb->type);
519 for (i = 0; i < cur_fmt->mem_planes; i++) {
520 if (vpu_get_vb_length(vb, i) < vpu_get_fmt_plane_size(cur_fmt, i)) {
521 dev_dbg(inst->dev, "[%d] %s buf[%d] is invalid\n",
522 inst->id, vpu_type_name(vb->type), vb->index);
523 vpu_set_buffer_state(vbuf, VPU_BUF_STATE_ERROR);
524 }
525 }
526
527 return 0;
528 }
529
vpu_vb2_buf_finish(struct vb2_buffer * vb)530 static void vpu_vb2_buf_finish(struct vb2_buffer *vb)
531 {
532 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
533 struct vpu_inst *inst = vb2_get_drv_priv(vb->vb2_queue);
534 struct vb2_queue *q = vb->vb2_queue;
535
536 if (vbuf->flags & V4L2_BUF_FLAG_LAST)
537 vpu_notify_eos(inst);
538
539 if (list_empty(&q->done_list))
540 call_void_vop(inst, on_queue_empty, q->type);
541 }
542
vpu_vb2_buffers_return(struct vpu_inst * inst,unsigned int type,enum vb2_buffer_state state)543 void vpu_vb2_buffers_return(struct vpu_inst *inst, unsigned int type, enum vb2_buffer_state state)
544 {
545 struct vb2_v4l2_buffer *buf;
546
547 if (V4L2_TYPE_IS_OUTPUT(type)) {
548 while ((buf = v4l2_m2m_src_buf_remove(inst->fh.m2m_ctx))) {
549 vpu_set_buffer_state(buf, VPU_BUF_STATE_IDLE);
550 v4l2_m2m_buf_done(buf, state);
551 }
552 } else {
553 while ((buf = v4l2_m2m_dst_buf_remove(inst->fh.m2m_ctx))) {
554 vpu_set_buffer_state(buf, VPU_BUF_STATE_IDLE);
555 v4l2_m2m_buf_done(buf, state);
556 }
557 }
558 }
559
vpu_vb2_start_streaming(struct vb2_queue * q,unsigned int count)560 static int vpu_vb2_start_streaming(struct vb2_queue *q, unsigned int count)
561 {
562 struct vpu_inst *inst = vb2_get_drv_priv(q);
563 struct vpu_format *fmt = vpu_get_format(inst, q->type);
564 int ret;
565
566 vpu_inst_unlock(inst);
567 ret = vpu_inst_register(inst);
568 vpu_inst_lock(inst);
569 if (ret) {
570 vpu_vb2_buffers_return(inst, q->type, VB2_BUF_STATE_QUEUED);
571 return ret;
572 }
573
574 vpu_trace(inst->dev, "[%d] %s %c%c%c%c %dx%d %u(%u) %u(%u) %u(%u) %d\n",
575 inst->id, vpu_type_name(q->type),
576 fmt->pixfmt,
577 fmt->pixfmt >> 8,
578 fmt->pixfmt >> 16,
579 fmt->pixfmt >> 24,
580 fmt->width, fmt->height,
581 fmt->sizeimage[0], fmt->bytesperline[0],
582 fmt->sizeimage[1], fmt->bytesperline[1],
583 fmt->sizeimage[2], fmt->bytesperline[2],
584 q->num_buffers);
585 vb2_clear_last_buffer_dequeued(q);
586 ret = call_vop(inst, start, q->type);
587 if (ret)
588 vpu_vb2_buffers_return(inst, q->type, VB2_BUF_STATE_QUEUED);
589
590 return ret;
591 }
592
vpu_vb2_stop_streaming(struct vb2_queue * q)593 static void vpu_vb2_stop_streaming(struct vb2_queue *q)
594 {
595 struct vpu_inst *inst = vb2_get_drv_priv(q);
596
597 vpu_trace(inst->dev, "[%d] %s\n", inst->id, vpu_type_name(q->type));
598
599 call_void_vop(inst, stop, q->type);
600 vpu_vb2_buffers_return(inst, q->type, VB2_BUF_STATE_ERROR);
601 if (V4L2_TYPE_IS_OUTPUT(q->type))
602 inst->sequence = 0;
603 }
604
vpu_vb2_buf_queue(struct vb2_buffer * vb)605 static void vpu_vb2_buf_queue(struct vb2_buffer *vb)
606 {
607 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
608 struct vpu_inst *inst = vb2_get_drv_priv(vb->vb2_queue);
609
610 if (V4L2_TYPE_IS_OUTPUT(vb->type))
611 vbuf->sequence = inst->sequence++;
612
613 v4l2_m2m_buf_queue(inst->fh.m2m_ctx, vbuf);
614 vpu_process_output_buffer(inst);
615 vpu_process_capture_buffer(inst);
616 }
617
618 static const struct vb2_ops vpu_vb2_ops = {
619 .queue_setup = vpu_vb2_queue_setup,
620 .buf_init = vpu_vb2_buf_init,
621 .buf_out_validate = vpu_vb2_buf_out_validate,
622 .buf_prepare = vpu_vb2_buf_prepare,
623 .buf_finish = vpu_vb2_buf_finish,
624 .start_streaming = vpu_vb2_start_streaming,
625 .stop_streaming = vpu_vb2_stop_streaming,
626 .buf_queue = vpu_vb2_buf_queue,
627 .wait_prepare = vb2_ops_wait_prepare,
628 .wait_finish = vb2_ops_wait_finish,
629 };
630
vpu_m2m_queue_init(void * priv,struct vb2_queue * src_vq,struct vb2_queue * dst_vq)631 static int vpu_m2m_queue_init(void *priv, struct vb2_queue *src_vq, struct vb2_queue *dst_vq)
632 {
633 struct vpu_inst *inst = priv;
634 int ret;
635
636 src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
637 inst->out_format.type = src_vq->type;
638 src_vq->io_modes = VB2_MMAP | VB2_DMABUF;
639 src_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
640 src_vq->ops = &vpu_vb2_ops;
641 src_vq->mem_ops = &vb2_dma_contig_memops;
642 if (inst->type == VPU_CORE_TYPE_DEC && inst->use_stream_buffer)
643 src_vq->mem_ops = &vb2_vmalloc_memops;
644 src_vq->drv_priv = inst;
645 src_vq->buf_struct_size = sizeof(struct vpu_vb2_buffer);
646 src_vq->min_buffers_needed = 1;
647 src_vq->dev = inst->vpu->dev;
648 src_vq->lock = &inst->lock;
649 ret = vb2_queue_init(src_vq);
650 if (ret)
651 return ret;
652
653 dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
654 inst->cap_format.type = dst_vq->type;
655 dst_vq->io_modes = VB2_MMAP | VB2_DMABUF;
656 dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
657 dst_vq->ops = &vpu_vb2_ops;
658 dst_vq->mem_ops = &vb2_dma_contig_memops;
659 if (inst->type == VPU_CORE_TYPE_ENC && inst->use_stream_buffer)
660 dst_vq->mem_ops = &vb2_vmalloc_memops;
661 dst_vq->drv_priv = inst;
662 dst_vq->buf_struct_size = sizeof(struct vpu_vb2_buffer);
663 dst_vq->min_buffers_needed = 1;
664 dst_vq->dev = inst->vpu->dev;
665 dst_vq->lock = &inst->lock;
666 ret = vb2_queue_init(dst_vq);
667 if (ret) {
668 vb2_queue_release(src_vq);
669 return ret;
670 }
671
672 return 0;
673 }
674
vpu_v4l2_release(struct vpu_inst * inst)675 static int vpu_v4l2_release(struct vpu_inst *inst)
676 {
677 vpu_trace(inst->vpu->dev, "%p\n", inst);
678
679 vpu_release_core(inst->core);
680 put_device(inst->dev);
681
682 if (inst->workqueue) {
683 cancel_work_sync(&inst->msg_work);
684 destroy_workqueue(inst->workqueue);
685 inst->workqueue = NULL;
686 }
687
688 v4l2_ctrl_handler_free(&inst->ctrl_handler);
689 mutex_destroy(&inst->lock);
690 v4l2_fh_del(&inst->fh);
691 v4l2_fh_exit(&inst->fh);
692
693 call_void_vop(inst, cleanup);
694
695 return 0;
696 }
697
vpu_v4l2_open(struct file * file,struct vpu_inst * inst)698 int vpu_v4l2_open(struct file *file, struct vpu_inst *inst)
699 {
700 struct vpu_dev *vpu = video_drvdata(file);
701 struct vpu_func *func;
702 int ret = 0;
703
704 if (!inst || !inst->ops)
705 return -EINVAL;
706
707 if (inst->type == VPU_CORE_TYPE_ENC)
708 func = &vpu->encoder;
709 else
710 func = &vpu->decoder;
711
712 atomic_set(&inst->ref_count, 0);
713 vpu_inst_get(inst);
714 inst->vpu = vpu;
715 inst->core = vpu_request_core(vpu, inst->type);
716 if (inst->core)
717 inst->dev = get_device(inst->core->dev);
718 mutex_init(&inst->lock);
719 INIT_LIST_HEAD(&inst->cmd_q);
720 inst->id = VPU_INST_NULL_ID;
721 inst->release = vpu_v4l2_release;
722 inst->pid = current->pid;
723 inst->tgid = current->tgid;
724 inst->min_buffer_cap = 2;
725 inst->min_buffer_out = 2;
726 v4l2_fh_init(&inst->fh, func->vfd);
727 v4l2_fh_add(&inst->fh);
728
729 ret = call_vop(inst, ctrl_init);
730 if (ret)
731 goto error;
732
733 inst->fh.m2m_ctx = v4l2_m2m_ctx_init(func->m2m_dev, inst, vpu_m2m_queue_init);
734 if (IS_ERR(inst->fh.m2m_ctx)) {
735 dev_err(vpu->dev, "v4l2_m2m_ctx_init fail\n");
736 ret = PTR_ERR(inst->fh.m2m_ctx);
737 goto error;
738 }
739
740 inst->fh.ctrl_handler = &inst->ctrl_handler;
741 file->private_data = &inst->fh;
742 inst->state = VPU_CODEC_STATE_DEINIT;
743 inst->workqueue = alloc_workqueue("vpu_inst", WQ_UNBOUND | WQ_MEM_RECLAIM, 1);
744 if (inst->workqueue) {
745 INIT_WORK(&inst->msg_work, vpu_inst_run_work);
746 ret = kfifo_init(&inst->msg_fifo,
747 inst->msg_buffer,
748 rounddown_pow_of_two(sizeof(inst->msg_buffer)));
749 if (ret) {
750 destroy_workqueue(inst->workqueue);
751 inst->workqueue = NULL;
752 }
753 }
754 vpu_trace(vpu->dev, "tgid = %d, pid = %d, type = %s, inst = %p\n",
755 inst->tgid, inst->pid, vpu_core_type_desc(inst->type), inst);
756
757 return 0;
758 error:
759 vpu_inst_put(inst);
760 return ret;
761 }
762
vpu_v4l2_close(struct file * file)763 int vpu_v4l2_close(struct file *file)
764 {
765 struct vpu_dev *vpu = video_drvdata(file);
766 struct vpu_inst *inst = to_inst(file);
767
768 vpu_trace(vpu->dev, "tgid = %d, pid = %d, inst = %p\n", inst->tgid, inst->pid, inst);
769
770 vpu_inst_lock(inst);
771 if (inst->fh.m2m_ctx) {
772 v4l2_m2m_ctx_release(inst->fh.m2m_ctx);
773 inst->fh.m2m_ctx = NULL;
774 }
775 vpu_inst_unlock(inst);
776
777 call_void_vop(inst, release);
778 vpu_inst_unregister(inst);
779 vpu_inst_put(inst);
780
781 return 0;
782 }
783
vpu_add_func(struct vpu_dev * vpu,struct vpu_func * func)784 int vpu_add_func(struct vpu_dev *vpu, struct vpu_func *func)
785 {
786 struct video_device *vfd;
787 int ret;
788
789 if (!vpu || !func)
790 return -EINVAL;
791
792 if (func->vfd)
793 return 0;
794
795 func->m2m_dev = v4l2_m2m_init(&vpu_m2m_ops);
796 if (IS_ERR(func->m2m_dev)) {
797 dev_err(vpu->dev, "v4l2_m2m_init fail\n");
798 func->vfd = NULL;
799 return PTR_ERR(func->m2m_dev);
800 }
801
802 vfd = video_device_alloc();
803 if (!vfd) {
804 v4l2_m2m_release(func->m2m_dev);
805 dev_err(vpu->dev, "alloc vpu decoder video device fail\n");
806 return -ENOMEM;
807 }
808 vfd->release = video_device_release;
809 vfd->vfl_dir = VFL_DIR_M2M;
810 vfd->v4l2_dev = &vpu->v4l2_dev;
811 vfd->device_caps = V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_STREAMING;
812 if (func->type == VPU_CORE_TYPE_ENC) {
813 strscpy(vfd->name, "amphion-vpu-encoder", sizeof(vfd->name));
814 vfd->fops = venc_get_fops();
815 vfd->ioctl_ops = venc_get_ioctl_ops();
816 } else {
817 strscpy(vfd->name, "amphion-vpu-decoder", sizeof(vfd->name));
818 vfd->fops = vdec_get_fops();
819 vfd->ioctl_ops = vdec_get_ioctl_ops();
820 }
821
822 ret = video_register_device(vfd, VFL_TYPE_VIDEO, -1);
823 if (ret) {
824 video_device_release(vfd);
825 v4l2_m2m_release(func->m2m_dev);
826 return ret;
827 }
828 video_set_drvdata(vfd, vpu);
829 func->vfd = vfd;
830
831 ret = v4l2_m2m_register_media_controller(func->m2m_dev, func->vfd, func->function);
832 if (ret) {
833 v4l2_m2m_release(func->m2m_dev);
834 func->m2m_dev = NULL;
835 video_unregister_device(func->vfd);
836 func->vfd = NULL;
837 return ret;
838 }
839
840 return 0;
841 }
842
vpu_remove_func(struct vpu_func * func)843 void vpu_remove_func(struct vpu_func *func)
844 {
845 if (!func)
846 return;
847
848 if (func->m2m_dev) {
849 v4l2_m2m_unregister_media_controller(func->m2m_dev);
850 v4l2_m2m_release(func->m2m_dev);
851 func->m2m_dev = NULL;
852 }
853 if (func->vfd) {
854 video_unregister_device(func->vfd);
855 func->vfd = NULL;
856 }
857 }
858