1#
2# Copyright 2020, Data61, CSIRO (ABN 41 687 119 230)
3# Copyright 2020, HENSOLDT Cyber GmbH
4#
5# SPDX-License-Identifier: GPL-2.0-only
6#
7
8
9# Documentation for bindings is relative to Documentation/devicetree/bindings in Linux,
10# unless otherwise noted.
11
12devices:
13  # ARM GIC (interrupt-controller/arm,gic.txt)
14  - compatible:
15      - arm,cortex-a15-gic
16      - arm,cortex-a7-gic
17      - arm,cortex-a9-gic
18      - arm,gic-400
19      - qcom,msm-qgic2
20    regions:
21      # distributor
22      - index: 0
23        kernel: GIC_V2_DISTRIBUTOR_PPTR
24        kernel_size: 0x1000
25      # controller
26      - index: 1
27        kernel: GIC_V2_CONTROLLER_PPTR
28        kernel_size: 0x1000
29      # GICV
30      - index: 2
31        kernel: GIC_V2_VCPUCTRL_PPTR
32        macro: CONFIG_ARM_HYPERVISOR_SUPPORT
33        kernel_size: 0x1000
34    interrupts:
35      INTERRUPT_VGIC_MAINTENANCE: 0
36  # ARM GICv3
37  # We only need GIC distributor and GIC redistributor regions and
38  # use system registers for GICC, GICH.
39  - compatible:
40      - arm,gic-v3
41    regions:
42      # GICDistributor
43      - index: 0
44        kernel: GICD_PPTR
45        kernel_size: 0x10000
46      # GICRedistributor
47      - index: 1
48        kernel: GICR_PPTR
49        # Assume 8 cores max
50        kernel_size: 0x100000
51    interrupts:
52      INTERRUPT_VGIC_MAINTENANCE: 0
53  # Broadcom second level IRQ controller (interrupt-controller/brcm,bcm2835-armctrl-ic.txt),
54  - compatible:
55      - brcm,bcm2836-armctrl-ic
56    regions:
57      - index: 0
58        kernel: INTC_PPTR
59        # the pi 3 exposes another timer at 0x3f00b400, which is in the same page as
60        # this, so we need to give this region to userspace :-(
61        user: true
62  # TI AM33XX/OMAP3 intc (interrupt-controller/ti,omap-intc-irq.txt)
63  - compatible:
64      - ti,am33xx-intc
65      - ti,omap3-intc
66    regions:
67      - index: 0
68        kernel: INTC_PPTR
69  # Broadcom top level IRQ controller (interrupt-controller/brcm,bcm2836-l1-intc.txt)
70  - compatible:
71      - brcm,bcm2836-l1-intc
72    regions:
73      - index: 0
74        kernel: ARM_LOCAL_PPTR
75  # ARM PL310 L2 cache controller (arm/l2c2x0.txt)
76  - compatible:
77      - arm,pl310-cache
78    regions:
79      - index: 0
80        kernel: L2CC_L2C310_PPTR
81  # Exynos multi core timer (timer/samsung,exynos4210-mct.txt)
82  # Exynos4412 MCT is separate as we use it for the timer IRQ.
83  # Other Exynos platforms use the ARM architecture timer.
84  - compatible:
85      - samsung,exynos4412-mct
86    regions:
87      - index: 0
88        kernel: EXYNOS_MCT_PPTR
89    interrupts:
90      KERNEL_TIMER_IRQ: 0
91  - compatible:
92      - samsung,exynos4210-mct
93    regions:
94      - index: 0
95        kernel: EXYNOS_MCT_PPTR
96  # ARM PMU (arm/pmu.txt)
97  - compatible:
98      - arm,armv8-pmuv3
99      - arm,cortex-a15-pmu
100      - arm,cortex-a7-pmu
101      - arm,cortex-a9-pmu
102    interrupts:
103      KERNEL_PMU_IRQ: boot-cpu
104  # Tegra SMMU (memory-controllers/nvidia,tegra30-mc.txt)
105  - compatible:
106      - arm,mmu-500
107    regions:
108      - index: 0
109        kernel: SMMU_PPTR
110        macro: CONFIG_ARM_SMMU
111    interrupts:
112      INTERRUPT_SMMU: 0
113  - compatible:
114      - nvidia,tegra124-mc
115    regions:
116      - index: 0
117        kernel: SMMU_PPTR
118        macro: CONFIG_TK1_SMMU
119    interrupts:
120      INTERRUPT_SMMU: 0
121  # ARM architected timer (timer/arm,arch_timer.txt)
122  - compatible:
123      - arm,armv7-timer
124      - arm,armv8-timer
125    interrupts:
126      KERNEL_TIMER_IRQ:
127        sel_macro: CONFIG_ARM_HYPERVISOR_SUPPORT
128        index: 3
129        undef_index: 2
130      INTERRUPT_VTIMER_EVENT: 2
131  # ARM per-core timer-watchdog (timer/arm,twd.txt)
132  - compatible:
133      - arm,cortex-a9-twd-timer
134    regions:
135      - index: 0
136        kernel: ARM_MP_PRIV_TIMER_PPTR
137    interrupts:
138      KERNEL_TIMER_IRQ: 0
139  # Cortex-a9 global timer (timer/arm,global_timer.yaml)
140  - compatible:
141      - arm,cortex-a9-global-timer
142    regions:
143      - index: 0
144        kernel: TIMER_PPTR
145    interrupts:
146      # IMX6 also has the imx31-gpt.
147      KERNEL_TIMER_IRQ: 0
148  # QCOM Krait timer (timer/qcom,msm-timer.txt)
149  - compatible:
150      - qcom,kpss-timer
151    regions:
152      - index: 0
153        kernel: TIMER_PPTR
154    interrupts:
155      KERNEL_TIMER_IRQ: 0
156  # TI AM335x/OMAP3430 timer
157  - compatible:
158      - ti,am335x-timer
159      - ti,omap3430-timer
160    regions:
161      - index: 0
162        kernel: TIMER_PPTR
163    interrupts:
164      KERNEL_TIMER_IRQ: 0
165  # TI prcm (arm/omap/prcm.txt)
166  - compatible:
167      - ti,am3-prcm
168    regions:
169      - index: 0
170        kernel: CMPER_PPTR
171        user: true
172        kernel_size: 0x1000
173  # TI watchdog
174  - compatible:
175      - ti,omap3-wdt
176    regions:
177      - index: 0
178        kernel: WDT1_PPTR
179        user: true
180  # various serial consoles (`grep <compatible> serial/*`)
181  - compatible:
182      - amlogic,meson-gx-uart
183      - arm,pl011
184      - brcm,bcm2835-aux-uart
185      - fsl,imx6q-uart
186      - fsl,imx8qxp-lpuart
187      - fsl,imx6sx-uart
188      - nvidia,tegra124-hsuart
189      - nvidia,tegra20-uart
190      - qcom,msm-uartdm
191      - samsung,exynos4210-uart
192      - snps,dw-apb-uart
193      - ti,omap3-uart
194      - xlnx,xuartps
195      - ns16550a
196    regions:
197      - index: 0
198        kernel: UART_PPTR
199        macro: CONFIG_PRINTING
200        user: true
201        kernel_size: 0x1000
202
203  # SiFive U54/U74 PLIC (HiFive, Polarfire)
204  - compatible:
205      - riscv,plic0
206    regions:
207      - index: 0
208        kernel: PLIC_PPTR
209        kernel_size: 0x04000000
210
211  # elfloader rules
212  - compatible:
213      - arm,psci-0.2
214      - arm,psci-1.0
215  - compatible:
216      - fsl,imx6q-src
217      - fsl,imx6sx-src
218  - compatible:
219      - xlnx,zynq-reset
220