1 /* ----------------------------------------------------------------------
2 * Project: CMSIS DSP Library
3 * Title: arm_dot_prod_q15.c
4 * Description: Q15 dot product
5 *
6 * $Date: 27. January 2017
7 * $Revision: V.1.5.1
8 *
9 * Target Processor: Cortex-M cores
10 * -------------------------------------------------------------------- */
11 /*
12 * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
13 *
14 * SPDX-License-Identifier: Apache-2.0
15 *
16 * Licensed under the Apache License, Version 2.0 (the License); you may
17 * not use this file except in compliance with the License.
18 * You may obtain a copy of the License at
19 *
20 * www.apache.org/licenses/LICENSE-2.0
21 *
22 * Unless required by applicable law or agreed to in writing, software
23 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25 * See the License for the specific language governing permissions and
26 * limitations under the License.
27 */
28
29 #include "arm_math.h"
30
31 /**
32 * @ingroup groupMath
33 */
34
35 /**
36 * @addtogroup dot_prod
37 * @{
38 */
39
40 /**
41 * @brief Dot product of Q15 vectors.
42 * @param[in] *pSrcA points to the first input vector
43 * @param[in] *pSrcB points to the second input vector
44 * @param[in] blockSize number of samples in each vector
45 * @param[out] *result output result returned here
46 * @return none.
47 *
48 * <b>Scaling and Overflow Behavior:</b>
49 * \par
50 * The intermediate multiplications are in 1.15 x 1.15 = 2.30 format and these
51 * results are added to a 64-bit accumulator in 34.30 format.
52 * Nonsaturating additions are used and given that there are 33 guard bits in the accumulator
53 * there is no risk of overflow.
54 * The return result is in 34.30 format.
55 */
56
arm_dot_prod_q15(q15_t * pSrcA,q15_t * pSrcB,uint32_t blockSize,q63_t * result)57 void arm_dot_prod_q15(
58 q15_t * pSrcA,
59 q15_t * pSrcB,
60 uint32_t blockSize,
61 q63_t * result)
62 {
63 q63_t sum = 0; /* Temporary result storage */
64 uint32_t blkCnt; /* loop counter */
65
66 #if defined (ARM_MATH_DSP)
67
68 /* Run the below code for Cortex-M4 and Cortex-M3 */
69
70
71 /*loop Unrolling */
72 blkCnt = blockSize >> 2u;
73
74 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
75 ** a second loop below computes the remaining 1 to 3 samples. */
76 while (blkCnt > 0u)
77 {
78 /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
79 /* Calculate dot product and then store the result in a temporary buffer. */
80 sum = __SMLALD(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++, sum);
81 sum = __SMLALD(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++, sum);
82
83 /* Decrement the loop counter */
84 blkCnt--;
85 }
86
87 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
88 ** No loop unrolling is used. */
89 blkCnt = blockSize % 0x4u;
90
91 while (blkCnt > 0u)
92 {
93 /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
94 /* Calculate dot product and then store the results in a temporary buffer. */
95 sum = __SMLALD(*pSrcA++, *pSrcB++, sum);
96
97 /* Decrement the loop counter */
98 blkCnt--;
99 }
100
101
102 #else
103
104 /* Run the below code for Cortex-M0 */
105
106 /* Initialize blkCnt with number of samples */
107 blkCnt = blockSize;
108
109 while (blkCnt > 0u)
110 {
111 /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
112 /* Calculate dot product and then store the results in a temporary buffer. */
113 sum += (q63_t) ((q31_t) * pSrcA++ * *pSrcB++);
114
115 /* Decrement the loop counter */
116 blkCnt--;
117 }
118
119 #endif /* #if defined (ARM_MATH_DSP) */
120
121 /* Store the result in the destination buffer in 34.30 format */
122 *result = sum;
123
124 }
125
126 /**
127 * @} end of dot_prod group
128 */
129