1 /* ----------------------------------------------------------------------
2 * Project: CMSIS DSP Library
3 * Title: arm_offset_q15.c
4 * Description: Q15 vector offset
5 *
6 * $Date: 27. January 2017
7 * $Revision: V.1.5.1
8 *
9 * Target Processor: Cortex-M cores
10 * -------------------------------------------------------------------- */
11 /*
12 * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
13 *
14 * SPDX-License-Identifier: Apache-2.0
15 *
16 * Licensed under the Apache License, Version 2.0 (the License); you may
17 * not use this file except in compliance with the License.
18 * You may obtain a copy of the License at
19 *
20 * www.apache.org/licenses/LICENSE-2.0
21 *
22 * Unless required by applicable law or agreed to in writing, software
23 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25 * See the License for the specific language governing permissions and
26 * limitations under the License.
27 */
28
29 #include "arm_math.h"
30
31 /**
32 * @ingroup groupMath
33 */
34
35 /**
36 * @addtogroup offset
37 * @{
38 */
39
40 /**
41 * @brief Adds a constant offset to a Q15 vector.
42 * @param[in] *pSrc points to the input vector
43 * @param[in] offset is the offset to be added
44 * @param[out] *pDst points to the output vector
45 * @param[in] blockSize number of samples in the vector
46 * @return none.
47 *
48 * <b>Scaling and Overflow Behavior:</b>
49 * \par
50 * The function uses saturating arithmetic.
51 * Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
52 */
53
arm_offset_q15(q15_t * pSrc,q15_t offset,q15_t * pDst,uint32_t blockSize)54 void arm_offset_q15(
55 q15_t * pSrc,
56 q15_t offset,
57 q15_t * pDst,
58 uint32_t blockSize)
59 {
60 uint32_t blkCnt; /* loop counter */
61
62 #if defined (ARM_MATH_DSP)
63
64 /* Run the below code for Cortex-M4 and Cortex-M3 */
65 q31_t offset_packed; /* Offset packed to 32 bit */
66
67
68 /*loop Unrolling */
69 blkCnt = blockSize >> 2u;
70
71 /* Offset is packed to 32 bit in order to use SIMD32 for addition */
72 offset_packed = __PKHBT(offset, offset, 16);
73
74 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
75 ** a second loop below computes the remaining 1 to 3 samples. */
76 while (blkCnt > 0u)
77 {
78 /* C = A + offset */
79 /* Add offset and then store the results in the destination buffer, 2 samples at a time. */
80 *__SIMD32(pDst)++ = __QADD16(*__SIMD32(pSrc)++, offset_packed);
81 *__SIMD32(pDst)++ = __QADD16(*__SIMD32(pSrc)++, offset_packed);
82
83 /* Decrement the loop counter */
84 blkCnt--;
85 }
86
87 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
88 ** No loop unrolling is used. */
89 blkCnt = blockSize % 0x4u;
90
91 while (blkCnt > 0u)
92 {
93 /* C = A + offset */
94 /* Add offset and then store the results in the destination buffer. */
95 *pDst++ = (q15_t) __QADD16(*pSrc++, offset);
96
97 /* Decrement the loop counter */
98 blkCnt--;
99 }
100
101 #else
102
103 /* Run the below code for Cortex-M0 */
104
105 /* Initialize blkCnt with number of samples */
106 blkCnt = blockSize;
107
108 while (blkCnt > 0u)
109 {
110 /* C = A + offset */
111 /* Add offset and then store the results in the destination buffer. */
112 *pDst++ = (q15_t) __SSAT(((q31_t) * pSrc++ + offset), 16);
113
114 /* Decrement the loop counter */
115 blkCnt--;
116 }
117
118 #endif /* #if defined (ARM_MATH_DSP) */
119
120 }
121
122 /**
123 * @} end of offset group
124 */
125