1 /* ----------------------------------------------------------------------
2 * Project: CMSIS DSP Library
3 * Title: arm_add_q15.c
4 * Description: Q15 vector addition
5 *
6 * $Date: 27. January 2017
7 * $Revision: V.1.5.1
8 *
9 * Target Processor: Cortex-M cores
10 * -------------------------------------------------------------------- */
11 /*
12 * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
13 *
14 * SPDX-License-Identifier: Apache-2.0
15 *
16 * Licensed under the Apache License, Version 2.0 (the License); you may
17 * not use this file except in compliance with the License.
18 * You may obtain a copy of the License at
19 *
20 * www.apache.org/licenses/LICENSE-2.0
21 *
22 * Unless required by applicable law or agreed to in writing, software
23 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25 * See the License for the specific language governing permissions and
26 * limitations under the License.
27 */
28
29 #include "arm_math.h"
30
31 /**
32 * @ingroup groupMath
33 */
34
35 /**
36 * @addtogroup BasicAdd
37 * @{
38 */
39
40 /**
41 * @brief Q15 vector addition.
42 * @param[in] *pSrcA points to the first input vector
43 * @param[in] *pSrcB points to the second input vector
44 * @param[out] *pDst points to the output vector
45 * @param[in] blockSize number of samples in each vector
46 * @return none.
47 *
48 * <b>Scaling and Overflow Behavior:</b>
49 * \par
50 * The function uses saturating arithmetic.
51 * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
52 */
53
arm_add_q15(q15_t * pSrcA,q15_t * pSrcB,q15_t * pDst,uint32_t blockSize)54 void arm_add_q15(
55 q15_t * pSrcA,
56 q15_t * pSrcB,
57 q15_t * pDst,
58 uint32_t blockSize)
59 {
60 uint32_t blkCnt; /* loop counter */
61
62 #if defined (ARM_MATH_DSP)
63
64 /* Run the below code for Cortex-M4 and Cortex-M3 */
65 q31_t inA1, inA2, inB1, inB2;
66
67 /*loop Unrolling */
68 blkCnt = blockSize >> 2u;
69
70 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
71 ** a second loop below computes the remaining 1 to 3 samples. */
72 while (blkCnt > 0u)
73 {
74 /* C = A + B */
75 /* Add and then store the results in the destination buffer. */
76 inA1 = *__SIMD32(pSrcA)++;
77 inA2 = *__SIMD32(pSrcA)++;
78 inB1 = *__SIMD32(pSrcB)++;
79 inB2 = *__SIMD32(pSrcB)++;
80
81 *__SIMD32(pDst)++ = __QADD16(inA1, inB1);
82 *__SIMD32(pDst)++ = __QADD16(inA2, inB2);
83
84 /* Decrement the loop counter */
85 blkCnt--;
86 }
87
88 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
89 ** No loop unrolling is used. */
90 blkCnt = blockSize % 0x4u;
91
92 while (blkCnt > 0u)
93 {
94 /* C = A + B */
95 /* Add and then store the results in the destination buffer. */
96 *pDst++ = (q15_t) __QADD16(*pSrcA++, *pSrcB++);
97
98 /* Decrement the loop counter */
99 blkCnt--;
100 }
101
102 #else
103
104 /* Run the below code for Cortex-M0 */
105
106
107
108 /* Initialize blkCnt with number of samples */
109 blkCnt = blockSize;
110
111 while (blkCnt > 0u)
112 {
113 /* C = A + B */
114 /* Add and then store the results in the destination buffer. */
115 *pDst++ = (q15_t) __SSAT(((q31_t) * pSrcA++ + *pSrcB++), 16);
116
117 /* Decrement the loop counter */
118 blkCnt--;
119 }
120
121 #endif /* #if defined (ARM_MATH_DSP) */
122
123
124 }
125
126 /**
127 * @} end of BasicAdd group
128 */
129