1 /*
2  * Copyright (c) 2013, Google Inc. All rights reserved.
3  *
4  * Use of this source code is governed by a MIT-style
5  * license that can be found in the LICENSE file or at
6  * https://opensource.org/licenses/MIT
7  */
8 #ifndef __DEV_INTERRUPT_ARM_GIC_H
9 #define __DEV_INTERRUPT_ARM_GIC_H
10 
11 #include <sys/types.h>
12 
13 void arm_gic_init(void);
14 
15 #define GIC_BASE_SGI 0
16 #define GIC_BASE_PPI 16
17 #define GIC_BASE_SPI 32
18 
19 enum interrupt_trigger_mode {
20     IRQ_TRIGGER_MODE_EDGE = 0,
21     IRQ_TRIGGER_MODE_LEVEL = 1,
22 };
23 
24 enum interrupt_polarity {
25     IRQ_POLARITY_ACTIVE_HIGH = 0,
26     IRQ_POLARITY_ACTIVE_LOW = 1,
27 };
28 
29 enum {
30     /* Ignore cpu_mask and forward interrupt to all CPUs other than the current cpu */
31     ARM_GIC_SGI_FLAG_TARGET_FILTER_NOT_SENDER = 0x1,
32     /* Ignore cpu_mask and forward interrupt to current CPU only */
33     ARM_GIC_SGI_FLAG_TARGET_FILTER_SENDER = 0x2,
34     ARM_GIC_SGI_FLAG_TARGET_FILTER_MASK = 0x3,
35 
36     /* Only forward the interrupt to CPUs that has the interrupt configured as group 1 (non-secure) */
37     ARM_GIC_SGI_FLAG_NS = 0x4,
38 };
39 status_t arm_gic_sgi(u_int irq, u_int flags, u_int cpu_mask);
40 
41 #endif
42 
43