1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. 3 */ 4 5 #ifndef _DPU_HW_SSPP_H 6 #define _DPU_HW_SSPP_H 7 8 #include "dpu_hw_catalog.h" 9 #include "dpu_hw_mdss.h" 10 #include "dpu_hw_util.h" 11 #include "dpu_formats.h" 12 13 struct dpu_hw_pipe; 14 15 /** 16 * Flags 17 */ 18 #define DPU_SSPP_FLIP_LR BIT(0) 19 #define DPU_SSPP_FLIP_UD BIT(1) 20 #define DPU_SSPP_SOURCE_ROTATED_90 BIT(2) 21 #define DPU_SSPP_ROT_90 BIT(3) 22 #define DPU_SSPP_SOLID_FILL BIT(4) 23 24 /** 25 * Define all scaler feature bits in catalog 26 */ 27 #define DPU_SSPP_SCALER (BIT(DPU_SSPP_SCALER_RGB) | \ 28 BIT(DPU_SSPP_SCALER_QSEED2) | \ 29 BIT(DPU_SSPP_SCALER_QSEED3) | \ 30 BIT(DPU_SSPP_SCALER_QSEED3LITE) | \ 31 BIT(DPU_SSPP_SCALER_QSEED4)) 32 33 /* 34 * Define all CSC feature bits in catalog 35 */ 36 #define DPU_SSPP_CSC_ANY (BIT(DPU_SSPP_CSC) | \ 37 BIT(DPU_SSPP_CSC_10BIT)) 38 39 /** 40 * Component indices 41 */ 42 enum { 43 DPU_SSPP_COMP_0, 44 DPU_SSPP_COMP_1_2, 45 DPU_SSPP_COMP_2, 46 DPU_SSPP_COMP_3, 47 48 DPU_SSPP_COMP_MAX 49 }; 50 51 /** 52 * DPU_SSPP_RECT_SOLO - multirect disabled 53 * DPU_SSPP_RECT_0 - rect0 of a multirect pipe 54 * DPU_SSPP_RECT_1 - rect1 of a multirect pipe 55 * 56 * Note: HW supports multirect with either RECT0 or 57 * RECT1. Considering no benefit of such configs over 58 * SOLO mode and to keep the plane management simple, 59 * we dont support single rect multirect configs. 60 */ 61 enum dpu_sspp_multirect_index { 62 DPU_SSPP_RECT_SOLO = 0, 63 DPU_SSPP_RECT_0, 64 DPU_SSPP_RECT_1, 65 }; 66 67 enum dpu_sspp_multirect_mode { 68 DPU_SSPP_MULTIRECT_NONE = 0, 69 DPU_SSPP_MULTIRECT_PARALLEL, 70 DPU_SSPP_MULTIRECT_TIME_MX, 71 }; 72 73 enum { 74 DPU_FRAME_LINEAR, 75 DPU_FRAME_TILE_A4X, 76 DPU_FRAME_TILE_A5X, 77 }; 78 79 enum dpu_hw_filter { 80 DPU_SCALE_FILTER_NEAREST = 0, 81 DPU_SCALE_FILTER_BIL, 82 DPU_SCALE_FILTER_PCMN, 83 DPU_SCALE_FILTER_CA, 84 DPU_SCALE_FILTER_MAX 85 }; 86 87 enum dpu_hw_filter_alpa { 88 DPU_SCALE_ALPHA_PIXEL_REP, 89 DPU_SCALE_ALPHA_BIL 90 }; 91 92 enum dpu_hw_filter_yuv { 93 DPU_SCALE_2D_4X4, 94 DPU_SCALE_2D_CIR, 95 DPU_SCALE_1D_SEP, 96 DPU_SCALE_BIL 97 }; 98 99 struct dpu_hw_sharp_cfg { 100 u32 strength; 101 u32 edge_thr; 102 u32 smooth_thr; 103 u32 noise_thr; 104 }; 105 106 struct dpu_hw_pixel_ext { 107 /* scaling factors are enabled for this input layer */ 108 uint8_t enable_pxl_ext; 109 110 int init_phase_x[DPU_MAX_PLANES]; 111 int phase_step_x[DPU_MAX_PLANES]; 112 int init_phase_y[DPU_MAX_PLANES]; 113 int phase_step_y[DPU_MAX_PLANES]; 114 115 /* 116 * Number of pixels extension in left, right, top and bottom direction 117 * for all color components. This pixel value for each color component 118 * should be sum of fetch + repeat pixels. 119 */ 120 int num_ext_pxls_left[DPU_MAX_PLANES]; 121 int num_ext_pxls_right[DPU_MAX_PLANES]; 122 int num_ext_pxls_top[DPU_MAX_PLANES]; 123 int num_ext_pxls_btm[DPU_MAX_PLANES]; 124 125 /* 126 * Number of pixels needs to be overfetched in left, right, top and 127 * bottom directions from source image for scaling. 128 */ 129 int left_ftch[DPU_MAX_PLANES]; 130 int right_ftch[DPU_MAX_PLANES]; 131 int top_ftch[DPU_MAX_PLANES]; 132 int btm_ftch[DPU_MAX_PLANES]; 133 134 /* 135 * Number of pixels needs to be repeated in left, right, top and 136 * bottom directions for scaling. 137 */ 138 int left_rpt[DPU_MAX_PLANES]; 139 int right_rpt[DPU_MAX_PLANES]; 140 int top_rpt[DPU_MAX_PLANES]; 141 int btm_rpt[DPU_MAX_PLANES]; 142 143 uint32_t roi_w[DPU_MAX_PLANES]; 144 uint32_t roi_h[DPU_MAX_PLANES]; 145 146 /* 147 * Filter type to be used for scaling in horizontal and vertical 148 * directions 149 */ 150 enum dpu_hw_filter horz_filter[DPU_MAX_PLANES]; 151 enum dpu_hw_filter vert_filter[DPU_MAX_PLANES]; 152 153 }; 154 155 /** 156 * struct dpu_hw_pipe_cfg : Pipe description 157 * @layout: format layout information for programming buffer to hardware 158 * @src_rect: src ROI, caller takes into account the different operations 159 * such as decimation, flip etc to program this field 160 * @dest_rect: destination ROI. 161 * @index: index of the rectangle of SSPP 162 * @mode: parallel or time multiplex multirect mode 163 */ 164 struct dpu_hw_pipe_cfg { 165 struct dpu_hw_fmt_layout layout; 166 struct drm_rect src_rect; 167 struct drm_rect dst_rect; 168 enum dpu_sspp_multirect_index index; 169 enum dpu_sspp_multirect_mode mode; 170 }; 171 172 /** 173 * struct dpu_hw_pipe_qos_cfg : Source pipe QoS configuration 174 * @creq_vblank: creq value generated to vbif during vertical blanking 175 * @danger_vblank: danger value generated during vertical blanking 176 * @vblank_en: enable creq_vblank and danger_vblank during vblank 177 * @danger_safe_en: enable danger safe generation 178 */ 179 struct dpu_hw_pipe_qos_cfg { 180 u32 creq_vblank; 181 u32 danger_vblank; 182 bool vblank_en; 183 bool danger_safe_en; 184 }; 185 186 /** 187 * enum CDP preload ahead address size 188 */ 189 enum { 190 DPU_SSPP_CDP_PRELOAD_AHEAD_32, 191 DPU_SSPP_CDP_PRELOAD_AHEAD_64 192 }; 193 194 /** 195 * struct dpu_hw_pipe_ts_cfg - traffic shaper configuration 196 * @size: size to prefill in bytes, or zero to disable 197 * @time: time to prefill in usec, or zero to disable 198 */ 199 struct dpu_hw_pipe_ts_cfg { 200 u64 size; 201 u64 time; 202 }; 203 204 /** 205 * struct dpu_hw_sspp_ops - interface to the SSPP Hw driver functions 206 * Caller must call the init function to get the pipe context for each pipe 207 * Assumption is these functions will be called after clocks are enabled 208 */ 209 struct dpu_hw_sspp_ops { 210 /** 211 * setup_format - setup pixel format cropping rectangle, flip 212 * @ctx: Pointer to pipe context 213 * @cfg: Pointer to pipe config structure 214 * @flags: Extra flags for format config 215 * @index: rectangle index in multirect 216 */ 217 void (*setup_format)(struct dpu_hw_pipe *ctx, 218 const struct dpu_format *fmt, u32 flags, 219 enum dpu_sspp_multirect_index index); 220 221 /** 222 * setup_rects - setup pipe ROI rectangles 223 * @ctx: Pointer to pipe context 224 * @cfg: Pointer to pipe config structure 225 * @index: rectangle index in multirect 226 */ 227 void (*setup_rects)(struct dpu_hw_pipe *ctx, 228 struct dpu_hw_pipe_cfg *cfg, 229 enum dpu_sspp_multirect_index index); 230 231 /** 232 * setup_pe - setup pipe pixel extension 233 * @ctx: Pointer to pipe context 234 * @pe_ext: Pointer to pixel ext settings 235 */ 236 void (*setup_pe)(struct dpu_hw_pipe *ctx, 237 struct dpu_hw_pixel_ext *pe_ext); 238 239 /** 240 * setup_sourceaddress - setup pipe source addresses 241 * @ctx: Pointer to pipe context 242 * @cfg: Pointer to pipe config structure 243 * @index: rectangle index in multirect 244 */ 245 void (*setup_sourceaddress)(struct dpu_hw_pipe *ctx, 246 struct dpu_hw_pipe_cfg *cfg, 247 enum dpu_sspp_multirect_index index); 248 249 /** 250 * setup_csc - setup color space coversion 251 * @ctx: Pointer to pipe context 252 * @data: Pointer to config structure 253 */ 254 void (*setup_csc)(struct dpu_hw_pipe *ctx, const struct dpu_csc_cfg *data); 255 256 /** 257 * setup_solidfill - enable/disable colorfill 258 * @ctx: Pointer to pipe context 259 * @const_color: Fill color value 260 * @flags: Pipe flags 261 * @index: rectangle index in multirect 262 */ 263 void (*setup_solidfill)(struct dpu_hw_pipe *ctx, u32 color, 264 enum dpu_sspp_multirect_index index); 265 266 /** 267 * setup_multirect - setup multirect configuration 268 * @ctx: Pointer to pipe context 269 * @index: rectangle index in multirect 270 * @mode: parallel fetch / time multiplex multirect mode 271 */ 272 273 void (*setup_multirect)(struct dpu_hw_pipe *ctx, 274 enum dpu_sspp_multirect_index index, 275 enum dpu_sspp_multirect_mode mode); 276 277 /** 278 * setup_sharpening - setup sharpening 279 * @ctx: Pointer to pipe context 280 * @cfg: Pointer to config structure 281 */ 282 void (*setup_sharpening)(struct dpu_hw_pipe *ctx, 283 struct dpu_hw_sharp_cfg *cfg); 284 285 /** 286 * setup_danger_safe_lut - setup danger safe LUTs 287 * @ctx: Pointer to pipe context 288 * @danger_lut: LUT for generate danger level based on fill level 289 * @safe_lut: LUT for generate safe level based on fill level 290 * 291 */ 292 void (*setup_danger_safe_lut)(struct dpu_hw_pipe *ctx, 293 u32 danger_lut, 294 u32 safe_lut); 295 296 /** 297 * setup_creq_lut - setup CREQ LUT 298 * @ctx: Pointer to pipe context 299 * @creq_lut: LUT for generate creq level based on fill level 300 * 301 */ 302 void (*setup_creq_lut)(struct dpu_hw_pipe *ctx, 303 u64 creq_lut); 304 305 /** 306 * setup_qos_ctrl - setup QoS control 307 * @ctx: Pointer to pipe context 308 * @cfg: Pointer to pipe QoS configuration 309 * 310 */ 311 void (*setup_qos_ctrl)(struct dpu_hw_pipe *ctx, 312 struct dpu_hw_pipe_qos_cfg *cfg); 313 314 /** 315 * setup_histogram - setup histograms 316 * @ctx: Pointer to pipe context 317 * @cfg: Pointer to histogram configuration 318 */ 319 void (*setup_histogram)(struct dpu_hw_pipe *ctx, 320 void *cfg); 321 322 /** 323 * setup_scaler - setup scaler 324 * @ctx: Pointer to pipe context 325 * @pipe_cfg: Pointer to pipe configuration 326 * @scaler_cfg: Pointer to scaler configuration 327 */ 328 void (*setup_scaler)(struct dpu_hw_pipe *ctx, 329 struct dpu_hw_pipe_cfg *pipe_cfg, 330 void *scaler_cfg); 331 332 /** 333 * get_scaler_ver - get scaler h/w version 334 * @ctx: Pointer to pipe context 335 */ 336 u32 (*get_scaler_ver)(struct dpu_hw_pipe *ctx); 337 338 /** 339 * setup_cdp - setup client driven prefetch 340 * @ctx: Pointer to pipe context 341 * @cfg: Pointer to cdp configuration 342 * @index: rectangle index in multirect 343 */ 344 void (*setup_cdp)(struct dpu_hw_pipe *ctx, 345 struct dpu_hw_cdp_cfg *cfg, 346 enum dpu_sspp_multirect_index index); 347 }; 348 349 /** 350 * struct dpu_hw_pipe - pipe description 351 * @base: hardware block base structure 352 * @hw: block hardware details 353 * @catalog: back pointer to catalog 354 * @mdp: pointer to associated mdp portion of the catalog 355 * @idx: pipe index 356 * @cap: pointer to layer_cfg 357 * @ops: pointer to operations possible for this pipe 358 */ 359 struct dpu_hw_pipe { 360 struct dpu_hw_blk base; 361 struct dpu_hw_blk_reg_map hw; 362 const struct dpu_mdss_cfg *catalog; 363 const struct dpu_mdp_cfg *mdp; 364 365 /* Pipe */ 366 enum dpu_sspp idx; 367 const struct dpu_sspp_cfg *cap; 368 369 /* Ops */ 370 struct dpu_hw_sspp_ops ops; 371 }; 372 373 struct dpu_kms; 374 /** 375 * dpu_hw_sspp_init - initializes the sspp hw driver object. 376 * Should be called once before accessing every pipe. 377 * @idx: Pipe index for which driver object is required 378 * @addr: Mapped register io address of MDP 379 * @catalog : Pointer to mdss catalog data 380 */ 381 struct dpu_hw_pipe *dpu_hw_sspp_init(enum dpu_sspp idx, 382 void __iomem *addr, const struct dpu_mdss_cfg *catalog); 383 384 /** 385 * dpu_hw_sspp_destroy(): Destroys SSPP driver context 386 * should be called during Hw pipe cleanup. 387 * @ctx: Pointer to SSPP driver context returned by dpu_hw_sspp_init 388 */ 389 void dpu_hw_sspp_destroy(struct dpu_hw_pipe *ctx); 390 391 void dpu_debugfs_sspp_init(struct dpu_kms *dpu_kms, struct dentry *debugfs_root); 392 int _dpu_hw_sspp_init_debugfs(struct dpu_hw_pipe *hw_pipe, struct dpu_kms *kms, struct dentry *entry); 393 394 #endif /*_DPU_HW_SSPP_H */ 395 396