1 /* SPDX-License-Identifier: BSD-2-Clause */
2 /*
3 * Copyright 2017 NXP
4 * All rights reserved.
5 *
6 * Peng Fan <peng.fan@nxp.com>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright notice,
12 * this list of conditions and the following disclaimer.
13 *
14 * 2. Redistributions in binary form must reproduce the above copyright notice,
15 * this list of conditions and the following disclaimer in the documentation
16 * and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31 #ifndef __DRIVERS_TZC380_H
32 #define __DRIVERS_TZC380_H
33
34 #include <stdint.h>
35 #include <tee_api_types.h>
36 #include <trace_levels.h>
37 #include <types_ext.h>
38 #include <util.h>
39
40 #define TZC400_REG_SIZE U(0x1000)
41
42 #define BUILD_CONFIG_OFF U(0x000)
43 #define ACTION_OFF U(0x004)
44 #define LOCKDOWN_RANGE_OFF U(0x008)
45 #define LOCKDOWN_SELECT_OFF U(0x00C)
46 #define INT_STATUS U(0x010)
47 #define INT_CLEAR U(0x014)
48
49 #define FAIL_ADDRESS_LOW_OFF U(0x020)
50 #define FAIL_ADDRESS_HIGH_OFF U(0x024)
51 #define FAIL_CONTROL_OFF U(0x028)
52 #define FAIL_ID U(0x02c)
53
54 #define SPECULATION_CTRL_OFF U(0x030)
55 #define SECURITY_INV_EN_OFF U(0x034)
56
57 #define REGION_SETUP_LOW_OFF(n) (U(0x100) + (n) * U(0x10))
58 #define REGION_SETUP_HIGH_OFF(n) (U(0x104) + (n) * U(0x10))
59 #define REGION_ATTRIBUTES_OFF(n) (U(0x108) + (n) * U(0x10))
60
61 /* ID Registers */
62 #define PID0_OFF U(0xfe0)
63 #define PID1_OFF U(0xfe4)
64 #define PID2_OFF U(0xfe8)
65 #define PID3_OFF U(0xfec)
66 #define PID4_OFF U(0xfd0)
67 #define CID0_OFF U(0xff0)
68 #define CID1_OFF U(0xff4)
69 #define CID2_OFF U(0xff8)
70 #define CID3_OFF U(0xffc)
71
72 #define BUILD_CONFIG_AW_SHIFT U(8)
73 #define BUILD_CONFIG_AW_MASK U(0x3f)
74 #define BUILD_CONFIG_NR_SHIFT U(0)
75 #define BUILD_CONFIG_NR_MASK U(0xf)
76
77 #define ACTION_RV_SHIFT U(0)
78 #define ACTION_RV_MASK U(0x3)
79 #define ACTION_RV_LOWOK U(0x0)
80 #define ACTION_RV_LOWERR U(0x1)
81 #define ACTION_RV_HIGHOK U(0x2)
82 #define ACTION_RV_HIGHERR U(0x3)
83
84 /* Speculation is enabled by default. */
85 #define SPECULATION_CTRL_WRITE_DISABLE BIT(1)
86 #define SPECULATION_CTRL_READ_DISABLE BIT(0)
87
88 #define INT_STATUS_OVERRUN_SHIFT U(1)
89 #define INT_STATUS_OVERRUN_MASK U(0x1)
90 #define INT_STATUS_STATUS_SHIFT U(0)
91 #define INT_STATUS_STATUS_MASK U(0x1)
92
93 #define INT_CLEAR_CLEAR_SHIFT U(0)
94 #define INT_CLEAR_CLEAR_MASK U(0x1)
95
96 #define TZC380_COMPONENT_ID U(0xb105f00d)
97 #define TZC380_PERIPH_ID_LOW U(0x001bb380)
98 #define TZC380_PERIPH_ID_HIGH U(0x00000004)
99
100 /*******************************************************************************
101 * Function & variable prototypes
102 ******************************************************************************/
103
104 /*
105 * What type of action is expected when an access violation occurs.
106 * The memory requested is zeroed. But we can also raise and event to
107 * let the system know it happened.
108 * We can raise an interrupt(INT) and/or cause an exception(ERR).
109 * TZC_ACTION_NONE - No interrupt, no Exception
110 * TZC_ACTION_ERR - No interrupt, raise exception -> sync external
111 * data abort
112 * TZC_ACTION_INT - Raise interrupt, no exception
113 * TZC_ACTION_ERR_INT - Raise interrupt, raise exception -> sync
114 * external data abort
115 */
116 enum tzc_action {
117 TZC_ACTION_NONE = 0,
118 TZC_ACTION_ERR = 1,
119 TZC_ACTION_INT = 2,
120 TZC_ACTION_ERR_INT = (TZC_ACTION_ERR | TZC_ACTION_INT)
121 };
122
123
124 #define TZC_SP_NS_W BIT(0)
125 #define TZC_SP_NS_R BIT(1)
126 #define TZC_SP_S_W BIT(2)
127 #define TZC_SP_S_R BIT(3)
128
129 #define TZC_ATTR_SP_SHIFT U(28)
130 #define TZC_ATTR_SP_MASK GENMASK_32(31, 28)
131 #define TZC_ATTR_SP_ALL SHIFT_U32(TZC_SP_S_W | TZC_SP_S_R | \
132 TZC_SP_NS_W | TZC_SP_NS_R, \
133 TZC_ATTR_SP_SHIFT)
134 #define TZC_ATTR_SP_S_RW SHIFT_U32(TZC_SP_S_W | TZC_SP_S_R, \
135 TZC_ATTR_SP_SHIFT)
136 #define TZC_ATTR_SP_NS_RW SHIFT_U32(TZC_SP_NS_W | TZC_SP_NS_R, \
137 TZC_ATTR_SP_SHIFT)
138
139 #define TZC_REGION_SIZE_32K U(0xe)
140 #define TZC_REGION_SIZE_64K U(0xf)
141 #define TZC_REGION_SIZE_128K U(0x10)
142 #define TZC_REGION_SIZE_256K U(0x11)
143 #define TZC_REGION_SIZE_512K U(0x12)
144 #define TZC_REGION_SIZE_1M U(0x13)
145 #define TZC_REGION_SIZE_2M U(0x14)
146 #define TZC_REGION_SIZE_4M U(0x15)
147 #define TZC_REGION_SIZE_8M U(0x16)
148 #define TZC_REGION_SIZE_16M U(0x17)
149 #define TZC_REGION_SIZE_32M U(0x18)
150 #define TZC_REGION_SIZE_64M U(0x19)
151 #define TZC_REGION_SIZE_128M U(0x1a)
152 #define TZC_REGION_SIZE_256M U(0x1b)
153 #define TZC_REGION_SIZE_512M U(0x1c)
154 #define TZC_REGION_SIZE_1G U(0x1d)
155 #define TZC_REGION_SIZE_2G U(0x1e)
156 #define TZC_REGION_SIZE_4G U(0x1f)
157 #define TZC_REGION_SIZE_8G U(0x20)
158 #define TZC_REGION_SIZE_16G U(0x21)
159 #define TZC_REGION_SIZE_32G U(0x22)
160 #define TZC_REGION_SIZE_64G U(0x23)
161 #define TZC_REGION_SIZE_128G U(0x24)
162 #define TZC_REGION_SIZE_256G U(0x25)
163 #define TZC_REGION_SIZE_512G U(0x26)
164 #define TZC_REGION_SIZE_1T U(0x27)
165 #define TZC_REGION_SIZE_2T U(0x28)
166 #define TZC_REGION_SIZE_4T U(0x29)
167 #define TZC_REGION_SIZE_8T U(0x2a)
168 #define TZC_REGION_SIZE_16T U(0x2b)
169 #define TZC_REGION_SIZE_32T U(0x2c)
170 #define TZC_REGION_SIZE_64T U(0x2d)
171 #define TZC_REGION_SIZE_128T U(0x2e)
172 #define TZC_REGION_SIZE_256T U(0x2f)
173 #define TZC_REGION_SIZE_512T U(0x30)
174 #define TZC_REGION_SIZE_1P U(0x31)
175 #define TZC_REGION_SIZE_2P U(0x32)
176 #define TZC_REGION_SIZE_4P U(0x33)
177 #define TZC_REGION_SIZE_8P U(0x34)
178 #define TZC_REGION_SIZE_16P U(0x35)
179 #define TZC_REGION_SIZE_32P U(0x36)
180 #define TZC_REGION_SIZE_64P U(0x37)
181 #define TZC_REGION_SIZE_128P U(0x38)
182 #define TZC_REGION_SIZE_256P U(0x39)
183 #define TZC_REGION_SIZE_512P U(0x3a)
184 #define TZC_REGION_SIZE_1E U(0x3b)
185 #define TZC_REGION_SIZE_2E U(0x3c)
186 #define TZC_REGION_SIZE_4E U(0x3d)
187 #define TZC_REGION_SIZE_8E U(0x3e)
188 #define TZC_REGION_SIZE_16E U(0x3f)
189
190 #define TZC_REGION_SIZE_SHIFT U(0x1)
191 #define TZC_REGION_SIZE_MASK GENMASK_32(6, 1)
192 #define TZC_ATTR_REGION_SIZE(s) SHIFT_U32(s, TZC_REGION_SIZE_SHIFT)
193
194 #define TZC_SUBREGION_DIS_SHIFT U(8)
195 #define TZC_SUBREGION_DIS_MASK GENMASK_32(15, 8)
196 #define TZC_ATTR_SUBREGION_DIS(subreg) \
197 (BIT((subreg) + TZC_SUBREGION_DIS_SHIFT) & \
198 TZC_SUBREGION_DIS_MASK)
199
200 #define TZC_ATTR_REGION_EN_SHIFT U(0x0)
201 #define TZC_ATTR_REGION_EN_MASK U(0x1)
202
203 #define TZC_ATTR_REGION_EN
204 #define TZC_ATTR_REGION_ENABLE U(0x1)
205 #define TZC_ATTR_REGION_DISABLE U(0x0)
206
207 #define LOCKDOWN_RANGE_ENABLE BIT(31)
208
209 #define LOCKDOWN_SELECT_RANGE_ENABLE BIT(0)
210
211 void tzc_init(vaddr_t base);
212 void tzc_configure_region(uint8_t region, vaddr_t region_base, uint32_t attr);
213 void tzc_region_enable(uint8_t region);
214 void tzc_security_inversion_en(vaddr_t base);
215 void tzc_set_action(enum tzc_action action);
216 uint32_t tzc_get_action(void);
217 void tzc_fail_dump(void);
218 void tzc_int_clear(void);
219 int tzc_auto_configure(vaddr_t addr, vaddr_t rsize, uint32_t attr,
220 uint8_t region);
221 TEE_Result tzc_regions_lockdown(void);
222
223 #if TRACE_LEVEL >= TRACE_DEBUG
224 void tzc_dump_state(void);
225 #else
tzc_dump_state(void)226 static inline void tzc_dump_state(void)
227 {
228 }
229 #endif
230
231 #endif /* __DRIVERS_TZC400_H */
232