1 /* 2 * Copyright (C) 2015-2020 Alibaba Group Holding Limited 3 */ 4 5 #ifndef QMC5883L_H 6 #define QMC5883L_H 7 8 /* The default I2C address of this chip */ 9 #define QMC5883L_ADDR 0x0D 10 11 /* Register numbers */ 12 #define QMC5883L_X_LSB 0 13 #define QMC5883L_X_MSB 1 14 #define QMC5883L_Y_LSB 2 15 #define QMC5883L_Y_MSB 3 16 #define QMC5883L_Z_LSB 4 17 #define QMC5883L_Z_MSB 5 18 #define QMC5883L_STATUS 6 19 #define QMC5883L_TEMP_LSB 7 20 #define QMC5883L_TEMP_MSB 8 21 #define QMC5883L_CONFIG 9 22 #define QMC5883L_CONFIG2 10 23 #define QMC5883L_RESET 11 24 #define QMC5883L_RESERVED 12 25 #define QMC5883L_CHIP_ID 13 26 27 /* Bit values for the STATUS register */ 28 #define QMC5883L_STATUS_DRDY 1 29 #define QMC5883L_STATUS_OVL 2 30 #define QMC5883L_STATUS_DOR 4 31 32 /* Oversampling values for the CONFIG register */ 33 #define QMC5883L_CONFIG_OS512 0b00000000 34 #define QMC5883L_CONFIG_OS256 0b01000000 35 #define QMC5883L_CONFIG_OS128 0b10000000 36 #define QMC5883L_CONFIG_OS64 0b11000000 37 38 /* Range values for the CONFIG register */ 39 #define QMC5883L_CONFIG_2GAUSS 0b00000000 40 #define QMC5883L_CONFIG_8GAUSS 0b00010000 41 42 /* Rate values for the CONFIG register */ 43 #define QMC5883L_CONFIG_10HZ 0b00000000 44 #define QMC5883L_CONFIG_50HZ 0b00000100 45 #define QMC5883L_CONFIG_100HZ 0b00001000 46 #define QMC5883L_CONFIG_200HZ 0b00001100 47 48 /* Mode values for the CONFIG register */ 49 #define QMC5883L_CONFIG_STANDBY 0b00000000 50 #define QMC5883L_CONFIG_CONT 0b00000001 51 52 /* Apparently M_PI isn't available in all environments. */ 53 #ifndef M_PI 54 #define M_PI 3.14159265358979323846264338327950288 55 #endif 56 57 extern int qmc5883l_readHeading(); 58 extern void qmc5883l_init(void); 59 extern void qmc5883l_deinit(void); 60 61 #endif /*_QMC5883L_H_*/ 62