1 /*
2 * Xen emulation for hpet
3 *
4 * Copyright (C) 2014 Verizon Corporation
5 *
6 * This file is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License Version 2 (GPLv2)
8 * as published by the Free Software Foundation.
9 *
10 * This file is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details. <http://www.gnu.org/licenses/>.
14 */
15
16 #include <stdio.h>
17 #include <stdlib.h>
18 #include <stdint.h>
19 #include <inttypes.h>
20 #include <string.h>
21
22 #define PCI_HAVE_64BIT_ADDRESS
23 #include <pci/types.h>
24
25 #include "hpet.h"
26
27 #define NR_CPUS 8
28
29 typedef int64_t s_time_t;
30 typedef int spinlock_t;
31 typedef int bool_t;
32
33 #define BITS_PER_LONG __WORDSIZE
34 #define BITS_TO_LONGS(bits) \
35 (((bits) + BITS_PER_LONG - 1) / BITS_PER_LONG)
36 #define DECLARE_BITMAP(name, bits) \
37 unsigned long name[BITS_TO_LONGS(bits)]
38 typedef struct cpumask
39 {
40 DECLARE_BITMAP(bits, NR_CPUS);
41 } cpumask_t;
42 typedef cpumask_t *cpumask_var_t;
43 struct msi_desc
44 {
45 struct msi_attrib
46 {
47 u8 type : 5; /* {0: unused, 5h:MSI, 11h:MSI-X} */
48 u8 maskbit : 1; /* mask-pending bit supported ? */
49 u8 masked : 1;
50 u8 is_64 : 1; /* Address size: 0=32bit 1=64bit */
51 u8 pos; /* Location of the msi capability */
52 u16 entry_nr; /* specific enabled entry */
53 } msi_attrib;
54 };
55
56 struct msi_msg
57 {
58 u32 address_lo; /* low 32 bits of msi message address */
59 u32 address_hi; /* high 32 bits of msi message address */
60 u32 data; /* 16 bits of msi message data */
61 u32 dest32; /* used when Interrupt Remapping with EIM is enabled */
62 };
63
64 #ifndef ARRAY_SIZE
65 #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
66 #endif
67
68 #define X86EMUL_OKAY 100
69 #define EINVAL 101
70
71 #define DBG_LEVEL_PIT 200
72
73 #define TRC_HW_VCHIP_HPET_START_TIMER 300
74 #define TRC_HW_VCHIP_HPET_STOP_TIMER 301
75 #define TRC_HW_VCHIP_PIT_STOP_TIMER 302
76
77 #define TRC_HVM_VCHIP_HPET_START_TIMER 400
78 #define TRC_HVM_VCHIP_HPET_STOP_TIMER 401
79 #define TRC_HVM_VCHIP_PIT_STOP_TIMER 402
80
81 #define TRC_HVM_EMUL_HPET_START_TIMER 400
82 #define TRC_HVM_EMUL_HPET_STOP_TIMER 401
83 #define TRC_HVM_EMUL_PIT_STOP_TIMER 402
84
85 #define __read_mostly
86 #define __initdata
87 #define __init
88 #define __maybe_unused
89 #define __cacheline_aligned
90 #define boolean_param(a, b)
91 #define fix_to_virt(a) a
92 #define xmalloc_array(_type, _num) (void *)(_type)(_num)
93 #define DEFINE_PER_CPU(_type, _name) _type _name
94
95 #define KERN_DEBUG
96 #define KERN_INFO
97
98 #define XENLOG_WARNING
99 #define XENLOG_INFO
100 #define XENLOG_ERR
101 #define XENLOG_GUEST
102
103 #define MSI_TYPE_UNKNOWN 0
104 #define MSI_TYPE_HPET 1
105 #define MSI_TYPE_IOMMU 2
106
107 #define STIME_MAX ((s_time_t)((uint64_t)~0ull>>1))
108
109 /* Low-latency softirqs come first in the following list. */
110 enum
111 {
112 TIMER_SOFTIRQ = 0,
113 SCHEDULE_SOFTIRQ,
114 NEW_TLBFLUSH_CLOCK_PERIOD_SOFTIRQ,
115 RCU_SOFTIRQ,
116 TASKLET_SOFTIRQ,
117 NR_COMMON_SOFTIRQS
118 };
119 /*
120 * ..and if you can't take the strict
121 * types, you can specify one yourself.
122 *
123 * Or not use min/max at all, of course.
124 */
125 #define min_t(type, x, y) \
126 ({ type __x = (x); type __y = (y); __x < __y ? __x : __y; })
127 #define max_t(type, x, y) \
128 ({ type __x = (x); type __y = (y); __x > __y ? __x : __y; })
129 #define offsetof(t, m) ((unsigned long )&((t *)0)->m)
130 #define container_of(ptr, type, member) ({ \
131 typeof( ((type *)0)->member ) *__mptr = (ptr); \
132 (type *)( (char *)__mptr - offsetof(type,member) ); })
133
134 struct domain;
135
136 struct vcpu
137 {
138 int vcpu_id;
139 struct domain *domain;
140 };
141
142 typedef void time_cb(struct vcpu *v, void *opaque);
143
144 struct periodic_time
145 {
146 #define PTSRC_isa 1 /* ISA time source */
147 #define PTSRC_lapic 2 /* LAPIC time source */
148 u8 source; /* PTSRC_ */
149 };
150
151 void destroy_periodic_time(struct periodic_time *pt);
152 void create_periodic_time(
153 struct vcpu *v, struct periodic_time *pt, uint64_t delta,
154 uint64_t period, uint8_t irq, time_cb *cb, void *data);
155
156 #define HPET_TIMER_NUM 3
157
158 struct hpet_registers
159 {
160 /* Memory-mapped, software visible registers */
161 uint64_t capability; /* capabilities */
162 uint64_t config; /* configuration */
163 uint64_t isr; /* interrupt status reg */
164 uint64_t mc64; /* main counter */
165 struct /* timers */
166 {
167 uint64_t config; /* configuration/cap */
168 uint64_t cmp; /* comparator */
169 uint64_t fsb; /* FSB route, not supported now */
170 } timers[HPET_TIMER_NUM];
171
172 /* Hidden register state */
173 uint64_t period[HPET_TIMER_NUM]; /* Last value written to comparator */
174 uint64_t comparator64[HPET_TIMER_NUM]; /* 64 bit running comparator */
175 uint64_t offset64[HPET_TIMER_NUM]; /* offset so comparator calc "works" */
176 uint64_t first_mc64[HPET_TIMER_NUM]; /* 1st interval main counter */
177 bool_t first_enabled[HPET_TIMER_NUM]; /* In 1st interval */
178 };
179
180 typedef struct HPETState
181 {
182 struct hpet_registers hpet;
183 uint64_t stime_freq;
184 uint64_t hpet_to_ns_scale; /* hpet ticks to ns (multiplied by 2^10) */
185 uint64_t hpet_to_ns_limit; /* max hpet ticks convertable to ns */
186 uint64_t mc_offset;
187 struct periodic_time pt[HPET_TIMER_NUM];
188 spinlock_t lock;
189 } HPETState;
190
191 typedef struct PITState
192 {
193 struct periodic_time pt0;
194 spinlock_t lock;
195 } PITState;
196
197
198 struct pl_time /* platform time */
199 {
200 struct HPETState vhpet;
201 /* guest_time = Xen sys time + stime_offset */
202 int64_t stime_offset;
203 /* Ensures monotonicity in appropriate timer modes. */
204 uint64_t last_guest_time;
205 spinlock_t pl_time_lock;
206 };
207
208 #define HVM_PARAM_HPET_ENABLED 11
209
210 struct hvm_domain
211 {
212 struct pl_time pl_time;
213 long params[20];
214 };
215
216 struct arch_domain
217 {
218 struct hvm_domain hvm_domain;
219 struct PITState vpit;
220 };
221
222 struct domain
223 {
224 int domain_id;
225 struct arch_domain arch;
226 struct vcpu *vcpu[NR_CPUS];
227 };
228
229 typedef int (*hvm_mmio_read_t)(struct vcpu *v,
230 unsigned long addr,
231 unsigned long length,
232 unsigned long *val);
233 typedef int (*hvm_mmio_write_t)(struct vcpu *v,
234 unsigned long addr,
235 unsigned long length,
236 unsigned long val);
237 typedef int (*hvm_mmio_check_t)(struct vcpu *v, unsigned long addr);
238
239
240 struct hvm_mmio_ops
241 {
242 hvm_mmio_check_t check;
243 hvm_mmio_read_t read;
244 hvm_mmio_write_t write;
245 };
246
247 /* Marshalling and unmarshalling uses a buffer with size and cursor. */
248 typedef struct hvm_domain_context
249 {
250 uint32_t cur;
251 uint32_t size;
252 uint8_t *data;
253 } hvm_domain_context_t;
254
255 int current_domain_id(void);
256 #define dprintk(_l, _f, _a...) \
257 printk(_l "%s:%d: " _f, __FILE__ , __LINE__ , ## _a )
258 #define gdprintk(_l, _f, _a...) \
259 printk(XENLOG_GUEST _l "%s:%d:d%d " _f, __FILE__, \
260 __LINE__, current_domain_id() , ## _a )
261 struct vcpu *get_current();
262 #define current get_current()
263
264 #define HVM_SAVE_CODE(_x) HVM_SAVE_CODE_##_x
265 #define HVM_SAVE_LENGTH(_x) HVM_SAVE_LENGTH_##_x
266
267 /*
268 * HPET
269 */
270
271 uint64_t hvm_get_guest_time(struct vcpu *v);
272
273 #define HPET_TIMER_NUM 3 /* 3 timers supported now */
274 struct hvm_hw_hpet
275 {
276 /* Memory-mapped, software visible registers */
277 uint64_t capability; /* capabilities */
278 uint64_t res0; /* reserved */
279 uint64_t config; /* configuration */
280 uint64_t res1; /* reserved */
281 uint64_t isr; /* interrupt status reg */
282 uint64_t res2[25]; /* reserved */
283 uint64_t mc64; /* main counter */
284 uint64_t res3; /* reserved */
285 struct /* timers */
286 {
287 uint64_t config; /* configuration/cap */
288 uint64_t cmp; /* comparator */
289 uint64_t fsb; /* FSB route, not supported now */
290 uint64_t res4; /* reserved */
291 } timers[HPET_TIMER_NUM];
292 uint64_t res5[4 * (24 - HPET_TIMER_NUM)]; /* reserved, up to 0x3ff */
293
294 /* Hidden register state */
295 uint64_t period[HPET_TIMER_NUM]; /* Last value written to comparator */
296 };
297
298 typedef int (*hvm_save_handler)(struct domain *d,
299 hvm_domain_context_t *h);
300 typedef int (*hvm_load_handler)(struct domain *d,
301 hvm_domain_context_t *h);
302
303 struct hvm_save_descriptor
304 {
305 uint16_t typecode; /* Used to demux the various types below */
306 uint16_t instance; /* Further demux within a type */
307 uint32_t length; /* In bytes, *not* including this descriptor */
308 };
309
310 void hvm_register_savevm(uint16_t typecode,
311 const char *name,
312 hvm_save_handler save_state,
313 hvm_load_handler load_state,
314 size_t size, int kind);
315
316 #define HVMSR_PER_DOM 1
317
318 #define HVM_REGISTER_SAVE_RESTORE(_x, _save, _load, _num, _k) \
319 int __init __hvm_register_##_x##_save_and_restore(void) \
320 { \
321 hvm_register_savevm(HVM_SAVE_CODE(_x), \
322 #_x, \
323 &_save, \
324 &_load, \
325 (_num) * (HVM_SAVE_LENGTH(_x) \
326 + sizeof(struct hvm_save_descriptor)), \
327 _k); \
328 return 0; \
329 } \
330
331 #define HVM_SAVE_CODE_HPET 0
332 #define HVM_SAVE_LENGTH_HPET sizeof(struct hvm_hw_hpet)
333
334 #define printk printf
335
336 #define spin_lock(a)
337 #define spin_unlock(a)
338 #define spin_lock_init(a)
339 #define spin_is_locked(a) 1
340 #define ASSERT(a)
341
342 #define ADDR (*(volatile long *) addr)
343
__set_bit(int nr,volatile void * addr)344 static inline void __set_bit(int nr, volatile void *addr)
345 {
346 asm volatile(
347 "btsl %1,%0"
348 : "=m"(ADDR)
349 : "Ir"(nr), "m"(ADDR) : "memory");
350 }
351
__clear_bit(int nr,volatile void * addr)352 static inline void __clear_bit(int nr, volatile void *addr)
353 {
354 asm volatile(
355 "btrl %1,%0"
356 : "=m"(ADDR)
357 : "Ir"(nr), "m"(ADDR) : "memory");
358 }
359
find_first_set_bit(unsigned long word)360 static inline unsigned int find_first_set_bit(unsigned long word)
361 {
362 asm("bsf %1,%0" : "=r"(word) : "r"(word));
363 return (unsigned int)word;
364 }
365
366 #define HVM_DBG_LOG(level, _f, _a...) \
367 do { \
368 printf("[HVM:%d.%d] <%s> " _f "\n", \
369 current->domain->domain_id, current->vcpu_id, __func__, \
370 ## _a); \
371 } while ( 0 )
372
373 void __domain_crash(struct domain *d);
374 #define domain_crash(d) do { \
375 printf("domain_crash called from %s:%d\n", __FILE__, __LINE__); \
376 __domain_crash(d); \
377 } while ( 0 )
378
379 #define MICROSECS(_us) ((s_time_t)((_us) * 1000ULL))
380
381 #define pt_global_vcpu_target(d) \
382 ((d)->vcpu ? (d)->vcpu[0] : NULL)
383
384 #define TRACE_0D(a)
385 #define TRACE_1D(a, b)
386 #define TRACE_2D(a, b, c)
387 #define TRACE_3D(a, b, c, d)
388 #define TRACE_4D(a, b, c, d, e)
389 #define TRACE_5D(a, b, c, d, e, f)
390 #define TRACE_6D(a, b, c, d, e, f, g)
391
392 #define TRC_PAR_LONG(par) ((par)&0xFFFFFFFF),((par)>>32)
393
394 #define TRACE_2_LONG_2D(_e, d1, d2, ...) \
395 TRACE_4D(_e, d1, d2)
396 #define TRACE_2_LONG_3D(_e, d1, d2, d3, ...) \
397 TRACE_5D(_e, d1, d2, d3)
398 #define TRACE_2_LONG_4D(_e, d1, d2, d3, d4, ...) \
399 TRACE_6D(_e, d1, d2, d3, d4)
400
401 /* debug */
402
403 extern int __read_mostly hpet_debug;
404 extern uint64_t __read_mostly hpet_force_diff;
405 extern uint64_t __read_mostly hpet_force_mc64;
406 extern uint64_t __read_mostly hpet_force_cmp;
407 extern uint64_t __read_mostly hpet_force_period;
408
409 /*
410 * Local variables:
411 * mode: C
412 * c-file-style: "BSD"
413 * c-basic-offset: 4
414 * indent-tabs-mode: nil
415 * End:
416 */
417