1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * Copyright 2018-2020 NXP 4 * Dong Aisheng <aisheng.dong@nxp.com> 5 */ 6 7&lsio_gpio0 { 8 compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio"; 9 gpio-ranges = <&iomuxc 1 56 12>, 10 <&iomuxc 13 69 4>, 11 <&iomuxc 19 75 4>, 12 <&iomuxc 24 80 1>, 13 <&iomuxc 25 82 7>; 14}; 15 16&lsio_gpio1 { 17 compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio"; 18 gpio-ranges = <&iomuxc 0 89 9>, 19 <&iomuxc 9 99 16>, 20 <&iomuxc 25 116 7>; 21}; 22 23&lsio_gpio2 { 24 compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio"; 25 gpio-ranges = <&iomuxc 0 123 1>, 26 <&iomuxc 1 126 2>, 27 <&iomuxc 3 129 1>; 28}; 29 30&lsio_gpio3 { 31 compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio"; 32 gpio-ranges = <&iomuxc 0 146 4>, 33 <&iomuxc 4 151 13>, 34 <&iomuxc 17 165 8>; 35}; 36 37&lsio_gpio4 { 38 compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio"; 39 gpio-ranges = <&iomuxc 0 0 3>, 40 <&iomuxc 3 4 4>, 41 <&iomuxc 7 9 6>, 42 <&iomuxc 13 16 6>, 43 <&iomuxc 19 23 2>, 44 <&iomuxc 21 26 2>, 45 <&iomuxc 23 30 6>, 46 <&iomuxc 29 37 3>; 47}; 48 49&lsio_gpio5 { 50 compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio"; 51 gpio-ranges = <&iomuxc 0 40 3>, 52 <&iomuxc 3 44 6>, 53 <&iomuxc 9 51 3>; 54}; 55 56&lsio_gpio6 { 57 compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio"; 58}; 59 60&lsio_gpio7 { 61 compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio"; 62}; 63 64&lsio_mu0 { 65 compatible = "fsl,imx8qxp-mu", "fsl,imx6sx-mu"; 66}; 67 68&lsio_mu1 { 69 compatible = "fsl,imx8-mu-scu", "fsl,imx8qxp-mu", "fsl,imx6sx-mu"; 70}; 71 72&lsio_mu2 { 73 compatible = "fsl,imx8-mu-scu", "fsl,imx8qxp-mu", "fsl,imx6sx-mu"; 74}; 75 76&lsio_mu3 { 77 compatible = "fsl,imx8-mu-scu", "fsl,imx8qxp-mu", "fsl,imx6sx-mu"; 78}; 79 80&lsio_mu4 { 81 compatible = "fsl,imx8-mu-scu", "fsl,imx8qxp-mu", "fsl,imx6sx-mu"; 82}; 83 84&lsio_mu5 { 85 compatible = "fsl,imx8qxp-mu", "fsl,imx6sx-mu"; 86}; 87 88&lsio_mu6 { 89 compatible = "fsl,imx8qxp-mu", "fsl,imx6sx-mu"; 90}; 91 92&lsio_mu13 { 93 compatible = "fsl,imx8qxp-mu", "fsl,imx6sx-mu"; 94}; 95