1# Xen Hypervisor Command Line Options
2
3This document covers the command line options which the Xen
4Hypervisor.
5
6## Types of parameter
7
8Most parameters take the form `option=value`.  Different options on
9the command line should be space delimited.  All options are case
10sensitive, as are all values unless explicitly noted.
11
12### Boolean (`<boolean>`)
13
14All boolean option may be explicitly enabled using a `value` of
15> `yes`, `on`, `true`, `enable` or `1`
16
17They may be explicitly disabled using a `value` of
18> `no`, `off`, `false`, `disable` or `0`
19
20In addition, a boolean option may be enabled by simply stating its
21name, and may be disabled by prefixing its name with `no-`.
22
23####Examples
24
25Enable noreboot mode
26> `noreboot=true`
27
28Disable x2apic support (if present)
29> `x2apic=off`
30
31Enable synchronous console mode
32> `sync_console`
33
34Explicitly specifying any value other than those listed above is
35undefined, as is stacking a `no-` prefix with an explicit value.
36
37### Integer (`<integer>`)
38
39An integer parameter will default to decimal and may be prefixed with
40a `-` for negative numbers.  Alternatively, a hexadecimal number may be
41used by prefixing the number with `0x`, or an octal number may be used
42if a leading `0` is present.
43
44Providing a string which does not validly convert to an integer is
45undefined.
46
47### Size (`<size>`)
48
49A size parameter may be any integer, with a single size suffix
50
51* `T` or `t`: TiB (2^40)
52* `G` or `g`: GiB (2^30)
53* `M` or `m`: MiB (2^20)
54* `K` or `k`: KiB (2^10)
55* `B` or `b`: Bytes
56
57Without a size suffix, the default will be kilo.  Providing a suffix
58other than those listed above is undefined.
59
60### String
61
62Many parameters are more complicated and require more intricate
63configuration.  The detailed description of each individual parameter
64specify which values are valid.
65
66### List
67
68Some options take a comma separated list of values.
69
70### Combination
71
72Some parameters act as combinations of the above, most commonly a mix
73of Boolean and String.  These are noted in the relevant sections.
74
75## Parameter details
76
77### acpi
78> `= force | ht | noirq | <boolean>`
79
80**String**, or **Boolean** to disable.
81
82The **acpi** option is used to control a set of four related boolean
83flags; `acpi_force`, `acpi_ht`, `acpi_noirq` and `acpi_disabled`.
84
85By default, Xen will scan the DMI data and blacklist certain systems
86which are known to have broken ACPI setups.  Providing `acpi=force`
87will cause Xen to ignore the blacklist and attempt to use all ACPI
88features.
89
90Using `acpi=ht` causes Xen to parse the ACPI tables enough to
91enumerate all CPUs, but will not use other ACPI features.  This is not
92common, and only has an effect if your system is blacklisted.
93
94The `acpi=noirq` option causes Xen to not parse the ACPI MADT table
95looking for IO-APIC entries.  This is also not common, and any system
96which requires this option to function should be blacklisted.
97Additionally, this will not prevent Xen from finding IO-APIC entries
98from the MP tables.
99
100Finally, any of the boolean false options can be used to disable ACPI
101usage entirely.
102
103Because responsibility for ACPI processing is shared between Xen and
104the domain 0 kernel this option is automatically propagated to the
105domain 0 command line
106
107### acpi\_apic\_instance
108> `= <integer>`
109
110Specify which ACPI MADT table to parse for APIC information, if more
111than one is present.
112
113### acpi\_pstate\_strict
114> `= <boolean>`
115
116> Default: `false`
117
118Enforce checking that P-state transitions by the ACPI cpufreq driver
119actually result in the nominated frequency to be established. A warning
120message will be logged if that isn't the case.
121
122### acpi\_skip\_timer\_override
123> `= <boolean>`
124
125Instruct Xen to ignore timer-interrupt override.
126
127### acpi\_sleep
128> `= s3_bios | s3_mode`
129
130`s3_bios` instructs Xen to invoke video BIOS initialization during S3
131resume.
132
133`s3_mode` instructs Xen to set up the boot time (option `vga=`) video
134mode during S3 resume.
135
136### altp2m (Intel)
137> `= <boolean>`
138
139> Default: `false`
140
141Permit multiple copies of host p2m.
142
143### apic
144> `= bigsmp | default`
145
146Override Xen's logic for choosing the APIC driver.  By default, if
147there are more than 8 CPUs, Xen will switch to `bigsmp` over
148`default`.
149
150### allow\_unsafe
151> `= <boolean>`
152
153> Default: `false`
154
155Force boot on potentially unsafe systems. By default Xen will refuse
156to boot on systems with the following errata:
157
158* AMD Erratum 121. Processors with this erratum are subject to a guest
159  triggerable Denial of Service. Override only if you trust all of
160  your PV guests.
161
162### apicv
163> `= <boolean>`
164
165> Default: `true`
166
167Permit Xen to use APIC Virtualisation Extensions.  This is an optimisation
168available as part of VT-x, and allows hardware to take care of the guests APIC
169handling, rather than requiring emulation in Xen.
170
171### apic\_verbosity
172> `= verbose | debug`
173
174Increase the verbosity of the APIC code from the default value.
175
176### arat
177> `= <boolean>`
178
179> Default: `true`
180
181Permit Xen to use "Always Running APIC Timer" support on compatible hardware
182in combination with cpuidle.  This option is only expected to be useful for
183developers wishing Xen to fall back to older timing methods on newer hardware.
184
185### asid
186> `= <boolean>`
187
188> Default: `true`
189
190Permit Xen to use Address Space Identifiers.  This is an optimisation which
191tags the TLB entries with an ID per vcpu.  This allows for guest TLB flushes
192to be performed without the overhead of a complete TLB flush.
193
194### async-show-all
195> `= <boolean>`
196
197> Default: `false`
198
199Forces all CPUs' full state to be logged upon certain fatal asynchronous
200exceptions (watchdog NMIs and unexpected MCEs).
201
202### ats
203> `= <boolean>`
204
205> Default: `false`
206
207Permits Xen to set up and use PCI Address Translation Services.  This is a
208performance optimisation for PCI Passthrough.
209
210**WARNING: Xen cannot currently safely use ATS because of its synchronous wait
211loops for Queued Invalidation completions.**
212
213### availmem
214> `= <size>`
215
216> Default: `0` (no limit)
217
218Specify a maximum amount of available memory, to which Xen will clamp
219the e820 table.
220
221### badpage
222> `= List of [ <integer> | <integer>-<integer> ]`
223
224Specify that certain pages, or certain ranges of pages contain bad
225bytes and should not be used.  For example, if your memory tester says
226that byte `0x12345678` is bad, you would place `badpage=0x12345` on
227Xen's command line.
228
229### bootscrub
230> `= <boolean>`
231
232> Default: `true`
233
234Scrub free RAM during boot.  This is a safety feature to prevent
235accidentally leaking sensitive VM data into other VMs if Xen crashes
236and reboots.
237
238### bootscrub\_chunk
239> `= <size>`
240
241> Default: `128M`
242
243Maximum RAM block size chunks to be scrubbed whilst holding the page heap lock
244and not running softirqs. Reduce this if softirqs are not being run frequently
245enough. Setting this to a high value may cause boot failure, particularly if
246the NMI watchdog is also enabled.
247
248### xenheap\_megabytes (arm32)
249> `= <size>`
250
251> Default: `0` (1/32 of RAM)
252
253Amount of RAM to set aside for the Xenheap. Must be an integer multiple of 32.
254
255By default will use 1/32 of the RAM up to a maximum of 1GB and with a
256minimum of 32M, subject to a suitably aligned and sized contiguous
257region of memory being available.
258
259### clocksource
260> `= pit | hpet | acpi | tsc`
261
262If set, override Xen's default choice for the platform timer.
263Having TSC as platform timer requires being explicitly set. This is because
264TSC can only be safely used if CPU hotplug isn't performed on the system. On
265some platforms, the "maxcpus" option may need to be used to further adjust
266the number of allowed CPUs.  When running on platforms that can guarantee a
267monotonic TSC across sockets you may want to adjust the "tsc" command line
268parameter to "stable:socket".
269
270### cmci-threshold
271> `= <integer>`
272
273> Default: `2`
274
275Specify the event count threshold for raising Corrected Machine Check
276Interrupts.  Specifying zero disables CMCI handling.
277
278### cmos-rtc-probe
279> `= <boolean>`
280
281> Default: `false`
282
283Flag to indicate whether to probe for a CMOS Real Time Clock irrespective of
284ACPI indicating none to be there.
285
286### com1,com2
287> `= <baud>[/<base-baud>][,[DPS][,[<io-base>|pci|amt][,[<irq>][,[<port-bdf>][,[<bridge-bdf>]]]]]]`
288
289Both option `com1` and `com2` follow the same format.
290
291* `<baud>` may be either an integer baud rate, or the string `auto` if
292  the bootloader or other earlier firmware has already set it up.
293* Optionally, the base baud rate (usually the highest baud rate the
294  device can communicate at) can be specified.
295* `DPS` represents the number of data bits, the parity, and the number
296  of stop bits.
297  * `D` is an integer between 5 and 8 for the number of data bits.
298  * `P` is a single character representing the type of parity:
299      * `n` No
300      * `o` Odd
301      * `e` Even
302      * `m` Mark
303      * `s` Space
304  * `S` is an integer 1 or 2 for the number of stop bits.
305* `<io-base>` is an integer which specifies the IO base port for UART
306  registers.
307* `<irq>` is the IRQ number to use, or `0` to use the UART in poll
308  mode only.
309* `<port-bdf>` is the PCI location of the UART, in
310  `<bus>:<device>.<function>` notation.
311* `<bridge-bdf>` is the PCI bridge behind which is the UART, in
312  `<bus>:<device>.<function>` notation.
313* `pci` indicates that Xen should scan the PCI bus for the UART,
314  avoiding Intel AMT devices.
315* `amt` indicated that Xen should scan the PCI bus for the UART,
316  including Intel AMT devices if present.
317
318A typical setup for most situations might be `com1=115200,8n1`
319
320In addition to the above positional specification for UART parameters,
321name=value pair specfications are also supported. This is used to add
322flexibility for UART devices which require additional UART parameter
323configurations.
324
325The comma separation still delineates positional parameters. Hence,
326unless the parameter is explicitly specified with name=value option, it
327will be considered a positional parameter.
328
329The syntax consists of
330com1=(comma-separated positional parameters),(comma separated name-value pairs)
331
332The accepted name keywords for name=value pairs are:
333
334* `baud` - accepts integer baud rate (eg. 115200) or `auto`
335* `bridge`- Similar to bridge-bdf in positional parameters.
336            Used to determine the PCI bridge to access the UART device.
337            Notation is xx:xx.x `<bus>:<device>.<function>`
338* `clock-hz`- accepts large integers to setup UART clock frequencies.
339              Do note - these values are multiplied by 16.
340* `data-bits` - integer between 5 and 8
341* `dev` - accepted values are `pci` OR `amt`. If this option
342          is used to specify if the serial device is pci-based. The io_base
343          cannot be specified when `dev=pci` or `dev=amt` is used.
344* `io-base` - accepts integer which specified IO base port for UART registers
345* `irq` - IRQ number to use
346* `parity` - accepted values are same as positional parameters
347* `port` - Used to specify which port the PCI serial device is located on
348           Notation is xx:xx.x `<bus>:<device>.<function>`
349* `reg-shift` - register shifts required to set UART registers
350* `reg-width` - register width required to set UART registers
351                (only accepts 1 and 4)
352* `stop-bits` - only accepts 1 or 2 for the number of stop bits
353
354The following are examples of correct specifications:
355
356    com1=115200,8n1,0x3f8,4
357    com1=115200,8n1,0x3f8,4,reg_width=4,reg_shift=2
358    com1=baud=115200,parity=n,stop_bits=1,io_base=0x3f8,reg_width=4
359
360### conring\_size
361> `= <size>`
362
363> Default: `conring_size=16k`
364
365Specify the size of the console ring buffer.
366
367### console
368> `= List of [ vga | com1[H,L] | com2[H,L] | pv | dbgp | none ]`
369
370> Default: `console=com1,vga`
371
372Specify which console(s) Xen should use.
373
374`vga` indicates that Xen should try and use the vga graphics adapter.
375
376`com1` and `com2` indicates that Xen should use serial ports 1 and 2
377respectively.  Optionally, these arguments may be followed by an `H` or
378`L`.  `H` indicates that transmitted characters will have their MSB
379set, while received characters must have their MSB set.  `L` indicates
380the converse; transmitted and received characters will have their MSB
381cleared.  This allows a single port to be shared by two subsystems
382(e.g. console and debugger).
383
384`pv` indicates that Xen should use Xen's PV console. This option is
385only available when used together with `pv-in-pvh`.
386
387`dbgp` indicates that Xen should use a USB debug port.
388
389`none` indicates that Xen should not use a console.  This option only
390makes sense on its own.
391
392### console\_timestamps
393> `= none | date | datems | boot`
394
395> Default: `none`
396
397> Can be modified at runtime
398
399Specify which timestamp format Xen should use for each console line.
400
401* `none`: No timestamps
402* `date`: Date and time information
403    * `[YYYY-MM-DD HH:MM:SS]`
404* `datems`: Date and time, with milliseconds
405    * `[YYYY-MM-DD HH:MM:SS.mmm]`
406* `boot`: Seconds and microseconds since boot
407    * `[SSSSSS.uuuuuu]`
408
409For compatibility with the older boolean parameter, specifying
410`console_timestamps` alone will enable the `date` option.
411
412### console\_to\_ring
413> `= <boolean>`
414
415> Default: `false`
416
417Flag to indicate whether all guest console output should be copied
418into the console ring buffer.
419
420### conswitch
421> `= <switch char>[x]`
422
423> Default: `conswitch=a`
424
425> Can be modified at runtime
426
427Specify which character should be used to switch serial input between
428Xen and dom0.  The required sequence is CTRL-&lt;switch char&gt; three
429times.
430
431The optional trailing `x` indicates that Xen should not automatically
432switch the console input to dom0 during boot.  Any other value,
433including omission, causes Xen to automatically switch to the dom0
434console during dom0 boot.  Use `conswitch=ax` to keep the default switch
435character, but for xen to keep the console.
436
437### core\_parking
438> `= power | performance`
439
440> Default: `power`
441
442### cpu\_type
443> `= arch_perfmon`
444
445If set, force use of the performance counters for oprofile, rather than detecting
446available support.
447
448### cpufreq
449> `= none | {{ <boolean> | xen } [:[powersave|performance|ondemand|userspace][,<maxfreq>][,[<minfreq>][,[verbose]]]]} | dom0-kernel`
450
451> Default: `xen`
452
453Indicate where the responsibility for driving power states lies.  Note that the
454choice of `dom0-kernel` is deprecated and not supported by all Dom0 kernels.
455
456* Default governor policy is ondemand.
457* `<maxfreq>` and `<minfreq>` are integers which represent max and min processor frequencies
458  respectively.
459* `verbose` option can be included as a string or also as `verbose=<integer>`
460
461### cpuid\_mask\_cpu (AMD only)
462> `= fam_0f_rev_c | fam_0f_rev_d | fam_0f_rev_e | fam_0f_rev_f | fam_0f_rev_g | fam_10_rev_b | fam_10_rev_c | fam_11_rev_b`
463
464If the other **cpuid\_mask\_{,ext\_,thermal\_,l7s0\_}e{a,b,c,d}x**
465options are fully set (unspecified on the command line), specify a
466pre-canned cpuid mask to mask the current processor down to appear as
467the specified processor. It is important to ensure that all hosts in a
468pool appear the same to guests to allow successful live migration.
469
470### cpuid\_mask\_{{,ext\_}ecx,edx}
471> `= <integer>`
472
473> Default: `~0` (all bits set)
474
475These four command line parameters are used to specify cpuid masks to
476help with cpuid levelling across a pool of hosts.  Setting a bit in
477the mask indicates that the feature should be enabled, while clearing
478a bit in the mask indicates that the feature should be disabled.  It
479is important to ensure that all hosts in a pool appear the same to
480guests to allow successful live migration.
481
482### cpuid\_mask\_xsave\_eax (Intel only)
483> `= <integer>`
484
485> Default: `~0` (all bits set)
486
487This command line parameter is also used to specify a cpuid mask to
488help with cpuid levelling across a pool of hosts.  See the description
489of the other respective options above.
490
491### cpuid\_mask\_{l7s0\_{eax,ebx},thermal\_ecx} (AMD only)
492> `= <integer>`
493
494> Default: `~0` (all bits set)
495
496These three command line parameters are also used to specify cpuid
497masks to help with cpuid levelling across a pool of hosts.  See the
498description of the other respective options above.
499
500### cpuidle
501> `= <boolean>`
502
503### cpuinfo
504> `= <boolean>`
505
506### crashinfo\_maxaddr
507> `= <size>`
508
509> Default: `4G`
510
511Specify the maximum address to allocate certain structures, if used in
512combination with the `low_crashinfo` command line option.
513
514### crashkernel
515> `= <ramsize-range>:<size>[,...][{@,<}<offset>]`
516> `= <size>[{@,<}<offset>]`
517> `= <size>,below=offset`
518
519Specify sizes and optionally placement of the crash kernel reservation
520area.  The `<ramsize-range>:<size>` pairs indicate how much memory to
521set aside for a crash kernel (`<size>`) for a given range of installed
522RAM (`<ramsize-range>`).  Each `<ramsize-range>` is of the form
523`<start>-[<end>]`.
524
525A trailing `@<offset>` specifies the exact address this area should be
526placed at, whereas `<` in place of `@` just specifies an upper bound of
527the address range the area should fall into.
528
529< and below are synonyomous, the latter being useful for grub2 systems
530which would otherwise require escaping of the < option
531
532
533### credit2\_balance\_over
534> `= <integer>`
535
536### credit2\_balance\_under
537> `= <integer>`
538
539### credit2\_load\_precision\_shift
540> `= <integer>`
541
542> Default: `18`
543
544Specify the number of bits to use for the fractional part of the
545values involved in Credit2 load tracking and load balancing math.
546
547### credit2\_load\_window\_shift
548> `= <integer>`
549
550> Default: `30`
551
552Specify the number of bits to use to represent the length of the
553window (in nanoseconds) we use for load tracking inside Credit2.
554This means that, with the default value (30), we use
5552^30 nsec ~= 1 sec long window.
556
557Load tracking is done by means of a variation of exponentially
558weighted moving average (EWMA). The window length defined here
559is what tells for how long we give value to previous history
560of the load itself. In fact, after a full window has passed,
561what happens is that we discard all previous history entirely.
562
563A short window will make the load balancer quick at reacting
564to load changes, but also short-sighted about previous history
565(and hence, e.g., long term load trends). A long window will
566make the load balancer thoughtful of previous history (and
567hence capable of capturing, e.g., long term load trends), but
568also slow in responding to load changes.
569
570The default value of `1 sec` is rather long.
571
572### credit2\_runqueue
573> `= cpu | core | socket | node | all`
574
575> Default: `socket`
576
577Specify how host CPUs are arranged in runqueues. Runqueues are kept
578balanced with respect to the load generated by the vCPUs running on
579them. Smaller runqueues (as in with `core`) means more accurate load
580balancing (for instance, it will deal better with hyperthreading),
581but also more overhead.
582
583Available alternatives, with their meaning, are:
584* `cpu`: one runqueue per each logical pCPUs of the host;
585* `core`: one runqueue per each physical core of the host;
586* `socket`: one runqueue per each physical socket (which often,
587            but not always, matches a NUMA node) of the host;
588* `node`: one runqueue per each NUMA node of the host;
589* `all`: just one runqueue shared by all the logical pCPUs of
590         the host
591
592### dbgp
593> `= ehci[ <integer> | @pci<bus>:<slot>.<func> ]`
594
595Specify the USB controller to use, either by instance number (when going
596over the PCI busses sequentially) or by PCI device (must be on segment 0).
597
598### debug\_stack\_lines
599> `= <integer>`
600
601> Default: `20`
602
603Limits the number lines printed in Xen stack traces.
604
605### debugtrace
606> `= <integer>`
607
608> Default: `128`
609
610Specify the size of the console debug trace buffer in KiB. The debug
611trace feature is only enabled in debugging builds of Xen.
612
613### dma\_bits
614> `= <integer>`
615
616Specify the bit width of the DMA heap.
617
618### dom0\_ioports\_disable
619> `= List of <hex>-<hex>`
620
621Specify a list of IO ports to be excluded from dom0 access.
622
623### dom0\_max\_vcpus
624
625Either:
626
627> `= <integer>`.
628
629The number of VCPUs to give to dom0.  This number of VCPUs can be more
630than the number of PCPUs on the host.  The default is the number of
631PCPUs.
632
633Or:
634
635> `= <min>-<max>` where `<min>` and `<max>` are integers.
636
637Gives dom0 a number of VCPUs equal to the number of PCPUs, but always
638at least `<min>` and no more than `<max>`.  Using `<min>` may give
639more VCPUs than PCPUs.  `<min>` or `<max>` may be omitted and the
640defaults of 1 and unlimited respectively are used instead.
641
642For example, with `dom0_max_vcpus=4-8`:
643
644>        Number of
645>     PCPUs | Dom0 VCPUs
646>      2    |  4
647>      4    |  4
648>      6    |  6
649>      8    |  8
650>     10    |  8
651
652### dom0\_mem (ARM)
653> `= <size>`
654
655Set the amount of memory for the initial domain (dom0). It must be
656greater than zero. This parameter is required.
657
658### dom0\_mem (x86)
659> `= List of ( min:<size> | max:<size> | <size> )`
660
661Set the amount of memory for the initial domain (dom0). If a size is
662positive, it represents an absolute value.  If a size is negative, it
663is subtracted from the total available memory.
664
665* `<size>` specifies the exact amount of memory.
666* `min:<size>` specifies the minimum amount of memory.
667* `max:<size>` specifies the maximum amount of memory.
668
669If `<size>` is not specified, the default is all the available memory
670minus some reserve.  The reserve is 1/16 of the available memory or
671128 MB (whichever is smaller).
672
673The amount of memory will be at least the minimum but never more than
674the maximum (i.e., `max` overrides the `min` option).  If there isn't
675enough memory then as much as possible is allocated.
676
677`max:<size>` also sets the maximum reservation (the maximum amount of
678memory dom0 can balloon up to).  If this is omitted then the maximum
679reservation is unlimited.
680
681For example, to set dom0's initial memory allocation to 512MB but
682allow it to balloon up as far as 1GB use `dom0_mem=512M,max:1G`
683
684If you use this option then it is highly recommended that you disable
685any dom0 autoballooning feature present in your toolstack. See the
686_xl.conf(5)_ man page or [Xen Best
687Practices](http://wiki.xen.org/wiki/Xen_Best_Practices#Xen_dom0_dedicated_memory_and_preventing_dom0_memory_ballooning).
688
689This option doesn't have effect if pv-shim mode is enabled.
690
691### dom0\_nodes
692
693> `= List of [ <integer> | relaxed | strict ]`
694
695> Default: `strict`
696
697Specify the NUMA nodes to place Dom0 on. Defaults for vCPU-s created
698and memory assigned to Dom0 will be adjusted to match the node
699restrictions set up here. Note that the values to be specified here are
700ACPI PXM ones, not Xen internal node numbers. `relaxed` sets up vCPU
701affinities to prefer but be not limited to the specified node(s).
702
703### dom0\_vcpus\_pin
704> `= <boolean>`
705
706> Default: `false`
707
708Pin dom0 vcpus to their respective pcpus
709
710### dom0
711> `= List of [ pvh | shadow ]`
712
713> Sub-options:
714
715> `pvh`
716
717> Default: `false`
718
719Flag that makes a dom0 boot in PVHv2 mode.
720
721> `shadow`
722
723> Default: `false`
724
725Flag that makes a dom0 use shadow paging. Only works when "pvh" is
726enabled.
727
728### dtuart (ARM)
729> `= path [:options]`
730
731> Default: `""`
732
733Specify the full path in the device tree for the UART.  If the path doesn't
734start with `/`, it is assumed to be an alias.  The options are device specific.
735
736### e820-mtrr-clip
737> `= <boolean>`
738
739Flag that specifies if RAM should be clipped to the highest cacheable
740MTRR.
741
742> Default: `true` on Intel CPUs, otherwise `false`
743
744### e820-verbose
745> `= <boolean>`
746
747> Default: `false`
748
749Flag that enables verbose output when processing e820 information and
750applying clipping.
751
752### edd (x86)
753> `= off | on | skipmbr`
754
755Control retrieval of Extended Disc Data (EDD) from the BIOS during
756boot.
757
758### edid (x86)
759> `= no | force`
760
761Either force retrieval of monitor EDID information via VESA DDC, or
762disable it (edid=no). This option should not normally be required
763except for debugging purposes.
764
765### efi
766> `= List of [ rs | attr ]`
767
768All options are of boolean kind and can be prefixed with `no-` to
769effect the inverse meaning.
770
771> `rs`
772
773> Default: `true`
774
775>> Force or disable use of EFI runtime services.
776
777> `attr=uc`
778
779> Default: `off`
780
781>> Allows mapping of RuntimeServices which have no cachability attribute
782>> set as UC.
783
784### extra\_guest\_irqs
785> `= [<domU number>][,<dom0 number>]`
786
787> Default: `32,<variable>`
788
789Change the number of PIRQs available for guests.  The optional first number is
790common for all domUs, while the optional second number (preceded by a comma)
791is for dom0.  Changing the setting for domU has no impact on dom0 and vice
792versa.  For example to change dom0 without changing domU, use
793`extra_guest_irqs=,512`.  The default value for Dom0 and an eventual separate
794hardware domain is architecture dependent.
795Note that specifying zero as domU value means zero, while for dom0 it means
796to use the default.
797
798### flask
799> `= permissive | enforcing | late | disabled`
800
801> Default: `enforcing`
802
803Specify how the FLASK security server should be configured.  This option is only
804available if the hypervisor was compiled with FLASK support.  This can be
805enabled by running either:
806- make -C xen config and enabling XSM and FLASK.
807- make -C xen menuconfig and enabling 'FLux Advanced Security Kernel support' and 'Xen Security Modules support'
808
809* `permissive`: This is intended for development and is not suitable for use
810  with untrusted guests.  If a policy is provided by the bootloader, it will be
811  loaded; errors will be reported to the ring buffer but will not prevent
812  booting.  The policy can be changed to enforcing mode using "xl setenforce".
813* `enforcing`: This will cause the security server to enter enforcing mode prior
814  to the creation of domain 0.  If an valid policy is not provided by the
815  bootloader and no built-in policy is present, the hypervisor will not continue
816  booting.
817* `late`: This disables loading of the built-in security policy or the policy
818  provided by the bootloader.  FLASK will be enabled but will not enforce access
819  controls until a policy is loaded by a domain using "xl loadpolicy".  Once a
820  policy is loaded, FLASK will run in enforcing mode unless "xl setenforce" has
821  changed that setting.
822* `disabled`: This causes the XSM framework to revert to the dummy module.  The
823  dummy module provides the same security policy as is used when compiling the
824  hypervisor without support for XSM.  The xsm\_op hypercall can also be used to
825  switch to this mode after boot, but there is no way to re-enable FLASK once
826  the dummy module is loaded.
827
828### font
829> `= <height>` where height is `8x8 | 8x14 | 8x16`
830
831Specify the font size when using the VESA console driver.
832
833### force-ept (Intel)
834> `= <boolean>`
835
836> Default: `false`
837
838Allow EPT to be enabled when VMX feature VM\_ENTRY\_LOAD\_GUEST\_PAT is not
839present.
840
841*Warning:*
842Due to CVE-2013-2212, VMX feature VM\_ENTRY\_LOAD\_GUEST\_PAT is by default
843required as a prerequisite for using EPT.  If you are not using PCI Passthrough,
844or trust the guest administrator who would be using passthrough, then the
845requirement can be relaxed.  This option is particularly useful for nested
846virtualization, to allow the L1 hypervisor to use EPT even if the L0 hypervisor
847does not provide VM\_ENTRY\_LOAD\_GUEST\_PAT.
848
849### ept (Intel)
850> `= List of ( {no-}pml | {no-}ad )`
851
852Controls EPT related features.
853
854> Sub-options:
855
856> `pml`
857
858> Default: `true`
859
860>> PML is a new hardware feature in Intel's Broadwell Server and further
861>> platforms which reduces hypervisor overhead of log-dirty mechanism by
862>> automatically recording GPAs (guest physical addresses) when guest memory
863>> gets dirty, and therefore significantly reducing number of EPT violation
864>> caused by write protection of guest memory, which is a necessity to
865>> implement log-dirty mechanism before PML.
866
867> `ad`
868
869> Default: Hardware dependent
870
871>> Have hardware keep accessed/dirty (A/D) bits updated.
872
873### gdb
874> `= com1[H,L] | com2[H,L] | dbgp`
875
876> Default: ``
877
878Specify which console gdbstub should use. See **console**.
879
880### gnttab\_max\_frames
881> `= <integer>`
882
883> Default: `64`
884
885> Can be modified at runtime
886
887Specify the maximum number of frames which any domain may use as part
888of its grant table. This value is an upper boundary of the per-domain
889value settable via Xen tools.
890
891Dom0 is using this value for sizing its grant table.
892
893### gnttab\_max\_maptrack\_frames
894> `= <integer>`
895
896> Default: `1024`
897
898> Can be modified at runtime
899
900Specify the maximum number of frames to use as part of a domains
901maptrack array. This value is an upper boundary of the per-domain
902value settable via Xen tools.
903
904Dom0 is using this value for sizing its maptrack table.
905
906### guest\_loglvl
907> `= <level>[/<rate-limited level>]` where level is `none | error | warning | info | debug | all`
908
909> Default: `guest_loglvl=none/warning`
910
911> Can be modified at runtime
912
913Set the logging level for Xen guests.  Any log message with equal more
914more importance will be printed.
915
916The optional `<rate-limited level>` option instructs which severities
917should be rate limited.
918
919### hap
920> `= <boolean>`
921
922> Default: `true`
923
924Flag to globally enable or disable support for Hardware Assisted
925Paging (HAP)
926
927### hap\_1gb
928> `= <boolean>`
929
930> Default: `true`
931
932Flag to enable 1 GB host page table support for Hardware Assisted
933Paging (HAP).
934
935### hap\_2mb
936> `= <boolean>`
937
938> Default: `true`
939
940Flag to enable 2 MB host page table support for Hardware Assisted
941Paging (HAP).
942
943### hardware\_dom
944> `= <domid>`
945
946> Default: `0`
947
948Enable late hardware domain creation using the specified domain ID.  This is
949intended to be used when domain 0 is a stub domain which builds a disaggregated
950system including a hardware domain with the specified domain ID.  This option is
951supported only when compiled with XSM on x86.
952
953### hest\_disable
954> ` = <boolean>`
955
956> Default: `false`
957
958Control Xens use of the APEI Hardware Error Source Table, should one be found.
959
960### hpetbroadcast
961> `= <boolean>`
962
963### hvm\_debug
964> `= <integer>`
965
966The specified value is a bit mask with the individual bits having the
967following meaning:
968
969>     Bit  0 - debug level 0 (unused at present)
970>     Bit  1 - debug level 1 (Control Register logging)
971>     Bit  2 - debug level 2 (VMX logging of MSR restores when context switching)
972>     Bit  3 - debug level 3 (unused at present)
973>     Bit  4 - I/O operation logging
974>     Bit  5 - vMMU logging
975>     Bit  6 - vLAPIC general logging
976>     Bit  7 - vLAPIC timer logging
977>     Bit  8 - vLAPIC interrupt logging
978>     Bit  9 - vIOAPIC logging
979>     Bit 10 - hypercall logging
980>     Bit 11 - MSR operation logging
981
982Recognized in debug builds of the hypervisor only.
983
984### hvm\_fep
985> `= <boolean>`
986
987> Default: `false`
988
989Allow use of the Forced Emulation Prefix in HVM guests, to allow emulation of
990arbitrary instructions.
991
992This option is intended for development and testing purposes.
993
994*Warning*
995As this feature opens up the instruction emulator to arbitrary
996instruction from an HVM guest, don't use this in production system. No
997security support is provided when this flag is set.
998
999### hvm\_port80
1000> `= <boolean>`
1001
1002> Default: `true`
1003
1004Specify whether guests are to be given access to physical port 80
1005(often used for debugging purposes), to override the DMI based
1006detection of systems known to misbehave upon accesses to that port.
1007
1008### highmem-start
1009> `= <size>`
1010
1011Specify the memory boundary past which memory will be treated as highmem (x86
1012debug hypervisor only).
1013
1014### idle\_latency\_factor
1015> `= <integer>`
1016
1017### ioapic\_ack
1018> `= old | new`
1019
1020> Default: `new` unless directed-EOI is supported
1021
1022### iommu
1023> `= List of [ <boolean> | force | required | intremap | intpost | qinval | snoop | sharept | dom0-passthrough | dom0-strict | amd-iommu-perdev-intremap | workaround_bios_bug | igfx | verbose | debug ]`
1024
1025> Sub-options:
1026
1027> `<boolean>`
1028
1029> Default: `on`
1030
1031>> Control the use of IOMMU(s) in the system.
1032
1033> All other sub-options are of boolean kind and can be prefixed with `no-` to
1034> effect the inverse meaning.
1035
1036> `force` or `required`
1037
1038> Default: `false`
1039
1040>> Don't continue booting unless IOMMU support is found and can be initialized
1041>> successfully.
1042
1043> `intremap`
1044
1045> Default: `true`
1046
1047>> Control the use of interrupt remapping (DMA remapping will always be enabled
1048>> if IOMMU functionality is enabled).
1049
1050> `intpost`
1051
1052> Default: `false`
1053
1054>> Control the use of interrupt posting, which depends on the availability of
1055>> interrupt remapping.
1056
1057> `qinval` (VT-d)
1058
1059> Default: `true`
1060
1061>> Control the use of Queued Invalidation.
1062
1063> `snoop` (Intel)
1064
1065> Default: `true`
1066
1067>> Control the use of Snoop Control.
1068
1069> `sharept`
1070
1071> Default: `true`
1072
1073>> Control whether CPU and IOMMU page tables should be shared.
1074
1075> `dom0-passthrough`
1076
1077> Default: `false`
1078
1079>> Control whether to disable DMA remapping for Dom0.
1080
1081> `dom0-strict`
1082
1083> Default: `false`
1084
1085>> Control whether to set up DMA remapping only for the memory Dom0 actually
1086>> got assigned. Implies `no-dom0-passthrough`.
1087
1088> `amd-iommu-perdev-intremap`
1089
1090> Default: `true`
1091
1092>> Control whether to set up interrupt remapping data structures per device
1093>> rather that once for the entire system. Turning this off is making PCI
1094>> device pass-through insecure and hence unsupported.
1095
1096> `workaround_bios_bug` (VT-d)
1097
1098> Default: `false`
1099
1100>> Causes DRHD entries without any PCI discoverable devices under them to be
1101>> ignored (normally IOMMU setup fails if any of the devices listed by a DRHD
1102>> entry aren't PCI discoverable).
1103
1104> `igfx` (VT-d)
1105
1106> Default: `true`
1107
1108>> Enable IOMMU for Intel graphics devices. The intended usage of this option
1109>> is `no-igfx`, which is similar to Linux `intel_iommu=igfx_off` option used
1110>> to workaround graphics issues. If adding `no-igfx` fixes anything, you
1111>> should file a bug reporting the problem.
1112
1113> `verbose`
1114
1115> Default: `false`
1116
1117>> Increase IOMMU code's verbosity.
1118
1119> `debug`
1120
1121> Default: `false`
1122
1123>> Enable IOMMU debugging code (implies `verbose`).
1124
1125### iommu\_dev\_iotlb\_timeout
1126> `= <integer>`
1127
1128> Default: `1000`
1129
1130Specify the timeout of the device IOTLB invalidation in milliseconds.
1131By default, the timeout is 1000 ms. When you see error 'Queue invalidate
1132wait descriptor timed out', try increasing this value.
1133
1134### iommu\_inclusive\_mapping (VT-d)
1135> `= <boolean>`
1136
1137> Default: `true`
1138
1139Use this to work around firmware issues providing incorrect RMRR entries.
1140Rather than only mapping RAM pages for IOMMU accesses for Dom0, with this
1141option all pages not marked as unusable in the E820 table will get a mapping
1142established.
1143
1144### irq\_ratelimit
1145> `= <integer>`
1146
1147### irq\_vector\_map
1148### ivrs_hpet[`<hpet>`]
1149> `=[<seg>:]<bus>:<device>.<func>`
1150
1151Force the use of `[<seg>:]<bus>:<device>.<func>` as device ID of HPET
1152`<hpet>` instead of the one specified by the IVHD sub-tables of the IVRS
1153ACPI table.
1154
1155### ivrs_ioapic[`<ioapic>`]
1156> `=[<seg>:]<bus>:<device>.<func>`
1157
1158Force the use of `[<seg>:]<bus>:<device>.<func>` as device ID of IO-APIC
1159`<ioapic>` instead of the one specified by the IVHD sub-tables of the IVRS
1160ACPI table.
1161
1162### lapic
1163> `= <boolean>`
1164
1165Force the use of use of the local APIC on a uniprocessor system, even
1166if left disabled by the BIOS.
1167
1168### lapic\_timer\_c2\_ok
1169> `= <boolean>`
1170
1171### ler
1172> `= <boolean>`
1173
1174### loglvl
1175> `= <level>[/<rate-limited level>]` where level is `none | error | warning | info | debug | all`
1176
1177> Default: `loglvl=warning`
1178
1179> Can be modified at runtime
1180
1181Set the logging level for Xen.  Any log message with equal more more
1182importance will be printed.
1183
1184The optional `<rate-limited level>` option instructs which severities
1185should be rate limited.
1186
1187### low\_crashinfo
1188> `= none | min | all`
1189
1190> Default: `none` if not specified at all, or to `min` if **low_crashinfo** is present without qualification.
1191
1192This option is only useful for hosts with a 32bit dom0 kernel, wishing
1193to use kexec functionality in the case of a crash.  It represents
1194which data structures should be deliberately allocated in low memory,
1195so the crash kernel may find find them.  Should be used in combination
1196with **crashinfo_maxaddr**.
1197
1198### low\_mem\_virq\_limit
1199> `= <size>`
1200
1201> Default: `64M`
1202
1203Specify the threshold below which Xen will inform dom0 that the quantity of
1204free memory is getting low.  Specifying `0` will disable this notification.
1205
1206### memop-max-order
1207> `= [<domU>][,[<ctldom>][,[<hwdom>][,<ptdom>]]]`
1208
1209> x86 default: `9,18,12,12`
1210> ARM default: `9,18,10,10`
1211
1212Change the maximum order permitted for allocation (or allocation-like)
1213requests issued by the various kinds of domains (in this order:
1214ordinary DomU, control domain, hardware domain, and - when supported
1215by the platform - DomU with pass-through device assigned).
1216
1217### max\_cstate
1218> `= <integer>`
1219
1220### max\_gsi\_irqs
1221> `= <integer>`
1222
1223Specifies the number of interrupts to be use for pin (IO-APIC or legacy PIC)
1224based interrupts. Any higher IRQs will be available for use via PCI MSI.
1225
1226### maxcpus
1227> `= <integer>`
1228
1229### max\_lpi\_bits
1230> `= <integer>`
1231
1232Specifies the number of ARM GICv3 LPI interrupts to allocate on the host,
1233presented as the number of bits needed to encode it. This must be at least
123414 and not exceed 32, and each LPI requires one byte (configuration) and
1235one pending bit to be allocated.
1236Defaults to 20 bits (to cover at most 1048576 interrupts).
1237
1238### mce
1239> `= <integer>`
1240
1241### mce\_fb
1242> `= <integer>`
1243
1244### mce\_verbosity
1245> `= verbose`
1246
1247Specify verbose machine check output.
1248
1249### mem
1250> `= <size>`
1251
1252Specify the maximum address of physical RAM.  Any RAM beyond this
1253limit is ignored by Xen.
1254
1255### mmcfg
1256> `= <boolean>[,amd-fam10]`
1257
1258> Default: `1`
1259
1260Specify if the MMConfig space should be enabled.
1261
1262### mmio-relax
1263> `= <boolean> | all`
1264
1265> Default: `false`
1266
1267By default, domains may not create cached mappings to MMIO regions.
1268This option relaxes the check for Domain 0 (or when using `all`, all PV
1269domains), to permit the use of cacheable MMIO mappings.
1270
1271### msi
1272> `= <boolean>`
1273
1274> Default: `true`
1275
1276Force Xen to (not) use PCI-MSI, even if ACPI FADT says otherwise.
1277
1278### mtrr.show
1279> `= <boolean>`
1280
1281> Default: `false`
1282
1283Print boot time MTRR state (x86 only).
1284
1285### mwait-idle
1286> `= <boolean>`
1287
1288> Default: `true`
1289
1290Use the MWAIT idle driver (with model specific C-state knowledge) instead
1291of the ACPI based one.
1292
1293### nmi
1294> `= ignore | dom0 | fatal`
1295
1296> Default: `fatal` for a debug build, or `dom0` for a non-debug build
1297
1298Specify what Xen should do in the event of an NMI parity or I/O error.
1299`ignore` discards the error; `dom0` causes Xen to report the error to
1300dom0, while 'fatal' causes Xen to print diagnostics and then hang.
1301
1302### noapic
1303
1304Instruct Xen to ignore any IOAPICs that are present in the system, and
1305instead continue to use the legacy PIC. This is _not_ recommended with
1306pvops type kernels.
1307
1308Because responsibility for APIC setup is shared between Xen and the
1309domain 0 kernel this option is automatically propagated to the domain
13100 command line.
1311
1312### noirqbalance
1313> `= <boolean>`
1314
1315Disable software IRQ balancing and affinity. This can be used on
1316systems such as Dell 1850/2850 that have workarounds in hardware for
1317IRQ routing issues.
1318
1319### nolapic
1320> `= <boolean>`
1321
1322> Default: `false`
1323
1324Ignore the local APIC on a uniprocessor system, even if enabled by the
1325BIOS.
1326
1327### no-real-mode (x86)
1328> `= <boolean>`
1329
1330Do not execute real-mode bootstrap code when booting Xen. This option
1331should not be used except for debugging. It will effectively disable
1332the **vga** option, which relies on real mode to set the video mode.
1333
1334### noreboot
1335> `= <boolean>`
1336
1337Do not automatically reboot after an error.  This is useful for
1338catching debug output.  Defaults to automatically reboot after 5
1339seconds.
1340
1341### nosmp
1342> `= <boolean>`
1343
1344Disable SMP support.  No secondary processors will be booted.
1345Defaults to booting secondary processors.
1346
1347### nr\_irqs
1348> `= <integer>`
1349
1350### numa
1351> `= on | off | fake=<integer> | noacpi`
1352
1353> Default: `on`
1354
1355### pci
1356> `= {no-}serr | {no-}perr`
1357
1358> Default: Signaling left as set by firmware.
1359
1360Disable signaling of SERR (system errors) and/or PERR (parity errors)
1361on all PCI devices.
1362
1363
1364### pci-phantom
1365> `=[<seg>:]<bus>:<device>,<stride>`
1366
1367Mark a group of PCI devices as using phantom functions without actually
1368advertising so, so the IOMMU can create translation contexts for them.
1369
1370All numbers specified must be hexadecimal ones.
1371
1372This option can be specified more than once (up to 8 times at present).
1373
1374### ple\_gap
1375> `= <integer>`
1376
1377### ple\_window
1378> `= <integer>`
1379
1380### pku
1381> `= <boolean>`
1382
1383> Default: `true`
1384
1385Flag to enable Memory Protection Keys.
1386
1387The protection-key feature provides an additional mechanism by which IA-32e
1388paging controls access to usermode addresses.
1389
1390### psr (Intel)
1391> `= List of ( cmt:<boolean> | rmid_max:<integer> | cat:<boolean> | cos_max:<integer> | cdp:<boolean> )`
1392
1393> Default: `psr=cmt:0,rmid_max:255,cat:0,cos_max:255,cdp:0`
1394
1395Platform Shared Resource(PSR) Services.  Intel Haswell and later server
1396platforms offer information about the sharing of resources.
1397
1398To use the PSR monitoring service for a certain domain, a Resource
1399Monitoring ID(RMID) is used to bind the domain to corresponding shared
1400resource.  RMID is a hardware-provided layer of abstraction between software
1401and logical processors.
1402
1403To use the PSR cache allocation service for a certain domain, a capacity
1404bitmasks(CBM) is used to bind the domain to corresponding shared resource.
1405CBM represents cache capacity and indicates the degree of overlap and isolation
1406between domains. In hypervisor a Class of Service(COS) ID is allocated for each
1407unique CBM.
1408
1409The following resources are available:
1410
1411* Cache Monitoring Technology (Haswell and later).  Information regarding the
1412  L3 cache occupancy.
1413  * `cmt` instructs Xen to enable/disable Cache Monitoring Technology.
1414  * `rmid_max` indicates the max value for rmid.
1415* Memory Bandwidth Monitoring (Broadwell and later). Information regarding the
1416  total/local memory bandwidth. Follow the same options with Cache Monitoring
1417  Technology.
1418
1419* Cache Allocation Technology (Broadwell and later).  Information regarding
1420  the cache allocation.
1421  * `cat` instructs Xen to enable/disable Cache Allocation Technology.
1422  * `cos_max` indicates the max value for COS ID.
1423* Code and Data Prioritization Technology (Broadwell and later). Information
1424  regarding the code cache and the data cache allocation. CDP is based on CAT.
1425  * `cdp` instructs Xen to enable/disable Code and Data Prioritization. Note
1426    that `cos_max` of CDP is a little different from `cos_max` of CAT. With
1427    CDP, one COS will corespond two CBMs other than one with CAT, due to the
1428    sum of CBMs is fixed, that means actual `cos_max` in use will automatically
1429    reduce to half when CDP is enabled.
1430
1431### pv-linear-pt
1432> `= <boolean>`
1433
1434> Default: `true`
1435
1436Only available if Xen is compiled with CONFIG\_PV\_LINEAR\_PT support
1437enabled.
1438
1439Allow PV guests to have pagetable entries pointing to other pagetables
1440of the same level (i.e., allowing L2 PTEs to point to other L2 pages).
1441This technique is often called "linear pagetables", and is sometimes
1442used to allow operating systems a simple way to consistently map the
1443current process's pagetables into its own virtual address space.
1444
1445Linux and MiniOS don't use this technique.  NetBSD and Novell Netware
1446do; there may be other custom operating systems which do.  If you're
1447certain you don't plan on having PV guests which use this feature,
1448turning it off can reduce the attack surface.
1449
1450### pv-shim (x86)
1451> `= <boolean>`
1452
1453> Default: `false`
1454
1455This option is intended for use by a toolstack, when choosing to run a PV
1456guest compatibly inside an HVM container.
1457
1458In this mode, the kernel and initrd passed as modules to the hypervisor are
1459constructed into a plain unprivileged PV domain.
1460
1461### shim\_mem (x86)
1462> `= List of ( min:<size> | max:<size> | <size> )`
1463
1464Set the amount of memory that xen-shim uses. Only has effect if pv-shim mode is
1465enabled. Note that this value accounts for the memory used by the shim itself
1466plus the free memory slack given to the shim for runtime allocations.
1467
1468* `min:<size>` specifies the minimum amount of memory. Ignored if greater
1469   than max.
1470* `max:<size>` specifies the maximum amount of memory.
1471* `<size>` specifies the exact amount of memory. Overrides both min and max.
1472
1473By default, the amount of free memory slack given to the shim for runtime usage
1474is 1MB.
1475
1476### rcu-idle-timer-period-ms
1477> `= <integer>`
1478
1479> Default: `10`
1480
1481How frequently a CPU which has gone idle, but with pending RCU callbacks,
1482should be woken up to check if the grace period has completed, and the
1483callbacks are safe to be executed. Expressed in milliseconds; maximum is
1484100, and it can't be 0.
1485
1486### reboot
1487> `= t[riple] | k[bd] | a[cpi] | p[ci] | P[ower] | e[fi] | n[o] [, [w]arm | [c]old]`
1488
1489> Default: `0`
1490
1491Specify the host reboot method.
1492
1493`warm` instructs Xen to not set the cold reboot flag.
1494
1495`cold` instructs Xen to set the cold reboot flag.
1496
1497`no` instructs Xen to not automatically reboot after panics or crashes.
1498
1499`triple` instructs Xen to reboot the host by causing a triple fault.
1500
1501`kbd` instructs Xen to reboot the host via the keyboard controller.
1502
1503`acpi` instructs Xen to reboot the host using RESET_REG in the ACPI FADT.
1504
1505`pci` instructs Xen to reboot the host using PCI reset register (port CF9).
1506
1507`Power` instructs Xen to power-cycle the host using PCI reset register (port CF9).
1508
1509'efi' instructs Xen to reboot using the EFI reboot call (in EFI mode by
1510 default it will use that method first).
1511
1512`xen` instructs Xen to reboot using Xen's SCHEDOP hypercall (this is the default
1513when running nested Xen)
1514
1515### rmrr
1516> '= start<-end>=[s1]bdf1[,[s1]bdf2[,...]];start<-end>=[s2]bdf1[,[s2]bdf2[,...]]
1517
1518Define RMRR units that are missing from ACPI table along with device they
1519belong to and use them for 1:1 mapping. End addresses can be omitted and one
1520page will be mapped. The ranges are inclusive when start and end are specified.
1521If segment of the first device is not specified, segment zero will be used.
1522If other segments are not specified, first device segment will be used.
1523If a segment is specified for other than the first device and it does not match
1524the one specified for the first one, an error will be reported.
1525
1526'start' and 'end' values are page numbers (not full physical addresses),
1527in hexadecimal format (can optionally be preceded by "0x").
1528
1529Usage example: If device 0:0:1d.0 requires one page (0xd5d45) to be
1530reserved, and device 0:0:1a.0 requires three pages (0xd5d46 thru 0xd5d48)
1531to be reserved, one usage would be:
1532
1533rmrr=d5d45=0:0:1d.0;0xd5d46-0xd5d48=0:0:1a.0
1534
1535Note: grub2 requires to escape or use quotations if special characters are used,
1536namely ';', refer to the grub2 documentation if multiple ranges are specified.
1537
1538### ro-hpet
1539> `= <boolean>`
1540
1541> Default: `true`
1542
1543Map the HPET page as read only in Dom0. If disabled the page will be mapped
1544with read and write permissions.
1545
1546### sched
1547> `= credit | credit2 | arinc653 | rtds | null`
1548
1549> Default: `sched=credit`
1550
1551Choose the default scheduler.
1552
1553### sched\_credit2\_migrate\_resist
1554> `= <integer>`
1555
1556### sched\_credit\_tslice\_ms
1557> `= <integer>`
1558
1559Set the timeslice of the credit1 scheduler, in milliseconds.  The
1560default is 30ms.  Reasonable values may include 10, 5, or even 1 for
1561very latency-sensitive workloads.
1562
1563### sched\_ratelimit\_us
1564> `= <integer>`
1565
1566In order to limit the rate of context switching, set the minimum
1567amount of time that a vcpu can be scheduled for before preempting it,
1568in microseconds.  The default is 1000us (1ms).  Setting this to 0
1569disables it altogether.
1570
1571### sched\_smt\_power\_savings
1572> `= <boolean>`
1573
1574Normally Xen will try to maximize performance and cache utilization by
1575spreading out vcpus across as many different divisions as possible
1576(i.e, numa nodes, sockets, cores threads, &c).  This often maximizes
1577throughput, but also maximizes energy usage, since it reduces the
1578depth to which a processor can sleep.
1579
1580This option inverts the logic, so that the scheduler in effect tries
1581to keep the vcpus on the smallest amount of silicon possible; i.e.,
1582first fill up sibling threads, then sibling cores, then sibling
1583sockets, &c.  This will reduce performance somewhat, particularly on
1584systems with hyperthreading enabled, but should reduce power by
1585enabling more sockets and cores to go into deeper sleep states.
1586
1587### serial\_tx\_buffer
1588> `= <size>`
1589
1590> Default: `16kB`
1591
1592Set the serial transmit buffer size.
1593
1594### serrors (ARM)
1595> `= diverse | forward | panic`
1596
1597> Default: `diverse`
1598
1599This parameter is provided to administrators to determine how the
1600hypervisors handle SErrors.
1601
1602In order to distinguish guest-generated SErrors from hypervisor-generated
1603SErrors we have to place SError checking code in every EL1 <-> EL2 paths.
1604That will cause overhead on entries and exits due to dsb/isb. However, not all
1605platforms need to categorize SErrors. For example, a host that is running with
1606trusted guests. The administrator can confirm that all guests that are running
1607on the host will not trigger such SErrors. In this case, the administrator can
1608use this parameter to skip categorizing SErrors and reduce the overhead of
1609dsb/isb.
1610
1611We provided the following 3 options to administrators to determine how the
1612hypervisors handle SErrors:
1613
1614* `diverse`:
1615  The hypervisor will distinguish guest SErrors from hypervisor SErrors.
1616  The guest generated SErrors will be forwarded to guests, the hypervisor
1617  generated SErrors will cause the whole system to crash.
1618  It requires:
1619  1. dsb/isb on all EL1 -> EL2 trap entries to categorize SErrors correctly.
1620  2. dsb/isb on EL2 -> EL1 return paths to prevent slipping hypervisor
1621     SErrors to guests.
1622  3. dsb/isb in context switch to isolate SErrors between 2 vCPUs.
1623
1624* `forward`:
1625  The hypervisor will not distinguish guest SErrors from hypervisor SErrors.
1626  All SErrors will be forwarded to guests, except the SErrors generated when
1627  the idle vCPU is running. The idle domain doesn't have the ability to handle
1628  SErrors, so we have to crash the whole system when we get SErros with the
1629  idle vCPU. This option will avoid most overhead of the dsb/isb, except the
1630  dsb/isb in context switch which is used to isolate the SErrors between 2
1631  vCPUs.
1632
1633* `panic`:
1634  The hypervisor will not distinguish guest SErrors from hypervisor SErrors.
1635  All SErrors will crash the whole system. This option will avoid all overhead
1636  of the dsb/isb pairs.
1637
1638### smap
1639> `= <boolean> | hvm`
1640
1641> Default: `true`
1642
1643Flag to enable Supervisor Mode Access Prevention
1644Use `smap=hvm` to allow SMAP use by HVM guests only.
1645
1646### smep
1647> `= <boolean> | hvm`
1648
1649> Default: `true`
1650
1651Flag to enable Supervisor Mode Execution Protection
1652Use `smep=hvm` to allow SMEP use by HVM guests only.
1653
1654### snb\_igd\_quirk
1655> `= <boolean> | cap | <integer>`
1656
1657A true boolean value enables legacy behavior (1s timeout), while `cap`
1658enforces the maximum theoretically necessary timeout of 670ms. Any number
1659is being interpreted as a custom timeout in milliseconds. Zero or boolean
1660false disable the quirk workaround, which is also the default.
1661
1662### sync\_console
1663> `= <boolean>`
1664
1665> Default: `false`
1666
1667Flag to force synchronous console output.  Useful for debugging, but
1668not suitable for production environments due to incurred overhead.
1669
1670### tboot
1671> `= 0x<phys_addr>`
1672
1673Specify the physical address of the trusted boot shared page.
1674
1675### tbuf\_size
1676> `= <integer>`
1677
1678Specify the per-cpu trace buffer size in pages.
1679
1680### tdt
1681> `= <boolean>`
1682
1683> Default: `true`
1684
1685Flag to enable TSC deadline as the APIC timer mode.
1686
1687### tevt\_mask
1688> `= <integer>`
1689
1690Specify a mask for Xen event tracing. This allows Xen tracing to be
1691enabled at boot. Refer to the xentrace(8) documentation for a list of
1692valid event mask values. In order to enable tracing, a buffer size (in
1693pages) must also be specified via the tbuf\_size parameter.
1694
1695### tickle\_one\_idle\_cpu
1696> `= <boolean>`
1697
1698### timer\_slop
1699> `= <integer>`
1700
1701### tmem
1702> `= <boolean>`
1703
1704### tmem\_compress
1705> `= <boolean>`
1706
1707### tsc
1708> `= unstable | skewed | stable:socket`
1709
1710### ucode
1711> `= [<integer> | scan]`
1712
1713Specify how and where to find CPU microcode update blob.
1714
1715'integer' specifies the CPU microcode update blob module index. When positive,
1716this specifies the n-th module (in the GrUB entry, zero based) to be used
1717for updating CPU micrcode. When negative, counting starts at the end of
1718the modules in the GrUB entry (so with the blob commonly being last,
1719one could specify `ucode=-1`). Note that the value of zero is not valid
1720here (entry zero, i.e. the first module, is always the Dom0 kernel
1721image). Note further that use of this option has an unspecified effect
1722when used with xen.efi (there the concept of modules doesn't exist, and
1723the blob gets specified via the `ucode=<filename>` config file/section
1724entry; see [EFI configuration file description](efi.html)).
1725
1726'scan' instructs the hypervisor to scan the multiboot images for an cpio
1727image that contains microcode. Depending on the platform the blob with the
1728microcode in the cpio name space must be:
1729  - on Intel: kernel/x86/microcode/GenuineIntel.bin
1730  - on AMD  : kernel/x86/microcode/AuthenticAMD.bin
1731
1732### unrestricted\_guest
1733> `= <boolean>`
1734
1735### vcpu\_migration\_delay
1736> `= <integer>`
1737
1738> Default: `0`
1739
1740Specify a delay, in microseconds, between migrations of a VCPU between
1741PCPUs when using the credit1 scheduler. This prevents rapid fluttering
1742of a VCPU between CPUs, and reduces the implicit overheads such as
1743cache-warming. 1ms (1000) has been measured as a good value.
1744
1745### vesa-map
1746> `= <integer>`
1747
1748### vesa-mtrr
1749> `= <integer>`
1750
1751### vesa-ram
1752> `= <integer>`
1753
1754### vga
1755> `= ( ask | current | text-80x<rows> | gfx-<width>x<height>x<depth> | mode-<mode> )[,keep]`
1756
1757`ask` causes Xen to display a menu of available modes and request the
1758user to choose one of them.
1759
1760`current` causes Xen to use the graphics adapter in its current state,
1761without further setup.
1762
1763`text-80x<rows>` instructs Xen to set up text mode.  Valid values for
1764`<rows>` are `25, 28, 30, 34, 43, 50, 80`
1765
1766`gfx-<width>x<height>x<depth>` instructs Xen to set up graphics mode
1767with the specified width, height and depth.
1768
1769`mode-<mode>` instructs Xen to use a specific mode, as shown with the
1770`ask` option.  (N.B menu modes are displayed in hex, so `<mode>`
1771should be a hexadecimal number)
1772
1773The optional `keep` parameter causes Xen to continue using the vga
1774console even after dom0 has been started.  The default behaviour is to
1775relinquish control to dom0.
1776
1777### viridian-version
1778> `= [<major>],[<minor>],[<build>]`
1779
1780> Default: `6,0,0x1772`
1781
1782<major>, <minor> and <build> must be integers. The values will be
1783encoded in guest CPUID 0x40000002 if viridian enlightenments are enabled.
1784
1785### viridian-spinlock-retry-count
1786> `= <integer>`
1787
1788> Default: `2047`
1789
1790Specify the maximum number of retries before an enlightened Windows
1791guest will notify Xen that it has failed to acquire a spinlock.
1792
1793### vpid (Intel)
1794> `= <boolean>`
1795
1796> Default: `true`
1797
1798Use Virtual Processor ID support if available.  This prevents the need for TLB
1799flushes on VM entry and exit, increasing performance.
1800
1801### vpmu
1802> `= ( <boolean> | { bts | ipc | arch [, ...] } )`
1803
1804> Default: `off`
1805
1806Switch on the virtualized performance monitoring unit for HVM guests.
1807
1808If the current cpu isn't supported a message like
1809'VPMU: Initialization failed. ...'
1810is printed on the hypervisor serial log.
1811
1812For some Intel Nehalem processors a quirk handling exist for an unknown
1813wrong behaviour (see handle\_pmc\_quirk()).
1814
1815If 'vpmu=bts' is specified the virtualisation of the Branch Trace Store (BTS)
1816feature is switched on on Intel processors supporting this feature.
1817
1818vpmu=ipc enables performance monitoring, but restricts the counters to the
1819most minimum set possible: instructions, cycles, and reference cycles. These
1820can be used to calculate instructions per cycle (IPC).
1821
1822vpmu=arch enables performance monitoring, but restricts the counters to the
1823pre-defined architectural events only. These are exposed by cpuid, and listed
1824in the Pre-Defined Architectural Performance Events table from the Intel 64
1825and IA-32 Architectures Software Developer's Manual, Volume 3B, System
1826Programming Guide, Part 2.
1827
1828If a boolean is not used, combinations of flags are allowed, comma separated.
1829For example, vpmu=arch,bts.
1830
1831Note that if **watchdog** option is also specified vpmu will be turned off.
1832
1833*Warning:*
1834As the virtualisation is not 100% safe, don't use the vpmu flag on
1835production systems (see http://xenbits.xen.org/xsa/advisory-163.html)!
1836
1837### vwfi
1838> `= trap | native
1839
1840> Default: `trap`
1841
1842WFI is the ARM instruction to "wait for interrupt". WFE is similar and
1843means "wait for event". This option, which is ARM specific, changes the
1844way guest WFI and WFE are implemented in Xen. By default, Xen traps both
1845instructions. In the case of WFI, Xen blocks the guest vcpu; in the case
1846of WFE, Xen yield the guest vcpu. When setting vwfi to `native`, Xen
1847doesn't trap either instruction, running them in guest context. Setting
1848vwfi to `native` reduces irq latency significantly. It can also lead to
1849suboptimal scheduling decisions, but only when the system is
1850oversubscribed (i.e., in total there are more vCPUs than pCPUs).
1851
1852### watchdog
1853> `= force | <boolean>`
1854
1855> Default: `false`
1856
1857Run an NMI watchdog on each processor.  If a processor is stuck for
1858longer than the **watchdog\_timeout**, a panic occurs.  When `force` is
1859specified, in addition to running an NMI watchdog on each processor,
1860unknown NMIs will still be processed.
1861
1862### watchdog\_timeout
1863> `= <integer>`
1864
1865> Default: `5`
1866
1867Set the NMI watchdog timeout in seconds.  Specifying `0` will turn off
1868the watchdog.
1869
1870### x2apic
1871> `= <boolean>`
1872
1873> Default: `true`
1874
1875Permit use of x2apic setup for SMP environments.
1876
1877### x2apic\_phys
1878> `= <boolean>`
1879
1880> Default: `true` if **FADT** mandates physical mode, `false` otherwise.
1881
1882In the case that x2apic is in use, this option switches between physical and
1883clustered mode.  The default, given no hint from the **FADT**, is cluster
1884mode.
1885
1886### xsave
1887> `= <boolean>`
1888
1889> Default: `true`
1890
1891Permit use of the `xsave/xrstor` instructions.
1892