1 /* 2 * Arm SCP/MCP Software 3 * Copyright (c) 2019-2022, Arm Limited and Contributors. All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 * 7 * Description: 8 * N1SDP SCP to SCP I2C communication protocol module. 9 */ 10 11 #ifndef MOD_N1SDP_C2C_I2C_H 12 #define MOD_N1SDP_C2C_I2C_H 13 14 #include <mod_power_domain.h> 15 16 #include <fwk_id.h> 17 18 #include <stdbool.h> 19 #include <stdint.h> 20 21 /*! 22 * \addtogroup GroupN1SDPModule N1SDP Product Modules 23 * \{ 24 */ 25 26 /*! 27 * \defgroup GroupN1SDPN1SDPC2C N1SDP SCP2SCP I2C communication protocol 28 * 29 * \brief Driver support for N1SDP C2C. 30 * 31 * \details This module provides support for SCP to SCP I2C communication. 32 * 33 * \{ 34 */ 35 36 /*! 37 * \brief N1SDP C2C Handshake commands 38 */ 39 enum n1sdp_c2c_cmd { 40 N1SDP_C2C_CMD_CHECK_SECONDARY, 41 N1SDP_C2C_CMD_PCIE_POWER_ON, 42 N1SDP_C2C_CMD_PCIE_PHY_INIT, 43 N1SDP_C2C_CMD_PCIE_CTRL_INIT, 44 N1SDP_C2C_CMD_PCIE_LINK_TRAIN, 45 N1SDP_C2C_CMD_PCIE_RC_SETUP, 46 N1SDP_C2C_CMD_PCIE_VC1_CONFIG, 47 N1SDP_C2C_CMD_PCIE_CCIX_CONFIG, 48 N1SDP_C2C_CMD_CMN600_SET_CONFIG, 49 N1SDP_C2C_CMD_CMN600_XCHANGE_CREDITS, 50 N1SDP_C2C_CMD_CMN600_ENTER_SYS_COHERENCY, 51 N1SDP_C2C_CMD_CMN600_ENTER_DVM_DOMAIN, 52 N1SDP_C2C_CMD_GET_SLV_DDR_SIZE, 53 N1SDP_C2C_CMD_TIMER_SYNC, 54 N1SDP_C2C_CMD_POWER_DOMAIN_ON, 55 N1SDP_C2C_CMD_POWER_DOMAIN_OFF, 56 N1SDP_C2C_CMD_POWER_DOMAIN_GET_STATE, 57 N1SDP_C2C_CMD_SHUTDOWN_OR_REBOOT, 58 }; 59 60 /*! 61 * \brief N1SDP SCP to SCP I2C module configuration 62 */ 63 struct n1sdp_c2c_dev_config { 64 /*! Identifier of I2C device ID */ 65 fwk_id_t i2c_id; 66 /*! I2C target address to be used */ 67 uint8_t target_addr; 68 /*! PCIe element identifier for CCIX */ 69 fwk_id_t ccix_id; 70 }; 71 72 /*! 73 * \brief Module API indices 74 */ 75 enum n1sdp_c2c_api_idx { 76 /*! Index of the N1SDP C2C secondary information API */ 77 N1SDP_C2C_API_IDX_SECONDARY_INFO, 78 79 /*! Index of the N1SDP C2C power domain API */ 80 N1SDP_C2C_API_IDX_PD, 81 82 /*! Number of APIs */ 83 N1SDP_C2C_API_COUNT 84 }; 85 86 /*! 87 * \brief N1SDP C2C secondary information API 88 */ 89 struct n1sdp_c2c_secondary_info_api { 90 /*! 91 * \brief API to check if secondary is alive or not. 92 * 93 * \retval true If secondary is alive. 94 * \return false If secondary is not alive. 95 */ 96 bool (*is_secondary_alive)(void); 97 /*! 98 * \brief API to get secondary chip's DDR size in GB. 99 * 100 * \param size_gb Pointer to storage where the size is stored. 101 * 102 * \retval ::FWK_SUCCESS If operation succeeds. 103 * \return One of the possible error return codes. 104 */ 105 int (*get_ddr_size_gb)(uint8_t *size_gb); 106 }; 107 108 /*! 109 * \brief N1SDP C2C power domain API 110 */ 111 struct n1sdp_c2c_pd_api { 112 /*! 113 * \brief API to set a power state in remote chip. 114 * 115 * \param cmd The C2C command type to issue. 116 * \param pd_id The secondary chip's power domain ID. 117 * \param pd_type The secondary chip's power domain type. 118 * 119 * \retval ::FWK_SUCCESS If operation succeeds. 120 * \return One of the possible error return codes. 121 */ 122 int (*set_state)(enum n1sdp_c2c_cmd cmd, uint8_t pd_id, uint8_t pd_type); 123 /*! 124 * \brief API to get a power state in remote chip. 125 * 126 * \param cmd The C2C command type to issue. 127 * \param pd_id The secondary chip's power domain ID. 128 * \param state Current power state in power domain pd_id. 129 * 130 * \retval ::FWK_SUCCESS If operation succeeds. 131 * \return One of the possible error return codes. 132 */ 133 int ( 134 *get_state)(enum n1sdp_c2c_cmd cmd, uint8_t pd_id, unsigned int *state); 135 /*! 136 * \brief API to issue shutdown/reboot to remote chip. 137 * 138 * \param cmd The C2C command type to issue. 139 * \param type The shutdown/reboot type to issue. 140 * 141 * \retval ::FWK_SUCCESS If operation succeeds. 142 * \return One of the possible error return codes. 143 */ 144 int (*shutdown_reboot)( 145 enum n1sdp_c2c_cmd cmd, 146 enum mod_pd_system_shutdown type); 147 }; 148 149 /*! 150 * \} 151 */ 152 153 /*! 154 * \} 155 */ 156 157 #endif /* MOD_N1SDP_C2C_I2C_H */ 158