1 /*
2  * Arm SCP/MCP Software
3  * Copyright (c) 2018-2021, Arm Limited and Contributors. All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 
8 #ifndef MOD_N1SDP_PLL_H
9 #define MOD_N1SDP_PLL_H
10 
11 #include <stdbool.h>
12 #include <stddef.h>
13 #include <stdint.h>
14 
15 /*!
16  * \addtogroup GroupN1SDPModule N1SDP Product Modules
17  * \{
18  */
19 
20 /*!
21  * \defgroup GroupN1SDPPLL N1SDP PLL Driver
22  *
23  * \details A driver for PLL hardware in N1SDP product.
24  *
25  * \{
26  */
27 
28 /*! Timeout value to wait for a PLL to lock. */
29 #define MOD_N1SDP_PLL_LOCK_TIMEOUT UINT32_C(0x100000)
30 
31 /*! Indexes of APIs that the module offers for binding. */
32 enum mod_n1sdp_pll_api_types {
33     MOD_N1SDP_PLL_API_TYPE_DEFAULT,
34     MOD_N1SDP_PLL_API_COUNT,
35 };
36 
37 /*!
38  * \brief PLL device configuration.
39  */
40 struct mod_n1sdp_pll_dev_config {
41     /*! Pointer to the PLL's control register 0. */
42     volatile uint32_t * const control_reg0;
43 
44     /*! Pointer to the PLL's control register 1. */
45     volatile uint32_t * const control_reg1;
46 
47     /*! The initial rate the PLL is set to during initialization. */
48     const uint64_t initial_rate;
49 
50     /*!
51      * The frequency of the reference clock applied to the PLL. Each PLL
52      * instance has a dedicated reference clock input configured through
53      * the board controller and the same value should be used in module's
54      * element configuration table. This value will be multiplied with a
55      * multiplication factor by the PLL to generate the required output
56      * frequency.
57      */
58     const uint64_t ref_rate;
59 
60     /*!
61      * If \c true, the driver will not attempt to set a default frequency, or
62      * to otherwise configure the PLL during the pre-runtime phase. The PLL is
63      * expected to be initialized later in response to a notification or other
64      * event.
65      */
66     const bool defer_initialization;
67 };
68 
69 /*!
70  * \}
71  */
72 
73 /*!
74  * \}
75  */
76 
77 #endif /* MOD_N1SDP_PLL_H */
78