1#
2# Copyright (c) 2015-2022, Arm Limited and Contributors. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7include common/fdt_wrappers.mk
8
9ifeq (${ARCH}, aarch64)
10  # On ARM standard platorms, the TSP can execute from Trusted SRAM, Trusted
11  # DRAM (if available) or the TZC secured area of DRAM.
12  # TZC secured DRAM is the default.
13
14  ARM_TSP_RAM_LOCATION	?=	dram
15
16  ifeq (${ARM_TSP_RAM_LOCATION}, tsram)
17    ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID
18  else ifeq (${ARM_TSP_RAM_LOCATION}, tdram)
19    ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_DRAM_ID
20  else ifeq (${ARM_TSP_RAM_LOCATION}, dram)
21    ARM_TSP_RAM_LOCATION_ID = ARM_DRAM_ID
22  else
23    $(error "Unsupported ARM_TSP_RAM_LOCATION value")
24  endif
25
26  # Process flags
27  # Process ARM_BL31_IN_DRAM flag
28  ARM_BL31_IN_DRAM		:=	0
29  $(eval $(call assert_boolean,ARM_BL31_IN_DRAM))
30  $(eval $(call add_define,ARM_BL31_IN_DRAM))
31else
32  ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID
33endif
34
35$(eval $(call add_define,ARM_TSP_RAM_LOCATION_ID))
36
37
38# For the original power-state parameter format, the State-ID can be encoded
39# according to the recommended encoding or zero. This flag determines which
40# State-ID encoding to be parsed.
41ARM_RECOM_STATE_ID_ENC := 0
42
43# If the PSCI_EXTENDED_STATE_ID is set, then ARM_RECOM_STATE_ID_ENC need to
44# be set. Else throw a build error.
45ifeq (${PSCI_EXTENDED_STATE_ID}, 1)
46  ifeq (${ARM_RECOM_STATE_ID_ENC}, 0)
47    $(error Build option ARM_RECOM_STATE_ID_ENC needs to be set if \
48            PSCI_EXTENDED_STATE_ID is set for ARM platforms)
49  endif
50endif
51
52# Process ARM_RECOM_STATE_ID_ENC flag
53$(eval $(call assert_boolean,ARM_RECOM_STATE_ID_ENC))
54$(eval $(call add_define,ARM_RECOM_STATE_ID_ENC))
55
56# Process ARM_DISABLE_TRUSTED_WDOG flag
57# By default, Trusted Watchdog is always enabled unless
58# SPIN_ON_BL1_EXIT or ENABLE_RME is set
59ARM_DISABLE_TRUSTED_WDOG	:=	0
60ifneq ($(filter 1,${SPIN_ON_BL1_EXIT} ${ENABLE_RME}),)
61ARM_DISABLE_TRUSTED_WDOG	:=	1
62endif
63$(eval $(call assert_boolean,ARM_DISABLE_TRUSTED_WDOG))
64$(eval $(call add_define,ARM_DISABLE_TRUSTED_WDOG))
65
66# Process ARM_CONFIG_CNTACR
67ARM_CONFIG_CNTACR		:=	1
68$(eval $(call assert_boolean,ARM_CONFIG_CNTACR))
69$(eval $(call add_define,ARM_CONFIG_CNTACR))
70
71# Process ARM_BL31_IN_DRAM flag
72ARM_BL31_IN_DRAM		:=	0
73$(eval $(call assert_boolean,ARM_BL31_IN_DRAM))
74$(eval $(call add_define,ARM_BL31_IN_DRAM))
75
76# As per CCA security model, all root firmware must execute from on-chip secure
77# memory. This means we must not run BL31 from TZC-protected DRAM.
78ifeq (${ARM_BL31_IN_DRAM},1)
79  ifeq (${ENABLE_RME},1)
80    $(error "BL31 must not run from DRAM on RME-systems. Please set ARM_BL31_IN_DRAM to 0")
81  endif
82endif
83
84# Process ARM_PLAT_MT flag
85ARM_PLAT_MT			:=	0
86$(eval $(call assert_boolean,ARM_PLAT_MT))
87$(eval $(call add_define,ARM_PLAT_MT))
88
89# Use translation tables library v2 by default
90ARM_XLAT_TABLES_LIB_V1		:=	0
91$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1))
92$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1))
93
94# Don't have the Linux kernel as a BL33 image by default
95ARM_LINUX_KERNEL_AS_BL33	:=	0
96$(eval $(call assert_boolean,ARM_LINUX_KERNEL_AS_BL33))
97$(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33))
98
99ifeq (${ARM_LINUX_KERNEL_AS_BL33},1)
100  ifneq (${ARCH},aarch64)
101    ifneq (${RESET_TO_SP_MIN},1)
102      $(error "ARM_LINUX_KERNEL_AS_BL33 is only available if RESET_TO_SP_MIN=1.")
103    endif
104  endif
105  ifndef PRELOADED_BL33_BASE
106    $(error "PRELOADED_BL33_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is used.")
107  endif
108  ifeq (${RESET_TO_BL31},1)
109    ifndef ARM_PRELOADED_DTB_BASE
110      $(error "ARM_PRELOADED_DTB_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is
111       used with RESET_TO_BL31.")
112    endif
113    $(eval $(call add_define,ARM_PRELOADED_DTB_BASE))
114  endif
115endif
116
117# Arm(R) Ethos(TM)-N NPU SiP service
118ARM_ETHOSN_NPU_DRIVER			:=	0
119$(eval $(call assert_boolean,ARM_ETHOSN_NPU_DRIVER))
120$(eval $(call add_define,ARM_ETHOSN_NPU_DRIVER))
121
122# Use an implementation of SHA-256 with a smaller memory footprint but reduced
123# speed.
124$(eval $(call add_define,MBEDTLS_SHA256_SMALLER))
125
126# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images
127# in the FIP if the platform requires.
128ifneq ($(BL32_EXTRA1),)
129$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1))
130endif
131ifneq ($(BL32_EXTRA2),)
132$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2))
133endif
134
135# Enable PSCI_STAT_COUNT/RESIDENCY APIs on ARM platforms
136ENABLE_PSCI_STAT		:=	1
137ENABLE_PMF			:=	1
138
139# Override the standard libc with optimised libc_asm
140OVERRIDE_LIBC			:=	1
141ifeq (${OVERRIDE_LIBC},1)
142    include lib/libc/libc_asm.mk
143endif
144
145# On ARM platforms, separate the code and read-only data sections to allow
146# mapping the former as executable and the latter as execute-never.
147SEPARATE_CODE_AND_RODATA	:=	1
148
149# On ARM platforms, disable SEPARATE_NOBITS_REGION by default. Both PROGBITS
150# and NOBITS sections of BL31 image are adjacent to each other and loaded
151# into Trusted SRAM.
152SEPARATE_NOBITS_REGION		:=	0
153
154# In order to support SEPARATE_NOBITS_REGION for Arm platforms, we need to load
155# BL31 PROGBITS into secure DRAM space and BL31 NOBITS into SRAM. Hence mandate
156# the build to require that ARM_BL31_IN_DRAM is enabled as well.
157ifeq ($(SEPARATE_NOBITS_REGION),1)
158    ifneq ($(ARM_BL31_IN_DRAM),1)
159         $(error For SEPARATE_NOBITS_REGION, ARM_BL31_IN_DRAM must be enabled)
160    endif
161    ifneq ($(RECLAIM_INIT_CODE),0)
162          $(error For SEPARATE_NOBITS_REGION, RECLAIM_INIT_CODE cannot be supported)
163    endif
164endif
165
166# Disable ARM Cryptocell by default
167ARM_CRYPTOCELL_INTEG		:=	0
168$(eval $(call assert_boolean,ARM_CRYPTOCELL_INTEG))
169$(eval $(call add_define,ARM_CRYPTOCELL_INTEG))
170
171# Enable PIE support for RESET_TO_BL31/RESET_TO_SP_MIN case
172ifneq ($(filter 1,${RESET_TO_BL31} ${RESET_TO_SP_MIN}),)
173	ENABLE_PIE			:=	1
174endif
175
176# CryptoCell integration relies on coherent buffers for passing data from
177# the AP CPU to the CryptoCell
178ifeq (${ARM_CRYPTOCELL_INTEG},1)
179    ifeq (${USE_COHERENT_MEM},0)
180        $(error "ARM_CRYPTOCELL_INTEG needs USE_COHERENT_MEM to be set.")
181    endif
182endif
183
184# Disable GPT parser support, use FIP image by default
185ARM_GPT_SUPPORT			:=	0
186$(eval $(call assert_boolean,ARM_GPT_SUPPORT))
187$(eval $(call add_define,ARM_GPT_SUPPORT))
188
189# Include necessary sources to parse GPT image
190ifeq (${ARM_GPT_SUPPORT}, 1)
191  BL2_SOURCES	+=	drivers/partition/gpt.c		\
192			drivers/partition/partition.c
193endif
194
195# Enable CRC instructions via extension for ARMv8-A CPUs.
196# For ARMv8.1-A, and onwards CRC instructions are default enabled.
197# Enable HW computed CRC support unconditionally in BL2 component.
198ifeq (${ARM_ARCH_MAJOR},8)
199    ifeq (${ARM_ARCH_MINOR},0)
200        BL2_CPPFLAGS += -march=armv8-a+crc
201    endif
202endif
203
204ifeq ($(PSA_FWU_SUPPORT),1)
205    # GPT support is recommended as per PSA FWU specification hence
206    # PSA FWU implementation is tightly coupled with GPT support,
207    # and it does not support other formats.
208    ifneq ($(ARM_GPT_SUPPORT),1)
209      $(error For PSA_FWU_SUPPORT, ARM_GPT_SUPPORT must be enabled)
210    endif
211    FWU_MK := drivers/fwu/fwu.mk
212    $(info Including ${FWU_MK})
213    include ${FWU_MK}
214endif
215
216ifeq (${ARCH}, aarch64)
217PLAT_INCLUDES		+=	-Iinclude/plat/arm/common/aarch64
218endif
219
220PLAT_BL_COMMON_SOURCES	+=	plat/arm/common/${ARCH}/arm_helpers.S		\
221				plat/arm/common/arm_common.c			\
222				plat/arm/common/arm_console.c
223
224ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1)
225PLAT_BL_COMMON_SOURCES 	+=	lib/xlat_tables/xlat_tables_common.c	      \
226				lib/xlat_tables/${ARCH}/xlat_tables.c
227else
228ifeq (${XLAT_MPU_LIB_V1}, 1)
229include lib/xlat_mpu/xlat_mpu.mk
230PLAT_BL_COMMON_SOURCES	+=	${XLAT_MPU_LIB_V1_SRCS}
231else
232include lib/xlat_tables_v2/xlat_tables.mk
233PLAT_BL_COMMON_SOURCES	+=      ${XLAT_TABLES_LIB_SRCS}
234endif
235endif
236
237ARM_IO_SOURCES		+=	plat/arm/common/arm_io_storage.c		\
238				plat/arm/common/fconf/arm_fconf_io.c
239ifeq (${SPD},spmd)
240    ifeq (${BL2_ENABLE_SP_LOAD},1)
241         ARM_IO_SOURCES		+=	plat/arm/common/fconf/arm_fconf_sp.c
242    endif
243endif
244
245BL1_SOURCES		+=	drivers/io/io_fip.c				\
246				drivers/io/io_memmap.c				\
247				drivers/io/io_storage.c				\
248				plat/arm/common/arm_bl1_setup.c			\
249				plat/arm/common/arm_err.c			\
250				${ARM_IO_SOURCES}
251
252ifdef EL3_PAYLOAD_BASE
253# Need the plat_arm_program_trusted_mailbox() function to release secondary CPUs from
254# their holding pen
255BL1_SOURCES		+=	plat/arm/common/arm_pm.c
256endif
257
258BL2_SOURCES		+=	drivers/delay_timer/delay_timer.c		\
259				drivers/delay_timer/generic_delay_timer.c	\
260				drivers/io/io_fip.c				\
261				drivers/io/io_memmap.c				\
262				drivers/io/io_storage.c				\
263				plat/arm/common/arm_bl2_setup.c			\
264				plat/arm/common/arm_err.c			\
265				common/tf_crc32.c				\
266				${ARM_IO_SOURCES}
267
268# Firmware Configuration Framework sources
269include lib/fconf/fconf.mk
270
271BL1_SOURCES		+=	${FCONF_SOURCES} ${FCONF_DYN_SOURCES}
272BL2_SOURCES		+=	${FCONF_SOURCES} ${FCONF_DYN_SOURCES}
273
274# Add `libfdt` and Arm common helpers required for Dynamic Config
275include lib/libfdt/libfdt.mk
276
277DYN_CFG_SOURCES		+=	plat/arm/common/arm_dyn_cfg.c		\
278				plat/arm/common/arm_dyn_cfg_helpers.c	\
279				common/uuid.c
280
281DYN_CFG_SOURCES		+=	${FDT_WRAPPERS_SOURCES}
282
283BL1_SOURCES		+=	${DYN_CFG_SOURCES}
284BL2_SOURCES		+=	${DYN_CFG_SOURCES}
285
286ifeq (${BL2_AT_EL3},1)
287BL2_SOURCES		+=	plat/arm/common/arm_bl2_el3_setup.c
288endif
289
290# Because BL1/BL2 execute in AArch64 mode but BL32 in AArch32 we need to use
291# the AArch32 descriptors.
292ifeq (${JUNO_AARCH32_EL3_RUNTIME},1)
293BL2_SOURCES		+=	plat/arm/common/aarch32/arm_bl2_mem_params_desc.c
294else
295ifneq (${PLAT}, corstone1000)
296BL2_SOURCES		+=	plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c
297endif
298endif
299BL2_SOURCES		+=	plat/arm/common/arm_image_load.c		\
300				common/desc_image_load.c
301ifeq (${SPD},opteed)
302BL2_SOURCES		+=	lib/optee/optee_utils.c
303endif
304
305BL2U_SOURCES		+=	drivers/delay_timer/delay_timer.c		\
306				drivers/delay_timer/generic_delay_timer.c	\
307				plat/arm/common/arm_bl2u_setup.c
308
309BL31_SOURCES		+=	plat/arm/common/arm_bl31_setup.c		\
310				plat/arm/common/arm_pm.c			\
311				plat/arm/common/arm_topology.c			\
312				plat/common/plat_psci_common.c
313
314ifneq ($(filter 1,${ENABLE_PMF} ${ARM_ETHOSN_NPU_DRIVER}),)
315ARM_SVC_HANDLER_SRCS :=
316
317ifeq (${ENABLE_PMF},1)
318ARM_SVC_HANDLER_SRCS	+=	lib/pmf/pmf_smc.c
319endif
320
321ifeq (${ARM_ETHOSN_NPU_DRIVER},1)
322ARM_SVC_HANDLER_SRCS	+=	plat/arm/common/fconf/fconf_ethosn_getter.c	\
323				drivers/delay_timer/delay_timer.c		\
324				drivers/arm/ethosn/ethosn_smc.c
325endif
326
327ifeq (${ARCH}, aarch64)
328BL31_SOURCES		+=	plat/arm/common/aarch64/execution_state_switch.c\
329				plat/arm/common/arm_sip_svc.c			\
330				${ARM_SVC_HANDLER_SRCS}
331else
332BL32_SOURCES		+=	plat/arm/common/arm_sip_svc.c			\
333				${ARM_SVC_HANDLER_SRCS}
334endif
335endif
336
337ifeq (${EL3_EXCEPTION_HANDLING},1)
338BL31_SOURCES		+=	plat/common/aarch64/plat_ehf.c
339endif
340
341ifeq (${SDEI_SUPPORT},1)
342BL31_SOURCES		+=	plat/arm/common/aarch64/arm_sdei.c
343ifeq (${SDEI_IN_FCONF},1)
344BL31_SOURCES		+=	plat/arm/common/fconf/fconf_sdei_getter.c
345endif
346endif
347
348# RAS sources
349ifeq (${RAS_EXTENSION},1)
350BL31_SOURCES		+=	lib/extensions/ras/std_err_record.c		\
351				lib/extensions/ras/ras_common.c
352endif
353
354# Pointer Authentication sources
355ifeq (${ENABLE_PAUTH}, 1)
356PLAT_BL_COMMON_SOURCES	+=	plat/arm/common/aarch64/arm_pauth.c	\
357				lib/extensions/pauth/pauth_helpers.S
358endif
359
360ifeq (${SPD},spmd)
361BL31_SOURCES		+=	plat/common/plat_spmd_manifest.c	\
362				common/uuid.c				\
363				${LIBFDT_SRCS}
364
365BL31_SOURCES		+=	${FDT_WRAPPERS_SOURCES}
366endif
367
368ifeq (${DRTM_SUPPORT},1)
369BL31_SOURCES            +=	plat/arm/common/arm_err.c
370endif
371
372ifneq (${TRUSTED_BOARD_BOOT},0)
373
374    # Include common TBB sources
375    AUTH_SOURCES 	:= 	drivers/auth/auth_mod.c	\
376				drivers/auth/img_parser_mod.c
377
378    # Include the selected chain of trust sources.
379    ifeq (${COT},tbbr)
380            BL1_SOURCES	+=	drivers/auth/tbbr/tbbr_cot_common.c		\
381				drivers/auth/tbbr/tbbr_cot_bl1.c
382        ifneq (${COT_DESC_IN_DTB},0)
383            BL2_SOURCES	+=	lib/fconf/fconf_cot_getter.c
384        else
385            BL2_SOURCES	+=	drivers/auth/tbbr/tbbr_cot_common.c	\
386				drivers/auth/tbbr/tbbr_cot_bl2.c
387        endif
388    else ifeq (${COT},dualroot)
389        AUTH_SOURCES	+=	drivers/auth/dualroot/cot.c
390    else ifeq (${COT},cca)
391        AUTH_SOURCES	+=	drivers/auth/cca/cot.c
392    else
393        $(error Unknown chain of trust ${COT})
394    endif
395
396    BL1_SOURCES		+=	${AUTH_SOURCES}					\
397				bl1/tbbr/tbbr_img_desc.c			\
398				plat/arm/common/arm_bl1_fwu.c			\
399				plat/common/tbbr/plat_tbbr.c
400
401    BL2_SOURCES		+=	${AUTH_SOURCES}					\
402				plat/common/tbbr/plat_tbbr.c
403
404    $(eval $(call TOOL_ADD_IMG,ns_bl2u,--fwu,FWU_))
405
406    IMG_PARSER_LIB_MK := drivers/auth/mbedtls/mbedtls_x509.mk
407
408    $(info Including ${IMG_PARSER_LIB_MK})
409    include ${IMG_PARSER_LIB_MK}
410endif
411
412# Include Measured Boot makefile before any Crypto library makefile.
413# Crypto library makefile may need default definitions of Measured Boot build
414# flags present in Measured Boot makefile.
415ifneq ($(filter 1,${MEASURED_BOOT} ${DRTM_SUPPORT}),)
416    MEASURED_BOOT_MK := drivers/measured_boot/event_log/event_log.mk
417    $(info Including ${MEASURED_BOOT_MK})
418    include ${MEASURED_BOOT_MK}
419
420    ifneq (${MBOOT_EL_HASH_ALG}, sha256)
421        $(eval $(call add_define,TF_MBEDTLS_MBOOT_USE_SHA512))
422    endif
423
424    ifeq (${MEASURED_BOOT},1)
425         BL1_SOURCES		+= 	${EVENT_LOG_SOURCES}
426         BL2_SOURCES		+= 	${EVENT_LOG_SOURCES}
427    endif
428
429    ifeq (${DRTM_SUPPORT},1)
430         BL31_SOURCES	        += 	${EVENT_LOG_SOURCES}
431    endif
432endif
433
434ifneq ($(filter 1,${MEASURED_BOOT} ${TRUSTED_BOARD_BOOT} ${DRTM_SUPPORT}),)
435    CRYPTO_SOURCES	:=	drivers/auth/crypto_mod.c 	\
436				lib/fconf/fconf_tbbr_getter.c
437    BL1_SOURCES		+=	${CRYPTO_SOURCES}
438    BL2_SOURCES		+=	${CRYPTO_SOURCES}
439    BL31_SOURCES	+=	drivers/auth/crypto_mod.c
440
441    # We expect to locate the *.mk files under the directories specified below
442    ifeq (${ARM_CRYPTOCELL_INTEG},0)
443        CRYPTO_LIB_MK := drivers/auth/mbedtls/mbedtls_crypto.mk
444    else
445        CRYPTO_LIB_MK := drivers/auth/cryptocell/cryptocell_crypto.mk
446    endif
447
448    $(info Including ${CRYPTO_LIB_MK})
449    include ${CRYPTO_LIB_MK}
450endif
451
452ifeq (${RECLAIM_INIT_CODE}, 1)
453    ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1)
454        $(error "To reclaim init code xlat tables v2 must be used")
455    endif
456endif
457