1 /*
2 * Copyright (c) 2018-2021, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include <assert.h>
8 #include <plat_arm.h>
9 #include <plat_private.h>
10 #include <pm_common.h>
11 #include <common/debug.h>
12 #include <lib/mmio.h>
13 #include <lib/psci/psci.h>
14 #include <plat/common/platform.h>
15 #include <plat/arm/common/plat_arm.h>
16
17 #include "pm_api_sys.h"
18 #include "pm_client.h"
19
20 static uintptr_t versal_sec_entry;
21
versal_pwr_domain_on(u_register_t mpidr)22 static int32_t versal_pwr_domain_on(u_register_t mpidr)
23 {
24 int32_t cpu_id = plat_core_pos_by_mpidr(mpidr);
25 const struct pm_proc *proc;
26
27 VERBOSE("%s: mpidr: 0x%lx\n", __func__, mpidr);
28
29 if (cpu_id == -1) {
30 return PSCI_E_INTERN_FAIL;
31 }
32
33 proc = pm_get_proc((uint32_t)cpu_id);
34
35 /* Send request to PMC to wake up selected ACPU core */
36 (void)pm_req_wakeup(proc->node_id, (versal_sec_entry & 0xFFFFFFFFU) | 0x1U,
37 versal_sec_entry >> 32, 0, SECURE_FLAG);
38
39 /* Clear power down request */
40 pm_client_wakeup(proc);
41
42 return PSCI_E_SUCCESS;
43 }
44
45 /**
46 * versal_pwr_domain_suspend() - This function sends request to PMC to suspend
47 * core.
48 *
49 * @target_state Targated state
50 */
versal_pwr_domain_suspend(const psci_power_state_t * target_state)51 static void versal_pwr_domain_suspend(const psci_power_state_t *target_state)
52 {
53 uint32_t state;
54 uint32_t cpu_id = plat_my_core_pos();
55 const struct pm_proc *proc = pm_get_proc(cpu_id);
56
57 for (size_t i = 0U; i <= PLAT_MAX_PWR_LVL; i++) {
58 VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n",
59 __func__, i, target_state->pwr_domain_state[i]);
60 }
61
62 plat_versal_gic_cpuif_disable();
63
64 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) {
65 plat_versal_gic_save();
66 }
67
68 state = target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE ?
69 PM_STATE_SUSPEND_TO_RAM : PM_STATE_CPU_IDLE;
70
71 /* Send request to PMC to suspend this core */
72 (void)pm_self_suspend(proc->node_id, MAX_LATENCY, state, versal_sec_entry,
73 SECURE_FLAG);
74
75 /* APU is to be turned off */
76 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) {
77 /* disable coherency */
78 plat_arm_interconnect_exit_coherency();
79 }
80 }
81
82 /**
83 * versal_pwr_domain_suspend_finish() - This function performs actions to finish
84 * suspend procedure.
85 *
86 * @target_state Targated state
87 */
versal_pwr_domain_suspend_finish(const psci_power_state_t * target_state)88 static void versal_pwr_domain_suspend_finish(
89 const psci_power_state_t *target_state)
90 {
91 uint32_t cpu_id = plat_my_core_pos();
92 const struct pm_proc *proc = pm_get_proc(cpu_id);
93
94 for (size_t i = 0U; i <= PLAT_MAX_PWR_LVL; i++) {
95 VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n",
96 __func__, i, target_state->pwr_domain_state[i]);
97 }
98
99 /* Clear the APU power control register for this cpu */
100 pm_client_wakeup(proc);
101
102 /* enable coherency */
103 plat_arm_interconnect_enter_coherency();
104
105 /* APU was turned off, so restore GIC context */
106 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) {
107 plat_versal_gic_resume();
108 }
109
110 plat_versal_gic_cpuif_enable();
111 }
112
versal_pwr_domain_on_finish(const psci_power_state_t * target_state)113 void versal_pwr_domain_on_finish(const psci_power_state_t *target_state)
114 {
115 /* Enable the gic cpu interface */
116 plat_versal_gic_pcpu_init();
117
118 /* Program the gic per-cpu distributor or re-distributor interface */
119 plat_versal_gic_cpuif_enable();
120 }
121
122 /**
123 * versal_system_off() - This function sends the system off request
124 * to firmware. This function does not return.
125 */
versal_system_off(void)126 static void __dead2 versal_system_off(void)
127 {
128 /* Send the power down request to the PMC */
129 (void)pm_system_shutdown(XPM_SHUTDOWN_TYPE_SHUTDOWN,
130 pm_get_shutdown_scope(), SECURE_FLAG);
131
132 while (1) {
133 wfi();
134 }
135 }
136
137 /**
138 * versal_system_reset() - This function sends the reset request
139 * to firmware for the system to reset. This function does not return.
140 */
versal_system_reset(void)141 static void __dead2 versal_system_reset(void)
142 {
143 /* Send the system reset request to the PMC */
144 (void)pm_system_shutdown(XPM_SHUTDOWN_TYPE_RESET,
145 pm_get_shutdown_scope(), SECURE_FLAG);
146
147 while (1) {
148 wfi();
149 }
150 }
151
152 /**
153 * versal_pwr_domain_off() - This function performs actions to turn off core
154 *
155 * @target_state Targated state
156 */
versal_pwr_domain_off(const psci_power_state_t * target_state)157 static void versal_pwr_domain_off(const psci_power_state_t *target_state)
158 {
159 uint32_t cpu_id = plat_my_core_pos();
160 const struct pm_proc *proc = pm_get_proc(cpu_id);
161
162 for (size_t i = 0U; i <= PLAT_MAX_PWR_LVL; i++) {
163 VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n",
164 __func__, i, target_state->pwr_domain_state[i]);
165 }
166
167 /* Prevent interrupts from spuriously waking up this cpu */
168 plat_versal_gic_cpuif_disable();
169
170 /*
171 * Send request to PMC to power down the appropriate APU CPU
172 * core.
173 * According to PSCI specification, CPU_off function does not
174 * have resume address and CPU core can only be woken up
175 * invoking CPU_on function, during which resume address will
176 * be set.
177 */
178 (void)pm_self_suspend(proc->node_id, MAX_LATENCY, PM_STATE_CPU_IDLE, 0,
179 SECURE_FLAG);
180 }
181
182 /**
183 * versal_validate_power_state() - This function ensures that the power state
184 * parameter in request is valid.
185 *
186 * @power_state Power state of core
187 * @req_state Requested state
188 *
189 * @return Returns status, either success or reason
190 */
versal_validate_power_state(uint32_t power_state,psci_power_state_t * req_state)191 static int32_t versal_validate_power_state(uint32_t power_state,
192 psci_power_state_t *req_state)
193 {
194 VERBOSE("%s: power_state: 0x%x\n", __func__, power_state);
195
196 uint32_t pstate = psci_get_pstate_type(power_state);
197
198 assert(req_state);
199
200 /* Sanity check the requested state */
201 if (pstate == PSTATE_TYPE_STANDBY) {
202 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE;
203 } else {
204 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_OFF_STATE;
205 }
206
207 /* We expect the 'state id' to be zero */
208 if (psci_get_pstate_id(power_state) != 0U) {
209 return PSCI_E_INVALID_PARAMS;
210 }
211
212 return PSCI_E_SUCCESS;
213 }
214
215 /**
216 * versal_get_sys_suspend_power_state() - Get power state for system suspend
217 *
218 * @req_state Requested state
219 */
versal_get_sys_suspend_power_state(psci_power_state_t * req_state)220 static void versal_get_sys_suspend_power_state(psci_power_state_t *req_state)
221 {
222 req_state->pwr_domain_state[PSCI_CPU_PWR_LVL] = PLAT_MAX_OFF_STATE;
223 req_state->pwr_domain_state[1] = PLAT_MAX_OFF_STATE;
224 }
225
226 static const struct plat_psci_ops versal_nopmc_psci_ops = {
227 .pwr_domain_on = versal_pwr_domain_on,
228 .pwr_domain_off = versal_pwr_domain_off,
229 .pwr_domain_on_finish = versal_pwr_domain_on_finish,
230 .pwr_domain_suspend = versal_pwr_domain_suspend,
231 .pwr_domain_suspend_finish = versal_pwr_domain_suspend_finish,
232 .system_off = versal_system_off,
233 .system_reset = versal_system_reset,
234 .validate_power_state = versal_validate_power_state,
235 .get_sys_suspend_power_state = versal_get_sys_suspend_power_state,
236 };
237
238 /*******************************************************************************
239 * Export the platform specific power ops.
240 ******************************************************************************/
plat_setup_psci_ops(uintptr_t sec_entrypoint,const struct plat_psci_ops ** psci_ops)241 int32_t plat_setup_psci_ops(uintptr_t sec_entrypoint,
242 const struct plat_psci_ops **psci_ops)
243 {
244 versal_sec_entry = sec_entrypoint;
245
246 *psci_ops = &versal_nopmc_psci_ops;
247
248 return 0;
249 }
250