1 /*
2  * Copyright (c) 2017 - 2020, Nordic Semiconductor ASA
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions are met:
7  *
8  * 1. Redistributions of source code must retain the above copyright notice, this
9  *    list of conditions and the following disclaimer.
10  *
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * 3. Neither the name of the copyright holder nor the names of its
16  *    contributors may be used to endorse or promote products derived from this
17  *    software without specific prior written permission.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #ifndef NRFX_PRS_H__
33 #define NRFX_PRS_H__
34 
35 #include <nrfx.h>
36 
37 #ifdef __cplusplus
38 extern "C" {
39 #endif
40 
41 /**
42  * @defgroup nrfx_prs Peripheral Resource Sharing (PRS)
43  * @{
44  * @ingroup nrfx
45  *
46  * @brief Peripheral Resource Sharing interface (PRS).
47  */
48 
49 #if defined(NRF51)
50     // SPI0, TWI0
51     #define NRFX_PRS_BOX_0_ADDR     NRF_SPI0
52     // SPI1, SPIS1, TWI1
53     #define NRFX_PRS_BOX_1_ADDR     NRF_SPI1
54 #elif defined(NRF52805_XXAA) || defined(NRF52810_XXAA)
55     // TWIM0, TWIS0, TWI0
56     #define NRFX_PRS_BOX_0_ADDR     NRF_TWIM0
57     // SPIM0, SPIS0, SPI0
58     #define NRFX_PRS_BOX_1_ADDR     NRF_SPIM0
59     // UARTE0, UART0
60     #define NRFX_PRS_BOX_2_ADDR     NRF_UARTE0
61 #elif defined(NRF52811_XXAA)
62     // TWIM0, TWIS0, TWI0, SPIM1, SPIS1, SPI1
63     #define NRFX_PRS_BOX_0_ADDR     NRF_TWIM0
64     // SPIM0, SPIS0, SPI0
65     #define NRFX_PRS_BOX_1_ADDR     NRF_SPIM0
66     // UART0, UARTE0
67     #define NRFX_PRS_BOX_2_ADDR     NRF_UART0
68 #elif defined(NRF52820_XXAA)
69     // SPIM0, SPIS0, TWIM0, TWIS0, SPI0, TWI0
70     #define NRFX_PRS_BOX_0_ADDR     NRF_SPIM0
71     // SPIM1, SPIS1, TWIM1, TWIS1, SPI1, TWI1
72     #define NRFX_PRS_BOX_1_ADDR     NRF_SPIM1
73     // UARTE0, UART0
74     #define NRFX_PRS_BOX_2_ADDR     NRF_UARTE0
75 #elif defined(NRF52832_XXAA) || defined(NRF52832_XXAB) || \
76       defined(NRF52833_XXAA) || defined(NRF52840_XXAA)
77     // SPIM0, SPIS0, TWIM0, TWIS0, SPI0, TWI0
78     #define NRFX_PRS_BOX_0_ADDR     NRF_SPIM0
79     // SPIM1, SPIS1, TWIM1, TWIS1, SPI1, TWI1
80     #define NRFX_PRS_BOX_1_ADDR     NRF_SPIM1
81     // SPIM2, SPIS2, SPI2
82     #define NRFX_PRS_BOX_2_ADDR     NRF_SPIM2
83     // COMP, LPCOMP
84     #define NRFX_PRS_BOX_3_ADDR     NRF_COMP
85     // UARTE0, UART0
86     #define NRFX_PRS_BOX_4_ADDR     NRF_UARTE0
87 #elif defined(NRF5340_XXAA_APPLICATION)
88     // SPIM0, SPIS0, TWIM0, TWIS0, UARTE0
89     #define NRFX_PRS_BOX_0_ADDR     NRF_UARTE0
90     // SPIM1, SPIS1, TWIM1, TWIS1, UARTE1
91     #define NRFX_PRS_BOX_1_ADDR     NRF_UARTE1
92     // SPIM2, SPIS2, TWIM2, TWIS2, UARTE2
93     #define NRFX_PRS_BOX_2_ADDR     NRF_UARTE2
94     // SPIM3, SPIS3, TWIM3, TWIS3, UARTE3
95     #define NRFX_PRS_BOX_3_ADDR     NRF_UARTE3
96     // COMP, LPCOMP
97     #define NRFX_PRS_BOX_4_ADDR     NRF_COMP
98 #elif defined(NRF5340_XXAA_NETWORK)
99     // SPIM0, SPIS0, TWIM0, TWIS0, UARTE0
100     #define NRFX_PRS_BOX_0_ADDR     NRF_UARTE0
101 #elif defined(NRF9160_XXAA)
102     // UARTE0, SPIM0, SPIS0, TWIM0, TWIS0
103     #define NRFX_PRS_BOX_0_ADDR     NRF_UARTE0
104     // UARTE1, SPIM1, SPIS1, TWIM1, TWIS1
105     #define NRFX_PRS_BOX_1_ADDR     NRF_UARTE1
106     // UARTE2, SPIM2, SPIS2, TWIM2, TWIS2
107     #define NRFX_PRS_BOX_2_ADDR     NRF_UARTE2
108     // UARTE3, SPIM3, SPIS3, TWIM3, TWIS3
109     #define NRFX_PRS_BOX_3_ADDR     NRF_UARTE3
110 #else
111     #error "Unknown device."
112 #endif
113 
114 /**
115  * @brief Function for acquiring shared peripheral resources associated with
116  *        the specified peripheral.
117  *
118  * Certain resources and registers are shared among peripherals that have
119  * the same ID (for example: SPI0, SPIM0, SPIS0, TWI0, TWIM0, and TWIS0 in
120  * nRF52832). Only one of them can be utilized at a given time. This function
121  * reserves proper resources to be used by the specified peripheral.
122  * If NRFX_PRS_ENABLED is set to a non-zero value, IRQ handlers for peripherals
123  * that are sharing resources with others are implemented by the @ref nrfx_prs
124  * module instead of individual drivers. The drivers must then specify their
125  * interrupt handling routines and register them by using this function.
126  *
127  * @param[in] p_base_addr Requested peripheral base pointer.
128  * @param[in] irq_handler Interrupt handler to register.
129  *
130  * @retval NRFX_SUCCESS    If resources were acquired successfully or the
131  *                         specified peripheral is not handled by the PRS
132  *                         subsystem and there is no need to acquire resources
133  *                         for it.
134  * @retval NRFX_ERROR_BUSY If resources were already acquired.
135  */
136 nrfx_err_t nrfx_prs_acquire(void       const * p_base_addr,
137                             nrfx_irq_handler_t irq_handler);
138 
139 /**
140  * @brief Function for releasing shared resources reserved previously by
141  *        @ref nrfx_prs_acquire() for the specified peripheral.
142  *
143  * @param[in] p_base_addr Released peripheral base pointer.
144  */
145 void nrfx_prs_release(void const * p_base_addr);
146 
147 /** @} */
148 
149 void nrfx_prs_box_0_irq_handler(void);
150 void nrfx_prs_box_1_irq_handler(void);
151 void nrfx_prs_box_2_irq_handler(void);
152 void nrfx_prs_box_3_irq_handler(void);
153 void nrfx_prs_box_4_irq_handler(void);
154 
155 
156 #ifdef __cplusplus
157 }
158 #endif
159 
160 #endif // NRFX_PRS_H__
161