1 /**
2   ******************************************************************************
3   * @file    rtl8721d_usi_i2c.h
4   * @author
5   * @version V1.0.0
6   * @date    2017-12-18
7   * @brief   This file contains all the functions prototypes for the I2C firmware
8   *          library.
9   ******************************************************************************
10   * @attention
11   *
12   * This module is a confidential and proprietary property of RealTek and
13   * possession or use of this module requires written permission of RealTek.
14   *
15   * Copyright(c) 2017, Realtek Semiconductor Corporation. All rights reserved.
16   ******************************************************************************
17   */
18 
19 #ifndef _RTL8721D_USI_I2C_H_
20 #define _RTL8721D_USI_I2C_H_
21 
22 #include "rtl8721d_usi.h"
23 
24 /** @addtogroup AmebaD_Periph_Driver
25   * @{
26   */
27 
28 /** @addtogroup USI-I2C
29   * @{
30   */
31 
32 /** @addtogroup USI-I2C
33   * @verbatim
34   *****************************************************************************************
35   * Introduction
36   *****************************************************************************************
37   * USI_I2C:
38   *		- Base Address: USI0_DEV
39   *		- IPclk: 50Mhz
40   *		- Speed: Standard (up to 100 kHz) , Fast (up to 400 kHz), High (up to 3.33 MHz) mode
41   *		- Address: 7/10-bit Address Mode
42   *		- IRQ: USI_IRQ
43   *		- GDMA TX handshake interface: GDMA_HANDSHAKE_INTERFACE_USI0_TX
44   *		- GDMA RX handshake interface: GDMA_HANDSHAKE_INTERFACE_USI0_RX
45   *
46   *****************************************************************************************
47   * How to use USI_I2C
48   *****************************************************************************************
49   *      To use the normal USI_I2C mode, the following steps are mandatory:
50   *
51   *      1. Enable peripheral clock using the follwoing functions.(it is enabled by default)
52   *			RCC_PeriphClockCmd(APBPeriph_USI_REG, APBPeriph_USI_CLOCK, ENABLE);
53   *
54   *      2. configure the I2C pinmux.
55   *			Pinmux_Config(Pin_Num, PINMUX_FUNCTION_I2C)
56   *
57   *      3. Program Role, Address Mode, Speed Mode, USI_I2C CLK, Slave address, Threshold, Feature Supports
58   *			USI_I2C_StructInit()
59   *
60   *      4. Init Hardware use step3 parameters:
61   *			USI_I2C_Init(USI_TypeDef *USIx, USI_I2C_InitTypeDef* USI_I2C_InitStruct)
62   *
63   *      5. Enable the NVIC and the corresponding interrupt using following function if you need
64   *			to use interrupt mode.
65   *			USI_I2C_INTConfig(): USI_I2C IRQ Mask set
66   *			InterruptRegister(): register the i2c irq handler
67   *			InterruptEn(): Enable the NVIC interrupt
68   *
69   *      6. Enable USI_I2C module using USI_I2C_Cmd().
70   *
71   *****************************************************************************************
72   * How to use USI_I2C in DMA Register mode
73   *****************************************************************************************
74   *      To use the USI_I2C in DMA Register mode, the following steps are mandatory:
75   *
76   *      1. Enable peripheral clock using the follwoing functions.(it is enabled by default)
77   *			RCC_PeriphClockCmd(APBPeriph_USI_REG, APBPeriph_USI_CLOCK, ENABLE);
78   *
79   *      2. configure the I2C pinmux.
80   *			Pinmux_Config(Pin_Num, PINMUX_FUNCTION_I2C)
81   *
82   *      3. Program Role, Address Mode, Speed Mode, USI_I2C CLK, Slave address, Threshold, Feature Supports
83   *			USI_I2C_StructInit()
84   *
85   *      4. Init Hardware use step3 parameters:
86   *			USI_I2C_Init(USI_TypeDef *USIx, USI_I2C_InitTypeDef* USI_I2C_InitStruct)
87   *
88   *      5. Enable USI_I2C module using USI_I2C_Cmd().
89   *
90   *      6. GDMA related configurations(source address/destination address/block size etc.)
91   *			USI_I2C_TXGDMA_Init():Init and Enable USI_I2C TX GDMA
92   *			USI_I2C_RXGDMA_Init():Init and Enable USI_I2C RX GDMA
93   *
94   *      7. USI_I2C DMA Register Mode set.
95   *			USI_I2C_DmaRegModeConfig():Configures the USI_I2C Control Register DMA mode
96   *
97   *      8. Active the USI_I2C TX/RX DMA Request using USI_I2C_DMAControl().
98   *
99   *****************************************************************************************
100   * @endverbatim
101   */
102 
103 /* Exported types --------------------------------------------------------*/
104 /** @defgroup USI_I2C_Exported_Types USI-I2C Exported Types
105   * @{
106   */
107 
108 /**
109   * @brief  USI_I2C Init structure definition
110   */
111 typedef struct {
112 	u32	USI_I2CIdx;         /*!< Specifies the USI_I2C Device Index.
113 				This parameter can be a value of @ref USI_I2C_Peripheral_definitions */
114 
115 	u32	USI_I2CMaster;      /*!< Specifies the USI_I2C Role.
116 				This parameter can be a value of @ref USI_I2C_Role_definitions */
117 
118 	u32	USI_I2CAddrMod;     /*!< Specifies the USI_I2C Addressing Mode.
119 				This parameter can be a value of @ref USI_I2C_Addr_Mode_definitions */
120 
121 	u32	USI_I2CSpdMod;      /*!< Specifies the USI_I2C Speed Mode.
122 				This parameter can be a value of @ref USI_I2C_Speed_Mode_definitions */
123 
124 	u32	USI_I2CRXTL;        /*!< Specifies the USI_I2C RX FIFO Threshold. It controls the level of
125 				entries(or above) that triggers the RX_FULL interrupt.
126 				This parameter must be set to a value in the 0-255 range. A value of 0 sets
127 				the threshold for 1 entry, and a value of 255 sets the threshold for 256 entry*/
128 
129 	u32	USI_I2CTXTL;        /*!< Specifies the I2C TX FIFO Threshold.It controls the level of
130 				entries(or below) that triggers the TX_EMPTY interrupt.
131 				This parameter must be set to a value in the 0-255 range. A value of 0 sets
132 				the threshold for 0 entry, and a value of 255 sets the threshold for 255 entry*/
133 	u32	USI_I2CMstReSTR;    /*!< Specifies the USI_I2C Restart Support of Master. */
134 
135 	u32	USI_I2CMstGC;       /*!< Specifies the USI_I2C General Call Support of Master. */
136 
137 	u32	USI_I2CMstStartB;   /*!< Specifies the USI_I2C Start Byte Support of Master. */
138 
139 	u32	USI_I2CSlvNoAck;    /*!< Specifies the USI_I2C Slave No Ack Support. */
140 
141  	u32	USI_I2CSlvAckGC;    /*!< Specifies the USI_I2C Slave Acks to General Call. */
142 
143 	u32	USI_I2CAckAddr;     /*!< Specifies the USI_I2C Target Address in I2C Master Mode or
144 				Ack Address in USI_I2C Slave0 Mode.
145 				This parameter must be set to a value in the 0-127 range if the USI_I2C_ADDR_7BIT
146 				is selected or 0-1023 range if the USI_I2C_ADDR_10BIT is selected. */
147 
148 	u32	USI_I2CSlvSetup;       /*!< Specifies the USI_I2C SDA Setup Time. It controls the amount of time delay
149 				introduced in the rising edge of SCL��relative to SDA changing��by holding SCL low
150 				when USI_I2C Device operating as a slave transmitter, in units of ic_clk period.
151 				This parameter must be set to a value in the 0-255 range, it must be set larger than USI_I2CSdaHd*/
152 
153 	u32	USI_I2CSdaHd;       /*!< Specifies the USI_I2C SDA Hold Time. It controls the amount of
154 				hold time on the SDA signal after a negative edge of SCL in both master
155 				and slave mode, in units of ic_clk period.
156 				This parameter must be set to a value in the 0-0xFFFF range. */
157 
158 	u32	USI_I2CClk;         /*!< Specifies the USI_I2C Bus Clock (in kHz). It is closely related to USI_I2CSpdMod */
159 
160 	u32	USI_I2CIPClk;		/*!< Specifies the USI_I2C IP Clock (in Hz). */
161 
162 	u32	USI_I2CFilter;      /*!< Specifies the USI_I2C SCL/SDA Spike Filter. */
163 
164 	u32	USI_I2CTxDMARqLv;   /*!< Specifies the USI_I2C TX DMA Empty Level. dma_tx_req signal is generated when
165 				the number of valid data entries in the transmit FIFO is equal to or below the DMA
166 				Transmit Data Level Register. The value of DMA Transmit Data Level Register is equal
167 				to this value. This parameter must be set to a value in the 0-31 range. */
168 
169 	u32	USI_I2CRxDMARqLv;   /*!< Specifies the USI_I2C RX DMA Full Level. dma_rx_req signal is generated when
170 				the number of valid data entries in the transmit FIFO is equal to or above the DMA
171 				Receive Data Level Register. The value of DMA Receive Data Level Register is equal to
172 				this value+1. This parameter must be set to a value in the 0-31 range. */
173 
174 	u32	USI_I2CDMAMod;     	/*!< Specifies the USI_I2C DMA Mode.
175 				This parameter can be a value of @ref USI_I2C_DMA_Mode_definitions */
176 }USI_I2C_InitTypeDef;
177 /**
178   * @}
179   */
180 
181 /* Exported constants --------------------------------------------------------*/
182 /** @defgroup USI_I2C_Exported_Constants USI-I2C Exported Constants
183   * @{
184   */
185 
186 /** @defgroup USI_I2C_Peripheral_definitions
187   * @{
188   */
189 #define IS_USI_I2C_ALL_PERIPH(PERIPH) ((PERIPH) == USI0_DEV)
190 /**
191   * @}
192   */
193 
194 /** @defgroup USI_I2C_Addr_Mode_definitions
195   * @{
196   */
197 #define USI_I2C_ADDR_7BIT			((u32)0x00000000)
198 #define USI_I2C_ADDR_10BIT			((u32)0x00000001)
199 #define IS_USI_I2C_ADDR_MODE(MODE) (((MODE) == USI_I2C_ADDR_7BIT) || \
200                                    ((MODE) == USI_I2C_ADDR_10BIT))
201 /**
202   * @}
203   */
204 
205 /** @defgroup USI_I2C_Speed_Mode_definitions
206   * @{
207   */
208 #define USI_I2C_SS_MODE				((u32)0x00000001)
209 #define USI_I2C_FS_MODE				((u32)0x00000002)
210 #define USI_I2C_HS_MODE				((u32)0x00000003)
211 #define IS_USI_I2C_SPEED_MODE(MODE) (((MODE) == USI_I2C_SS_MODE) || \
212                                    	((MODE) == USI_I2C_FS_MODE) || \
213                                    	((MODE) == USI_I2C_HS_MODE))
214 /**
215   * @}
216   */
217 
218 /** @defgroup USI_I2C_Role_definitions
219   * @{
220   */
221 #define USI_I2C_SLAVE_MODE			((u32)0x00000000)
222 #define USI_I2C_MASTER_MODE			((u32)0x00000001)
223 /**
224   * @}
225   */
226 
227 /** @defgroup USI_I2C_DMA_Mode_definitions
228   * @{
229   */
230 #define USI_I2C_DMA_LEGACY			((u32)0x00000000)
231 #define USI_I2C_DMA_REGISTER		((u32)0x00000001)
232 #define USI_I2C_DMA_DESCRIPTOR		((u32)0x00000002)
233 #define IS_USI_I2C_DMA_MODE(MODE) 	(((MODE) == USI_I2C_DMA_LEGACY) || \
234                                    	((MODE) == USI_I2C_DMA_REGISTER) || \
235                                    	((MODE) == USI_I2C_DMA_DESCRIPTOR))
236 /**
237   * @}
238   */
239 
240 /** @defgroup USI_I2C_DMA_DATA_LENGTH
241   * @{
242   */
243 #define IS_USI_I2C_DMA_DATA_LEN(LENGTH)   ((LENGTH) <= 0xFFFF)
244 /**
245   * @}
246   */
247 
248 /**
249   * @}
250   */
251 
252 /* Exported functions --------------------------------------------------------*/
253 /** @defgroup USI_I2C_Exported_Functions USI-I2C Exported Functions
254   * @{
255   */
256 
257 /** @defgroup USI_I2C_Exported_Normal_Functions USI-I2C Exported Normal Functions
258   * @{
259   */
260 _LONG_CALL_ void USI_I2C_StructInit(USI_I2C_InitTypeDef* USI_I2C_InitStruct);
261 _LONG_CALL_ void USI_I2C_Init(USI_TypeDef *USIx, USI_I2C_InitTypeDef* USI_I2C_InitStruct);
262 _LONG_CALL_ void USI_I2C_SetSpeed(USI_TypeDef *USIx, u32 SpdMd, u32 I2Clk, u32 I2CIPClk);
263 _LONG_CALL_ void USI_I2C_SetSlaveAddress(USI_TypeDef *USIx, u16 Address);
264 _LONG_CALL_ u8 USI_I2C_CheckFlagState(USI_TypeDef *USIx, u32 USI_I2C_FLAG);
265 _LONG_CALL_ u8 USI_I2C_CheckTXFIFOState(USI_TypeDef *USIx, u32 USI_I2C_TXFIFO_FLAG);
266 _LONG_CALL_ u8 USI_I2C_CheckRXFIFOState(USI_TypeDef *USIx, u32 USI_I2C_RXFIFO_FLAG);
267 _LONG_CALL_ void USI_I2C_INTConfig(USI_TypeDef *USIx, u32 USI_I2C_IT, u32 NewState);
268 _LONG_CALL_ void USI_I2C_ClearINT(USI_TypeDef *USIx, u32 INTrBit);
269 _LONG_CALL_ void USI_I2C_ClearAllINT(USI_TypeDef *USIx);
270 _LONG_CALL_ u32 USI_I2C_GetRawINT(USI_TypeDef *USIx);
271 _LONG_CALL_ u32 USI_I2C_GetINT(USI_TypeDef *USIx);
272 _LONG_CALL_ void USI_I2C_Cmd(USI_TypeDef *USIx, u8 NewState);
273 _LONG_CALL_ u8 USI_I2C_ReceiveData(USI_TypeDef *USIx);
274 /**
275   * @}
276   */
277 
278 /** @defgroup USI_I2C_Exported_Master_Functions USI-I2C Exported Master Functions
279   * @{
280   */
281 _LONG_CALL_ void USI_I2C_MasterSendNullData(USI_TypeDef *USIx, u8* pBuf, u8  I2CCmd, u8  I2CStop, u8  I2CReSTR);
282 _LONG_CALL_ void USI_I2C_MasterSend(USI_TypeDef *USIx, u8* pBuf, u8  I2CCmd, u8  I2CStop, u8  I2CReSTR);
283 _LONG_CALL_ u8 USI_I2C_MasterWrite(USI_TypeDef *USIx, u8* pBuf, u8 len);
284 _LONG_CALL_ u8 USI_I2C_MasterRead(USI_TypeDef *USIx, u8* pBuf, u8 len);
285 _LONG_CALL_ void USI_I2C_MasterRepeatRead(USI_TypeDef* USIx, u8* pWriteBuf, u8 Writelen, u8* pReadBuf, u8 Readlen);
286 _LONG_CALL_ void USI_I2C_SetSlaveAddress(USI_TypeDef *USIx, u16 Address);
287 /**
288   * @}
289   */
290 
291 /** @defgroup USI_I2C_Exported_Slave_Functions USI-I2C Exported Slave Functions
292   * @{
293   */
294 _LONG_CALL_ void USI_I2C_SlaveWrite(USI_TypeDef *USIx, u8* pBuf, u8 len);
295 _LONG_CALL_ void USI_I2C_SlaveRead(USI_TypeDef *USIx, u8* pBuf, u8 len);
296 _LONG_CALL_ void USI_I2C_SlaveSend(USI_TypeDef *USIx, u8 Data);
297 /**
298   * @}
299   */
300 
301 /** @defgroup USI_I2C_Exported_DMA_Functions USI-I2C Exported DMA Functions
302   * @{
303   */
304 _LONG_CALL_ void USI_I2C_DMAControl(USI_TypeDef *USIx, u32 DmaCtrl, u8 NewState);
305 _LONG_CALL_ void USI_I2C_DmaRegModeConfig(USI_TypeDef *USIx, u32 USI_I2C_DmaCmd, u32 USI_I2C_DmaBLen);
306 _LONG_CALL_ BOOL USI_I2C_TXGDMA_Init(u8 Index, GDMA_InitTypeDef *GDMA_InitStruct, void *CallbackData, IRQ_FUN CallbackFunc, u8 *pTxBuf, int TxCount);
307 _LONG_CALL_ BOOL USI_I2C_RXGDMA_Init(u8 Index, GDMA_InitTypeDef *GDMA_InitStruct, void *CallbackData, IRQ_FUN CallbackFunc, u8 *pRxBuf, int RxCount);
308 /**
309   * @}
310   */
311 
312 /** @defgroup USI_I2C_Exported_PowerSave_Functions USI-I2C Exported PowerSave Functions
313   * @{
314   */
315 _LONG_CALL_ void USI_I2C_Sleep_Cmd(USI_TypeDef *USIx, u32 NewStatus);
316 _LONG_CALL_ void USI_I2C_WakeUp(USI_TypeDef *USIx);
317 /**
318   * @}
319   */
320 
321 /**
322   * @}
323   */
324 
325 /**
326   * @}
327   */
328 
329 /**
330   * @}
331   */
332 
333 /* Other Definitions --------------------------------------------------------*/
334 //USI_I2C Timing Parameters
335 #define USI_I2C_SS_MIN_SCL_HTIME		4000    //the unit is ns.
336 #define USI_I2C_SS_MIN_SCL_LTIME		4700    //the unit is ns.
337 
338 #define USI_I2C_FS_MIN_SCL_HTIME		600     //the unit is ns.
339 #define USI_I2C_FS_MIN_SCL_LTIME		1300    //the unit is ns.
340 
341 #define USI_I2C_HS_MIN_SCL_HTIME_100	60      //the unit is ns, with bus loading = 100pf
342 #define USI_I2C_HS_MIN_SCL_LTIME_100	100     //the unit is ns., with bus loading = 100pf
343 
344 #define USI_I2C_HS_MIN_SCL_HTIME_400	160     //the unit is ns, with bus loading = 400pf
345 #define USI_I2C_HS_MIN_SCL_LTIME_400	320     //the unit is ns., with bus loading = 400pf
346 
347 extern u32 USI_I2C_SLAVEWRITE_PATCH;
348 extern u32 USI_IC_FS_SCL_HCNT_TRIM;
349 extern u32 USI_IC_FS_SCL_LCNT_TRIM;
350 
351 #endif
352 
353 /******************* (C) COPYRIGHT 2016 Realtek Semiconductor *****END OF FILE****/
354 
355