1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2/*
3 * Device Tree Source for the RZ/{G2L,G2LC,V2L} SMARC EVK common parts
4 *
5 * Copyright (C) 2022 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
10
11/*
12 * SSI-WM8978
13 *
14 * This command is required when Playback/Capture
15 *
16 *	amixer cset name='Left Input Mixer L2 Switch' on
17 *	amixer cset name='Right Input Mixer R2 Switch' on
18 *	amixer cset name='Headphone Playback Volume' 100
19 *	amixer cset name='PCM Volume' 100%
20 *	amixer cset name='Input PGA Volume' 25
21 *
22 */
23
24/ {
25	aliases {
26		serial0 = &scif0;
27		i2c0 = &i2c0;
28		i2c1 = &i2c1;
29	};
30
31	chosen {
32		stdout-path = "serial0:115200n8";
33	};
34
35	audio_mclock: audio_mclock {
36		compatible = "fixed-clock";
37		#clock-cells = <0>;
38		clock-frequency = <11289600>;
39	};
40
41	snd_rzg2l: sound {
42		compatible = "simple-audio-card";
43		simple-audio-card,format = "i2s";
44		simple-audio-card,bitclock-master = <&cpu_dai>;
45		simple-audio-card,frame-master = <&cpu_dai>;
46		simple-audio-card,mclk-fs = <256>;
47
48		simple-audio-card,widgets = "Microphone", "Microphone Jack";
49		simple-audio-card,routing =
50			    "L2", "Mic Bias",
51			    "R2", "Mic Bias",
52			    "Mic Bias", "Microphone Jack";
53
54		cpu_dai: simple-audio-card,cpu {
55		};
56
57		codec_dai: simple-audio-card,codec {
58			clocks = <&audio_mclock>;
59			sound-dai = <&wm8978>;
60		};
61	};
62
63	usb0_vbus_otg: regulator-usb0-vbus-otg {
64		compatible = "regulator-fixed";
65
66		regulator-name = "USB0_VBUS_OTG";
67		regulator-min-microvolt = <5000000>;
68		regulator-max-microvolt = <5000000>;
69	};
70
71	vccq_sdhi1: regulator-vccq-sdhi1 {
72		compatible = "regulator-gpio";
73		regulator-name = "SDHI1 VccQ";
74		regulator-min-microvolt = <1800000>;
75		regulator-max-microvolt = <3300000>;
76		gpios-states = <1>;
77		states = <3300000 1>, <1800000 0>;
78	};
79};
80
81&audio_clk1{
82	clock-frequency = <11289600>;
83};
84
85&audio_clk2{
86	clock-frequency = <12288000>;
87};
88
89&canfd {
90	pinctrl-0 = <&can0_pins &can1_pins>;
91	pinctrl-names = "default";
92	status = "okay";
93
94	channel0 {
95		status = "okay";
96	};
97
98	channel1 {
99		status = "okay";
100	};
101};
102
103&ehci0 {
104	dr_mode = "otg";
105	status = "okay";
106};
107
108&ehci1 {
109	status = "okay";
110};
111
112&hsusb {
113	dr_mode = "otg";
114	status = "okay";
115};
116
117&i2c0 {
118	pinctrl-0 = <&i2c0_pins>;
119	pinctrl-names = "default";
120
121	status = "okay";
122};
123
124&i2c1 {
125	pinctrl-0 = <&i2c1_pins>;
126	pinctrl-names = "default";
127
128	status = "okay";
129};
130
131&ohci0 {
132	dr_mode = "otg";
133	status = "okay";
134};
135
136&ohci1 {
137	status = "okay";
138};
139
140&phyrst {
141	status = "okay";
142};
143
144&scif0 {
145	pinctrl-0 = <&scif0_pins>;
146	pinctrl-names = "default";
147	status = "okay";
148};
149
150&sdhi1 {
151	pinctrl-0 = <&sdhi1_pins>;
152	pinctrl-1 = <&sdhi1_pins_uhs>;
153	pinctrl-names = "default", "state_uhs";
154
155	vmmc-supply = <&reg_3p3v>;
156	vqmmc-supply = <&vccq_sdhi1>;
157	bus-width = <4>;
158	sd-uhs-sdr50;
159	sd-uhs-sdr104;
160	status = "okay";
161};
162
163&spi1 {
164	pinctrl-0 = <&spi1_pins>;
165	pinctrl-names = "default";
166
167	status = "okay";
168};
169
170&usb2_phy0 {
171	pinctrl-0 = <&usb0_pins>;
172	pinctrl-names = "default";
173
174	vbus-supply = <&usb0_vbus_otg>;
175	status = "okay";
176};
177
178&usb2_phy1 {
179	pinctrl-0 = <&usb1_pins>;
180	pinctrl-names = "default";
181
182	status = "okay";
183};
184