1 /*
2 * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7
8 /*******************************************************************************
9 * This is the Secure Payload Dispatcher (SPD). The dispatcher is meant to be a
10 * plug-in component to the Secure Monitor, registered as a runtime service. The
11 * SPD is expected to be a functional extension of the Secure Payload (SP) that
12 * executes in Secure EL1. The Secure Monitor will delegate all SMCs targeting
13 * the Trusted OS/Applications range to the dispatcher. The SPD will either
14 * handle the request locally or delegate it to the Secure Payload. It is also
15 * responsible for initialising and maintaining communication with the SP.
16 ******************************************************************************/
17 #include <assert.h>
18 #include <errno.h>
19 #include <stddef.h>
20
21 #include <arch_helpers.h>
22 #include <bl31/bl31.h>
23 #include <common/bl_common.h>
24 #include <common/debug.h>
25 #include <common/runtime_svc.h>
26 #include <lib/el3_runtime/context_mgmt.h>
27 #include <plat/common/platform.h>
28 #include <tools_share/uuid.h>
29
30 #include "opteed_private.h"
31 #include "teesmc_opteed.h"
32 #include "teesmc_opteed_macros.h"
33
34 /*******************************************************************************
35 * Address of the entrypoint vector table in OPTEE. It is
36 * initialised once on the primary core after a cold boot.
37 ******************************************************************************/
38 struct optee_vectors *optee_vector_table;
39
40 /*******************************************************************************
41 * Array to keep track of per-cpu OPTEE state
42 ******************************************************************************/
43 optee_context_t opteed_sp_context[OPTEED_CORE_COUNT];
44 uint32_t opteed_rw;
45
46 static int32_t opteed_init(void);
47
48 /*******************************************************************************
49 * This function is the handler registered for S-EL1 interrupts by the
50 * OPTEED. It validates the interrupt and upon success arranges entry into
51 * the OPTEE at 'optee_fiq_entry()' for handling the interrupt.
52 ******************************************************************************/
opteed_sel1_interrupt_handler(uint32_t id,uint32_t flags,void * handle,void * cookie)53 static uint64_t opteed_sel1_interrupt_handler(uint32_t id,
54 uint32_t flags,
55 void *handle,
56 void *cookie)
57 {
58 uint32_t linear_id;
59 optee_context_t *optee_ctx;
60
61 /* Check the security state when the exception was generated */
62 assert(get_interrupt_src_ss(flags) == NON_SECURE);
63
64 /* Sanity check the pointer to this cpu's context */
65 assert(handle == cm_get_context(NON_SECURE));
66
67 /* Save the non-secure context before entering the OPTEE */
68 cm_el1_sysregs_context_save(NON_SECURE);
69
70 /* Get a reference to this cpu's OPTEE context */
71 linear_id = plat_my_core_pos();
72 optee_ctx = &opteed_sp_context[linear_id];
73 assert(&optee_ctx->cpu_ctx == cm_get_context(SECURE));
74
75 cm_set_elr_el3(SECURE, (uint64_t)&optee_vector_table->fiq_entry);
76 cm_el1_sysregs_context_restore(SECURE);
77 cm_set_next_eret_context(SECURE);
78
79 /*
80 * Tell the OPTEE that it has to handle an FIQ (synchronously).
81 * Also the instruction in normal world where the interrupt was
82 * generated is passed for debugging purposes. It is safe to
83 * retrieve this address from ELR_EL3 as the secure context will
84 * not take effect until el3_exit().
85 */
86 SMC_RET1(&optee_ctx->cpu_ctx, read_elr_el3());
87 }
88
89 /*******************************************************************************
90 * OPTEE Dispatcher setup. The OPTEED finds out the OPTEE entrypoint and type
91 * (aarch32/aarch64) if not already known and initialises the context for entry
92 * into OPTEE for its initialization.
93 ******************************************************************************/
opteed_setup(void)94 static int32_t opteed_setup(void)
95 {
96 entry_point_info_t *optee_ep_info;
97 uint32_t linear_id;
98 uint64_t opteed_pageable_part;
99 uint64_t opteed_mem_limit;
100 uint64_t dt_addr;
101
102 linear_id = plat_my_core_pos();
103
104 /*
105 * Get information about the Secure Payload (BL32) image. Its
106 * absence is a critical failure. TODO: Add support to
107 * conditionally include the SPD service
108 */
109 optee_ep_info = bl31_plat_get_next_image_ep_info(SECURE);
110 if (!optee_ep_info) {
111 WARN("No OPTEE provided by BL2 boot loader, Booting device"
112 " without OPTEE initialization. SMC`s destined for OPTEE"
113 " will return SMC_UNK\n");
114 return 1;
115 }
116
117 /*
118 * If there's no valid entry point for SP, we return a non-zero value
119 * signalling failure initializing the service. We bail out without
120 * registering any handlers
121 */
122 if (!optee_ep_info->pc)
123 return 1;
124
125 opteed_rw = optee_ep_info->args.arg0;
126 opteed_pageable_part = optee_ep_info->args.arg1;
127 opteed_mem_limit = optee_ep_info->args.arg2;
128 dt_addr = optee_ep_info->args.arg3;
129
130 opteed_init_optee_ep_state(optee_ep_info,
131 opteed_rw,
132 optee_ep_info->pc,
133 opteed_pageable_part,
134 opteed_mem_limit,
135 dt_addr,
136 &opteed_sp_context[linear_id]);
137
138 /*
139 * All OPTEED initialization done. Now register our init function with
140 * BL31 for deferred invocation
141 */
142 bl31_register_bl32_init(&opteed_init);
143
144 return 0;
145 }
146
147 /*******************************************************************************
148 * This function passes control to the OPTEE image (BL32) for the first time
149 * on the primary cpu after a cold boot. It assumes that a valid secure
150 * context has already been created by opteed_setup() which can be directly
151 * used. It also assumes that a valid non-secure context has been
152 * initialised by PSCI so it does not need to save and restore any
153 * non-secure state. This function performs a synchronous entry into
154 * OPTEE. OPTEE passes control back to this routine through a SMC.
155 ******************************************************************************/
opteed_init(void)156 static int32_t opteed_init(void)
157 {
158 uint32_t linear_id = plat_my_core_pos();
159 optee_context_t *optee_ctx = &opteed_sp_context[linear_id];
160 entry_point_info_t *optee_entry_point;
161 uint64_t rc;
162
163 /*
164 * Get information about the OPTEE (BL32) image. Its
165 * absence is a critical failure.
166 */
167 optee_entry_point = bl31_plat_get_next_image_ep_info(SECURE);
168 assert(optee_entry_point);
169
170 cm_init_my_context(optee_entry_point);
171
172 /*
173 * Arrange for an entry into OPTEE. It will be returned via
174 * OPTEE_ENTRY_DONE case
175 */
176 rc = opteed_synchronous_sp_entry(optee_ctx);
177 assert(rc != 0);
178
179 return rc;
180 }
181
182
183 /*******************************************************************************
184 * This function is responsible for handling all SMCs in the Trusted OS/App
185 * range from the non-secure state as defined in the SMC Calling Convention
186 * Document. It is also responsible for communicating with the Secure
187 * payload to delegate work and return results back to the non-secure
188 * state. Lastly it will also return any information that OPTEE needs to do
189 * the work assigned to it.
190 ******************************************************************************/
opteed_smc_handler(uint32_t smc_fid,u_register_t x1,u_register_t x2,u_register_t x3,u_register_t x4,void * cookie,void * handle,u_register_t flags)191 static uintptr_t opteed_smc_handler(uint32_t smc_fid,
192 u_register_t x1,
193 u_register_t x2,
194 u_register_t x3,
195 u_register_t x4,
196 void *cookie,
197 void *handle,
198 u_register_t flags)
199 {
200 cpu_context_t *ns_cpu_context;
201 uint32_t linear_id = plat_my_core_pos();
202 optee_context_t *optee_ctx = &opteed_sp_context[linear_id];
203 uint64_t rc;
204
205 /*
206 * Determine which security state this SMC originated from
207 */
208
209 if (is_caller_non_secure(flags)) {
210 /*
211 * This is a fresh request from the non-secure client.
212 * The parameters are in x1 and x2. Figure out which
213 * registers need to be preserved, save the non-secure
214 * state and send the request to the secure payload.
215 */
216 assert(handle == cm_get_context(NON_SECURE));
217
218 cm_el1_sysregs_context_save(NON_SECURE);
219
220 /*
221 * We are done stashing the non-secure context. Ask the
222 * OPTEE to do the work now.
223 */
224
225 /*
226 * Verify if there is a valid context to use, copy the
227 * operation type and parameters to the secure context
228 * and jump to the fast smc entry point in the secure
229 * payload. Entry into S-EL1 will take place upon exit
230 * from this function.
231 */
232 assert(&optee_ctx->cpu_ctx == cm_get_context(SECURE));
233
234 /* Set appropriate entry for SMC.
235 * We expect OPTEE to manage the PSTATE.I and PSTATE.F
236 * flags as appropriate.
237 */
238 if (GET_SMC_TYPE(smc_fid) == SMC_TYPE_FAST) {
239 cm_set_elr_el3(SECURE, (uint64_t)
240 &optee_vector_table->fast_smc_entry);
241 } else {
242 cm_set_elr_el3(SECURE, (uint64_t)
243 &optee_vector_table->yield_smc_entry);
244 }
245
246 cm_el1_sysregs_context_restore(SECURE);
247 cm_set_next_eret_context(SECURE);
248
249 write_ctx_reg(get_gpregs_ctx(&optee_ctx->cpu_ctx),
250 CTX_GPREG_X4,
251 read_ctx_reg(get_gpregs_ctx(handle),
252 CTX_GPREG_X4));
253 write_ctx_reg(get_gpregs_ctx(&optee_ctx->cpu_ctx),
254 CTX_GPREG_X5,
255 read_ctx_reg(get_gpregs_ctx(handle),
256 CTX_GPREG_X5));
257 write_ctx_reg(get_gpregs_ctx(&optee_ctx->cpu_ctx),
258 CTX_GPREG_X6,
259 read_ctx_reg(get_gpregs_ctx(handle),
260 CTX_GPREG_X6));
261 /* Propagate hypervisor client ID */
262 write_ctx_reg(get_gpregs_ctx(&optee_ctx->cpu_ctx),
263 CTX_GPREG_X7,
264 read_ctx_reg(get_gpregs_ctx(handle),
265 CTX_GPREG_X7));
266
267 SMC_RET4(&optee_ctx->cpu_ctx, smc_fid, x1, x2, x3);
268 }
269
270 /*
271 * Returning from OPTEE
272 */
273
274 switch (smc_fid) {
275 /*
276 * OPTEE has finished initialising itself after a cold boot
277 */
278 case TEESMC_OPTEED_RETURN_ENTRY_DONE:
279 /*
280 * Stash the OPTEE entry points information. This is done
281 * only once on the primary cpu
282 */
283 assert(optee_vector_table == NULL);
284 optee_vector_table = (optee_vectors_t *) x1;
285
286 if (optee_vector_table) {
287 set_optee_pstate(optee_ctx->state, OPTEE_PSTATE_ON);
288
289 /*
290 * OPTEE has been successfully initialized.
291 * Register power management hooks with PSCI
292 */
293 psci_register_spd_pm_hook(&opteed_pm);
294
295 /*
296 * Register an interrupt handler for S-EL1 interrupts
297 * when generated during code executing in the
298 * non-secure state.
299 */
300 flags = 0;
301 set_interrupt_rm_flag(flags, NON_SECURE);
302 rc = register_interrupt_type_handler(INTR_TYPE_S_EL1,
303 opteed_sel1_interrupt_handler,
304 flags);
305 if (rc)
306 panic();
307 }
308
309 /*
310 * OPTEE reports completion. The OPTEED must have initiated
311 * the original request through a synchronous entry into
312 * OPTEE. Jump back to the original C runtime context.
313 */
314 opteed_synchronous_sp_exit(optee_ctx, x1);
315 break;
316
317
318 /*
319 * These function IDs is used only by OP-TEE to indicate it has
320 * finished:
321 * 1. turning itself on in response to an earlier psci
322 * cpu_on request
323 * 2. resuming itself after an earlier psci cpu_suspend
324 * request.
325 */
326 case TEESMC_OPTEED_RETURN_ON_DONE:
327 case TEESMC_OPTEED_RETURN_RESUME_DONE:
328
329
330 /*
331 * These function IDs is used only by the SP to indicate it has
332 * finished:
333 * 1. suspending itself after an earlier psci cpu_suspend
334 * request.
335 * 2. turning itself off in response to an earlier psci
336 * cpu_off request.
337 */
338 case TEESMC_OPTEED_RETURN_OFF_DONE:
339 case TEESMC_OPTEED_RETURN_SUSPEND_DONE:
340 case TEESMC_OPTEED_RETURN_SYSTEM_OFF_DONE:
341 case TEESMC_OPTEED_RETURN_SYSTEM_RESET_DONE:
342
343 /*
344 * OPTEE reports completion. The OPTEED must have initiated the
345 * original request through a synchronous entry into OPTEE.
346 * Jump back to the original C runtime context, and pass x1 as
347 * return value to the caller
348 */
349 opteed_synchronous_sp_exit(optee_ctx, x1);
350 break;
351
352 /*
353 * OPTEE is returning from a call or being preempted from a call, in
354 * either case execution should resume in the normal world.
355 */
356 case TEESMC_OPTEED_RETURN_CALL_DONE:
357 /*
358 * This is the result from the secure client of an
359 * earlier request. The results are in x0-x3. Copy it
360 * into the non-secure context, save the secure state
361 * and return to the non-secure state.
362 */
363 assert(handle == cm_get_context(SECURE));
364 cm_el1_sysregs_context_save(SECURE);
365
366 /* Get a reference to the non-secure context */
367 ns_cpu_context = cm_get_context(NON_SECURE);
368 assert(ns_cpu_context);
369
370 /* Restore non-secure state */
371 cm_el1_sysregs_context_restore(NON_SECURE);
372 cm_set_next_eret_context(NON_SECURE);
373
374 SMC_RET4(ns_cpu_context, x1, x2, x3, x4);
375
376 /*
377 * OPTEE has finished handling a S-EL1 FIQ interrupt. Execution
378 * should resume in the normal world.
379 */
380 case TEESMC_OPTEED_RETURN_FIQ_DONE:
381 /* Get a reference to the non-secure context */
382 ns_cpu_context = cm_get_context(NON_SECURE);
383 assert(ns_cpu_context);
384
385 /*
386 * Restore non-secure state. There is no need to save the
387 * secure system register context since OPTEE was supposed
388 * to preserve it during S-EL1 interrupt handling.
389 */
390 cm_el1_sysregs_context_restore(NON_SECURE);
391 cm_set_next_eret_context(NON_SECURE);
392
393 SMC_RET0((uint64_t) ns_cpu_context);
394
395 default:
396 panic();
397 }
398 }
399
400 /* Define an OPTEED runtime service descriptor for fast SMC calls */
401 DECLARE_RT_SVC(
402 opteed_fast,
403
404 OEN_TOS_START,
405 OEN_TOS_END,
406 SMC_TYPE_FAST,
407 opteed_setup,
408 opteed_smc_handler
409 );
410
411 /* Define an OPTEED runtime service descriptor for yielding SMC calls */
412 DECLARE_RT_SVC(
413 opteed_std,
414
415 OEN_TOS_START,
416 OEN_TOS_END,
417 SMC_TYPE_YIELD,
418 NULL,
419 opteed_smc_handler
420 );
421